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/nrf52832-nimble/rt-thread/libcpu/arm/armv6/
H A Dmmu.h102 …(SECT_AP_RW|PGD_DOMAIN(0)|PGD_SECT_WB|PGD_TYPE_SECT) /* Read/Write/executable, cache, write back */
103 …(SECT_AP_RW|PGD_DOMAIN(0)|PGD_SECT_WT|PGD_TYPE_SECT) /* Read/Write/executable, cache, write throug…
104 …CNB (SECT_AP_RW|PGD_DOMAIN(0)|PGD_TYPE_SECT) /* Read/Write/executable without cache and write b…
105 …_RWX_FAULT (SECT_AP_RW|PGD_DOMAIN(1)|PGD_TYPE_SECT) /* Read/Write without cache and write buffer…
107 …SECT_AP_RW|PGD_DOMAIN(0)|PGD_SECT_WB|PGD_TYPE_SECT|PGD_SECT_XN) /* Read/Write, cache, write back */
108 …T_AP_RW|PGD_DOMAIN(0)|PGD_SECT_WT|PGD_TYPE_SECT|PGD_SECT_XN) /* Read/Write, cache, write through */
109 … (SECT_AP_RW|PGD_DOMAIN(0)|PGD_TYPE_SECT|PGD_SECT_XN) /* Read/Write without cache and write buffer…
110 … (SECT_AP_RW|PGD_DOMAIN(1)|PGD_TYPE_SECT|PGD_SECT_XN) /* Read/Write without cache and write buffer…
113 … (SECT_AP_RO|PGD_DOMAIN(0)|PGD_SECT_WB|PGD_TYPE_SECT) /* Read Only/executable, cache, write back */
114 …ECT_AP_RO|PGD_DOMAIN(0)|PGD_SECT_WT|PGD_TYPE_SECT) /* Read Only/executable, cache, write through */
[all …]
/nrf52832-nimble/rt-thread/libcpu/arm/dm36x/
H A Dmmu.h101 … (SECT_AP_RW|PGD_DOMAIN(0)|PGD_SECT_WB|PGD_TYPE_SECT|PGD_BIT4) /* Read/Write, cache, write back */
102 …SECT_AP_RW|PGD_DOMAIN(0)|PGD_SECT_WT|PGD_TYPE_SECT|PGD_BIT4) /* Read/Write, cache, write through */
103 … (SECT_AP_RW|PGD_DOMAIN(0)|PGD_TYPE_SECT|PGD_BIT4) /* Read/Write without cache and write buffer…
104 …T (SECT_AP_RW|PGD_DOMAIN(1)|PGD_TYPE_SECT|PGD_BIT4) /* Read/Write without cache and write buffer…
106 … (SECT_AP_RO|PGD_DOMAIN(0)|PGD_SECT_WB|PGD_TYPE_SECT|PGD_BIT4) /* Read Only, cache, write back */
107 …(SECT_AP_RO|PGD_DOMAIN(0)|PGD_SECT_WT|PGD_TYPE_SECT|PGD_BIT4) /* Read Only, cache, write through */
108 … (SECT_AP_RO|PGD_DOMAIN(0)|PGD_TYPE_SECT|PGD_BIT4) /* Read Only without cache and write buffer */
109 … (SECT_AP_RO|PGD_DOMAIN(1)|PGD_TYPE_SECT|PGD_BIT4) /* Read Only without cache and write buffer */
124 #define PAGE_RW_CB (PAGE_AP_RW|PAGE_CB|PTE_TYPE_SMALL) /* Read/Write, cache, write back */
125 #define PAGE_RW_CNB (PAGE_AP_RW|PAGE_CNB|PTE_TYPE_SMALL) /* Read/Write, cache, write through */
[all …]
/nrf52832-nimble/rt-thread/tools/
H A Dua.py17 # with this program; if not, write to the Free Software Foundation, Inc.,
44 # ua.write('import os\n')
45 # ua.write('import sys\n')
46 ua.write('\n')
80 ua.write('def GetCPPPATH(BSP_ROOT, RTT_ROOT):\n')
81 ua.write('\tCPPPATH=[\n')
83 ua.write('\t\t%s\n' % path)
84 ua.write('\t]\n\n')
85 ua.write('\treturn CPPPATH\n\n')
87 ua.write('def GetCPPPATH(BSP_ROOT, RTT_ROOT):\n')
[all …]
H A Dvs2012.py17 # with this program; if not, write to the Free Software Foundation, Inc.,
156 out.write('<?xml version="1.0" encoding="UTF-8"?>\r\n')
170 # write head include path
182 # write include path
187 # write cppdefinitons flags
193 # write link flags
195 # write lib dependence (Link)
203 # write lib include path
221 …out.write(r'<Project DefaultTargets="Build" ToolsVersion="4.0" xmlns="http://schemas.microsoft.com…
222 out.write(vcxproj_string[len(root_node):])
[all …]
H A Dvs.py17 # with this program; if not, write to the Free Software Foundation, Inc.,
82 out.write('<?xml version="1.0" encoding="UTF-8"?>\r\n')
113 # write head include path
125 # write include path, definitions
132 # write cppdefinitons flags
143 # write link flags
145 # write lib dependence
154 # write lib include path
168 out.write(etree.tostring(root, encoding='utf-8'))
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf52.svd403 <access>read-write</access>
821 <access>read-write</access>
827 <access>read-write</access>
833 <access>read-write</access>
839 <access>read-write</access>
847 <access>read-write</access>
864 <access>read-write</access>
881 <access>read-write</access>
898 <access>read-write</access>
931 <access>read-write</access>
[all …]
H A Dnrf52810.svd384 <access>read-write</access>
666 <access>read-write</access>
672 <access>read-write</access>
678 <access>read-write</access>
684 <access>read-write</access>
692 <access>read-write</access>
709 <access>read-write</access>
726 <access>read-write</access>
743 <access>read-write</access>
776 <access>read-write</access>
[all …]
H A Dnrf52840.svd414 <access>read-write</access>
989 <access>read-write</access>
995 <access>read-write</access>
1001 <access>read-write</access>
1007 <access>read-write</access>
1015 <access>read-write</access>
1032 <access>read-write</access>
1049 <access>read-write</access>
1066 <access>read-write</access>
1105 <access>read-write</access>
[all …]
H A Dnrf9160.svd80 <access>read-write</access>
283 <access>read-write</access>
320 <access>read-write</access>
464 <access>read-write</access>
469 <description>Blocks debugger read/write access to all CPU registers and
492 <access>read-write</access>
507 <access>read-write</access>
534 <access>read-write</access>
561 <access>read-write</access>
566 <description>Blocks debugger read/write access to all secure CPU registers and secure
[all …]
H A Dnrf52_bitfields.h44 /* Bit 2 : Write '1' to Enable interrupt for NOTRESOLVED event */
51 /* Bit 1 : Write '1' to Enable interrupt for RESOLVED event */
58 /* Bit 0 : Write '1' to Enable interrupt for END event */
68 /* Bit 2 : Write '1' to Disable interrupt for NOTRESOLVED event */
75 /* Bit 1 : Write '1' to Disable interrupt for RESOLVED event */
82 /* Bit 0 : Write '1' to Disable interrupt for END event */
140 /* Bit 31 : Enable protection for region 31. Write '0' has no effect. */
146 /* Bit 30 : Enable protection for region 30. Write '0' has no effect. */
152 /* Bit 29 : Enable protection for region 29. Write '0' has no effect. */
158 /* Bit 28 : Enable protection for region 28. Write '0' has no effect. */
[all …]
H A Dnrf51.svd76 <access>read-write</access>
94 <access>write-only</access>
100 <access>write-only</access>
132 <usage>write</usage>
135 <description>Enable interrupt on write.</description>
165 <usage>write</usage>
168 <description>Disable interrupt on write.</description>
384 <access>write-only</access>
721 <access>read-write</access>
740 <access>write-only</access>
[all …]
H A Dnrf52840_bitfields.h79 /* Bit 2 : Write '1' to enable interrupt for NOTRESOLVED event */
86 /* Bit 1 : Write '1' to enable interrupt for RESOLVED event */
93 /* Bit 0 : Write '1' to enable interrupt for END event */
103 /* Bit 2 : Write '1' to disable interrupt for NOTRESOLVED event */
110 /* Bit 1 : Write '1' to disable interrupt for RESOLVED event */
117 /* Bit 0 : Write '1' to disable interrupt for END event */
180 … cluster[n]: Size of region to protect counting from address ACL[n].ADDR. Write '0' as no effect. …
189 /* Bit 2 : Configure read permissions for region n. Write '0' has no effect. */
195 /* Bit 1 : Configure write and erase permissions for region n. Write '0' has no effect. */
196 #define ACL_ACL_PERM_WRITE_Pos (1UL) /*!< Position of WRITE field. */
[all …]
H A Dnrf52810_bitfields.h79 /* Bit 2 : Write '1' to enable interrupt for NOTRESOLVED event */
86 /* Bit 1 : Write '1' to enable interrupt for RESOLVED event */
93 /* Bit 0 : Write '1' to enable interrupt for END event */
103 /* Bit 2 : Write '1' to disable interrupt for NOTRESOLVED event */
110 /* Bit 1 : Write '1' to disable interrupt for RESOLVED event */
117 /* Bit 0 : Write '1' to disable interrupt for END event */
175 /* Bit 31 : Enable protection for region 31. Write '0' has no effect. */
181 /* Bit 30 : Enable protection for region 30. Write '0' has no effect. */
187 /* Bit 29 : Enable protection for region 29. Write '0' has no effect. */
193 /* Bit 28 : Enable protection for region 28. Write '0' has no effect. */
[all …]
/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_nvmc.h49 * of the chip. In order to write to NVM the controller must be powered
65 * @brief Write a single byte to flash.
70 * @param address Address to write to.
71 * @param value Value to write.
77 * @brief Write a 32-bit word to flash.
78 * @param address Address to write to.
79 * @param value Value to write.
85 * @brief Write consecutive bytes to flash.
87 * @param address Address to write to.
89 * @param num_bytes Number of bytes in src to write.
[all …]
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/test/src/
H A Dble_gatt_write_test.c149 /* Send the pending ATT Prep Write Command. */ in ble_gatt_write_test_misc_long_good()
153 /* Receive Prep Write response. */ in ble_gatt_write_test_misc_long_good()
163 /* Verify execute write request sent. */ in ble_gatt_write_test_misc_long_good()
166 /* Receive Exec Write response. */ in ble_gatt_write_test_misc_long_good()
205 /* Send the pending ATT Prep Write Command. */ in ble_gatt_write_test_misc_long_bad()
209 /* Receive Prep Write response. */ in ble_gatt_write_test_misc_long_bad()
334 /* Send the pending ATT Prep Write Command. */ in ble_gatt_write_test_misc_reliable_good()
338 /* Receive Prep Write response. */ in ble_gatt_write_test_misc_reliable_good()
352 /* Verify execute write request sent. */ in ble_gatt_write_test_misc_reliable_good()
355 /* Receive Exec Write response. */ in ble_gatt_write_test_misc_reliable_good()
[all …]
/nrf52832-nimble/rt-thread/components/drivers/spi/sfud/src/
H A Dsfud.c264 /* SPI write read function must be initialize */ in hardware_init()
281 /* only 1 byte or 256 bytes write mode for SFDP */ in hardware_init()
351 /* I found when the flash write mode is supported AAI mode. The flash all blocks is protected, in hardware_init()
352 * so need change the flash status to unprotected before write and erase operate. */ in hardware_init()
457 /* set the flash write enable */ in sfud_chip_erase()
464 … /* dual-buffer write, like AT45DB series flash chip erase operate is different for other flash */ in sfud_chip_erase()
480 /* set the flash write disable */ in sfud_chip_erase()
544 /* set the flash write enable */
581 /* set the flash write disable */
592 * write flash data (no erase operate) for write 1 to 256 bytes per page mode or byte write mode
[all …]
/nrf52832-nimble/rt-thread/libcpu/arm/am335x/
H A Dmmu.h33 #define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */
34 #define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */
35 #define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
36 #define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
/nrf52832-nimble/rt-thread/libcpu/arm/arm926/
H A Dmmu.h34 #define RW_CB (AP_RW|DOMAIN0|CB|DESC_SEC) /* Read/Write, cache, write back */
35 #define RW_CNB (AP_RW|DOMAIN0|CNB|DESC_SEC) /* Read/Write, cache, write through */
36 #define RW_NCNB (AP_RW|DOMAIN0|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
37 #define RW_FAULT (AP_RW|DOMAIN1|NCNB|DESC_SEC) /* Read/Write without cache and write buffer */
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/pts/
H A Dpts-gatt.txt17 b write conn=<handle> long=1 attr=<val_handle> value=<xx:...>
225 b write no_rsp=1 conn=<handle> attr=<val_handle> value=<val>
229 b write conn=<handle> attr=<val_handle> value=<val>
232 b write conn=<handle> attr=<val_handle> value=<val>
235 b write conn=<handle> attr=<val_handle> value=<val>
238 b write conn=<handle> attr=<val_handle> value=<val>
241 b write conn=<handle> attr=<val_handle> value=<val>
244 b write conn=<handle> attr=<val_handle> value=<val>
247 b write long=1 conn=<handle> attr=<val_handle> value=<val>
250 b write long=1 conn=<handle> attr=<val_handle> value=<val>
[all …]
/nrf52832-nimble/rt-thread/components/dfs/filesystems/jffs2/cyg/compress/src/
H A DMake_vms.com13 $ SAY = "WRITE SYS$OUTPUT"
65 $ write sys$output "Compiling Zlib sources ..."
93 $ write sys$output "Building Zlib ..."
95 $ write sys$output "Building example..."
101 $ write sys$output "Building minigzip..."
119 $ write sys$output "Creating libzshr.exe"
124 $ write optf "case_sensitive=YES"
129 $ write sys$output "Zlib build completed"
132 $ write sys$output "C compiler required to build ''name'"
136 $ write sys$output "Exiting..."
[all …]
/nrf52832-nimble/rt-thread/examples/file/
H A Dreadwrite.c25 rt_kprintf("open file for write failed\n"); in readwrite()
36 length = write(fd, test_data, sizeof(test_data)); in readwrite()
39 rt_kprintf("write data failed\n"); in readwrite()
51 rt_kprintf("open file for append write failed\n"); in readwrite()
55 length = write(fd, test_data, sizeof(test_data)); in readwrite()
58 rt_kprintf("append write data failed\n"); in readwrite()
116 rt_kprintf("read/write done.\n"); in readwrite()
122 FINSH_FUNCTION_EXPORT(readwrite, perform file read and write test);
H A Dwritespeed.c39 /* prepare write data */ in writespeed()
50 length = write(fd, buff_ptr, block_size); in writespeed()
53 rt_kprintf("write failed\n"); in writespeed()
65 /* calculate write speed */ in writespeed()
66 rt_kprintf("File write speed: %d byte/s\n", total_length / tick * RT_TICK_PER_SECOND); in writespeed()
71 FINSH_FUNCTION_EXPORT(writespeed, perform file write test);
/nrf52832-nimble/rt-thread/libcpu/arm/zynq7000/
H A Dmmu.c35 /* Read/Write, cache, write back */
37 /* Read/Write, cache, write through */
39 /* Read/Write, device type */
41 /* Read/Write strongly ordered type */
43 /* Read/Write without cache and write buffer, no execute */
45 /* Read/Write without cache and write buffer */
/nrf52832-nimble/rt-thread/examples/test/
H A Dfs_test.c52 rt_kprintf("fsrw1 open file for write failed\n"); in fsrw1_thread_entry()
58 /* plan write data */ in fsrw1_thread_entry()
64 /* write 8000 times */ in fsrw1_thread_entry()
68 length = write(fd, write_data1, fsrw1_data_len); in fsrw1_thread_entry()
71 rt_kprintf("fsrw1 write data failed\n"); in fsrw1_thread_entry()
160 rt_kprintf("fsrw2 open file for write failed\n"); in fsrw2_thread_entry()
166 /* plan write data */ in fsrw2_thread_entry()
172 /* write 5000 times */ in fsrw2_thread_entry()
176 length = write(fd, write_data2, fsrw2_data_len); in fsrw2_thread_entry()
179 rt_kprintf("fsrw2 write data failed\n"); in fsrw2_thread_entry()
[all …]
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/
H A Dsyscfg.yml235 Enables the Write Without Response GATT procedure. (0/1)
239 Enables the Signed Write Without Response GATT procedure. (0/1)
243 Enables the Write Characteristic Value GATT procedure. (0/1)
247 Enables the Write Long Characteristic Values GATT procedure. (0/1)
271 GATT Reliable Write procedure. (0/1)
320 Enables processing of incoming Write Request ATT commands. (0/1)
324 Enables processing of incoming Write Command ATT commands. (0/1)
328 Enables processing of incoming Signed Write Command ATT commands.
333 Enables processing of incoming Prepare Write Request and Execute
334 Write Request ATT commands. (0/1)
[all …]

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