1#include "cpuconfig.h" 2 3//#include "iorx62n.h" 4 EXTERN _rt_thread_switch_interrupt_flag 5 EXTERN _rt_interrupt_from_thread 6 EXTERN _rt_interrupt_to_thread 7 EXTERN _rt_hw_hard_fault_exception 8 EXTERN _rt_hw_cpu_shutdown 9 10 /*PUBLIC _Interrupt_SWINT*/ 11 PUBLIC ___interrupt_27 12 PUBLIC ___interrupt_0 13 RSEG CODE:CODE(4) 14 15;/* 16; * rt_base_t rt_hw_interrupt_disable(); 17; */ 18 PUBLIC _rt_hw_interrupt_disable 19_rt_hw_interrupt_disable: 20 MVTIPL #MAX_SYSCALL_INTERRUPT_PRIORITY 21 RTS 22 23;/* 24; * void rt_hw_interrupt_enable(rt_base_t level); 25; */ 26 PUBLIC _rt_hw_interrupt_enable 27_rt_hw_interrupt_enable: 28 MVTIPL #KERNEL_INTERRUPT_PRIORITY 29 RTS 30 31; r0 --> swith from thread stack 32; r1 --> swith to thread stack 33; psr, pc, lr, r12, r3, r2, r1, r0 are pushed into [from] stack 34___interrupt_27: 35 36/* enable interrupt because enter the interrupt,it will be clear */ 37 SETPSW I 38 MVTIPL #MAX_SYSCALL_INTERRUPT_PRIORITY 39 PUSH.L R15 40 41/* justage if it should switch thread*/ 42 MOV.L #_rt_thread_switch_interrupt_flag, R15 43 MOV.L [ R15 ], R15 44 CMP #0, R15 45 BEQ notask_exit 46/* clean the flag*/ 47 MOV.L #_rt_thread_switch_interrupt_flag, R15 48 MOV.L #0, [ R15 ] 49 50/* justage if it should save the register*/ 51 MOV.L #_rt_interrupt_from_thread, R15 52 MOV.L [ R15 ], R15 53 CMP #0, R15 54 BEQ need_modify_isp 55 /*save register*/ 56 MVFC USP, R15 57 SUB #12, R15 58 MVTC R15, USP 59 MOV.L [ R0 ], [ R15 ] ;PSW 60 MOV.L 4[ R0 ], 4[ R15 ];PC 61 MOV.L 8[ R0 ], 8[ R15 ] ;R15 62 ADD #12, R0 63 SETPSW U 64 PUSHM R1-R14 65 MVFC FPSW, R15 66 PUSH.L R15 67 MVFACHI R15 68 PUSH.L R15 69 MVFACMI R15 ; Middle order word. 70 SHLL #16, R15 ; Shifted left as it is restored to the low orde r w 71 PUSH.L R15 72 /*save thread stack pointer and switch to new thread*/ 73 MOV.L #_rt_interrupt_from_thread, R15 74 MOV.L [ R15 ], R15 75 MOV.L R0, [ R15 ] 76 BRA swtich_to_thread 77need_modify_isp: 78 MVFC ISP, R15 79 ADD #12, R15 80 MVTC R15, ISP 81swtich_to_thread: 82 SETPSW U 83 MOV.L #_rt_interrupt_to_thread, R15 84 MOV.L [ R15 ], R15 85 MOV.L [ R15 ], R0 86 POP R15 87 MVTACLO R15 88 POP R15 89 MVTACHI R15 90 POP R15 91 MVTC R15, FPSW 92 POPM R1-R15 93 BRA pendsv_exit 94notask_exit: 95 POP R15 96pendsv_exit: 97 98 MVTIPL #KERNEL_INTERRUPT_PRIORITY 99 RTE 100 NOP 101 NOP 102/*exception interrupt*/ 103___interrupt_0: 104 PUSH.L R15 105 /*save the register for infomation*/ 106 MVFC USP, R15 107 SUB #12, R15 108 MVTC R15, USP 109 MOV.L [ R0 ], [ R15 ] ;PSW 110 MOV.L 4[ R0 ], 4[ R15 ];PC 111 MOV.L 8[ R0 ], 8[ R15 ] ;R15 112 ADD #12, R0 113 SETPSW U 114 PUSHM R1-R14 115 MVFC FPSW, R15 116 PUSH.L R15 117 MVFACHI R15 118 PUSH.L R15 119 MVFACMI R15 ; Middle order word. 120 SHLL #16, R15 ; Shifted left as it is restored to the low orde r w 121 PUSH.L R15 122 /*save the exception infomation add R1 as a parameter of 123 * function rt_hw_hard_fault_exception 124 */ 125 MOV.L R0, R1 126 BRA _rt_hw_hard_fault_exception 127 BRA _rt_hw_cpu_shutdown 128 RTE 129 NOP 130 NOP 131 END 132 133