1 /*
2 * Copyright (C) 2016 The Android Open Source Project
3 *
4 * Licensed under the Apache License, Version 2.0 (the "License");
5 * you may not use this file except in compliance with the License.
6 * You may obtain a copy of the License at
7 *
8 * http://www.apache.org/licenses/LICENSE-2.0
9 *
10 * Unless required by applicable law or agreed to in writing, software
11 * distributed under the License is distributed on an "AS IS" BASIS,
12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13 * See the License for the specific language governing permissions and
14 * limitations under the License.
15 */
16
17 #include <elf.h>
18
19 #include <gtest/gtest.h>
20
21 #include <memory>
22 #include <vector>
23
24 #include <unwindstack/MachineArm.h>
25 #include <unwindstack/RegsArm.h>
26
27 #include "ElfInterfaceArm.h"
28
29 #include "ElfFake.h"
30 #include "utils/MemoryFake.h"
31
32 namespace unwindstack {
33
34 class ElfInterfaceArmTest : public ::testing::Test {
35 protected:
SetUp()36 void SetUp() override {
37 fake_memory_ = new MemoryFake;
38 memory_.reset(fake_memory_);
39 process_memory_.Clear();
40 }
41
42 std::shared_ptr<Memory> memory_;
43 MemoryFake* fake_memory_;
44 MemoryFake process_memory_;
45 };
46
TEST_F(ElfInterfaceArmTest,GetPrel32Addr)47 TEST_F(ElfInterfaceArmTest, GetPrel32Addr) {
48 ElfInterfaceArmFake interface(memory_);
49 fake_memory_->SetData32(0x1000, 0x230000);
50
51 uint32_t value;
52 ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
53 ASSERT_EQ(0x231000U, value);
54
55 fake_memory_->SetData32(0x1000, 0x80001000);
56 ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
57 ASSERT_EQ(0x2000U, value);
58
59 fake_memory_->SetData32(0x1000, 0x70001000);
60 ASSERT_TRUE(interface.GetPrel31Addr(0x1000, &value));
61 ASSERT_EQ(0xf0002000U, value);
62 }
63
TEST_F(ElfInterfaceArmTest,FindEntry_start_zero)64 TEST_F(ElfInterfaceArmTest, FindEntry_start_zero) {
65 ElfInterfaceArmFake interface(memory_);
66 interface.FakeSetStartOffset(0);
67 interface.FakeSetTotalEntries(10);
68
69 uint64_t entry_offset;
70 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
71 }
72
TEST_F(ElfInterfaceArmTest,FindEntry_no_entries)73 TEST_F(ElfInterfaceArmTest, FindEntry_no_entries) {
74 ElfInterfaceArmFake interface(memory_);
75 interface.FakeSetStartOffset(0x100);
76 interface.FakeSetTotalEntries(0);
77
78 uint64_t entry_offset;
79 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
80 }
81
TEST_F(ElfInterfaceArmTest,FindEntry_no_valid_memory)82 TEST_F(ElfInterfaceArmTest, FindEntry_no_valid_memory) {
83 ElfInterfaceArmFake interface(memory_);
84 interface.FakeSetStartOffset(0x100);
85 interface.FakeSetTotalEntries(2);
86
87 uint64_t entry_offset;
88 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
89 }
90
TEST_F(ElfInterfaceArmTest,FindEntry_ip_before_first)91 TEST_F(ElfInterfaceArmTest, FindEntry_ip_before_first) {
92 ElfInterfaceArmFake interface(memory_);
93 interface.FakeSetStartOffset(0x1000);
94 interface.FakeSetTotalEntries(1);
95 fake_memory_->SetData32(0x1000, 0x6000);
96
97 uint64_t entry_offset;
98 ASSERT_FALSE(interface.FindEntry(0x1000, &entry_offset));
99 }
100
TEST_F(ElfInterfaceArmTest,FindEntry_single_entry_negative_value)101 TEST_F(ElfInterfaceArmTest, FindEntry_single_entry_negative_value) {
102 ElfInterfaceArmFake interface(memory_);
103 interface.FakeSetStartOffset(0x8000);
104 interface.FakeSetTotalEntries(1);
105 fake_memory_->SetData32(0x8000, 0x7fffff00);
106
107 uint64_t entry_offset;
108 ASSERT_TRUE(interface.FindEntry(0x7ff0, &entry_offset));
109 ASSERT_EQ(0x8000U, entry_offset);
110 }
111
TEST_F(ElfInterfaceArmTest,FindEntry_two_entries)112 TEST_F(ElfInterfaceArmTest, FindEntry_two_entries) {
113 ElfInterfaceArmFake interface(memory_);
114 interface.FakeSetStartOffset(0x1000);
115 interface.FakeSetTotalEntries(2);
116 fake_memory_->SetData32(0x1000, 0x6000);
117 fake_memory_->SetData32(0x1008, 0x7000);
118
119 uint64_t entry_offset;
120 ASSERT_TRUE(interface.FindEntry(0x7000, &entry_offset));
121 ASSERT_EQ(0x1000U, entry_offset);
122 }
123
TEST_F(ElfInterfaceArmTest,FindEntry_last_check_single_entry)124 TEST_F(ElfInterfaceArmTest, FindEntry_last_check_single_entry) {
125 ElfInterfaceArmFake interface(memory_);
126 interface.FakeSetStartOffset(0x1000);
127 interface.FakeSetTotalEntries(1);
128 fake_memory_->SetData32(0x1000, 0x6000);
129
130 uint64_t entry_offset;
131 ASSERT_TRUE(interface.FindEntry(0x7000, &entry_offset));
132 ASSERT_EQ(0x1000U, entry_offset);
133
134 // To guarantee that we are using the cache on the second run,
135 // set the memory to a different value.
136 fake_memory_->SetData32(0x1000, 0x8000);
137 ASSERT_TRUE(interface.FindEntry(0x7004, &entry_offset));
138 ASSERT_EQ(0x1000U, entry_offset);
139 }
140
TEST_F(ElfInterfaceArmTest,FindEntry_last_check_multiple_entries)141 TEST_F(ElfInterfaceArmTest, FindEntry_last_check_multiple_entries) {
142 ElfInterfaceArmFake interface(memory_);
143 interface.FakeSetStartOffset(0x1000);
144 interface.FakeSetTotalEntries(2);
145 fake_memory_->SetData32(0x1000, 0x6000);
146 fake_memory_->SetData32(0x1008, 0x8000);
147
148 uint64_t entry_offset;
149 ASSERT_TRUE(interface.FindEntry(0x9008, &entry_offset));
150 ASSERT_EQ(0x1008U, entry_offset);
151
152 // To guarantee that we are using the cache on the second run,
153 // set the memory to a different value.
154 fake_memory_->SetData32(0x1000, 0x16000);
155 fake_memory_->SetData32(0x1008, 0x18000);
156 ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
157 ASSERT_EQ(0x1008U, entry_offset);
158 }
159
TEST_F(ElfInterfaceArmTest,FindEntry_multiple_entries_even)160 TEST_F(ElfInterfaceArmTest, FindEntry_multiple_entries_even) {
161 ElfInterfaceArmFake interface(memory_);
162 interface.FakeSetStartOffset(0x1000);
163 interface.FakeSetTotalEntries(4);
164 fake_memory_->SetData32(0x1000, 0x6000);
165 fake_memory_->SetData32(0x1008, 0x7000);
166 fake_memory_->SetData32(0x1010, 0x8000);
167 fake_memory_->SetData32(0x1018, 0x9000);
168
169 uint64_t entry_offset;
170 ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
171 ASSERT_EQ(0x1010U, entry_offset);
172
173 // To guarantee that we are using the cache on the second run,
174 // set the memory to a different value.
175 fake_memory_->SetData32(0x1000, 0x16000);
176 fake_memory_->SetData32(0x1008, 0x17000);
177 fake_memory_->SetData32(0x1010, 0x18000);
178 fake_memory_->SetData32(0x1018, 0x19000);
179 ASSERT_TRUE(interface.FindEntry(0x9100, &entry_offset));
180 ASSERT_EQ(0x1010U, entry_offset);
181 }
182
TEST_F(ElfInterfaceArmTest,FindEntry_multiple_entries_odd)183 TEST_F(ElfInterfaceArmTest, FindEntry_multiple_entries_odd) {
184 ElfInterfaceArmFake interface(memory_);
185 interface.FakeSetStartOffset(0x1000);
186 interface.FakeSetTotalEntries(5);
187 fake_memory_->SetData32(0x1000, 0x5000);
188 fake_memory_->SetData32(0x1008, 0x6000);
189 fake_memory_->SetData32(0x1010, 0x7000);
190 fake_memory_->SetData32(0x1018, 0x8000);
191 fake_memory_->SetData32(0x1020, 0x9000);
192
193 uint64_t entry_offset;
194 ASSERT_TRUE(interface.FindEntry(0x8100, &entry_offset));
195 ASSERT_EQ(0x1010U, entry_offset);
196
197 // To guarantee that we are using the cache on the second run,
198 // set the memory to a different value.
199 fake_memory_->SetData32(0x1000, 0x15000);
200 fake_memory_->SetData32(0x1008, 0x16000);
201 fake_memory_->SetData32(0x1010, 0x17000);
202 fake_memory_->SetData32(0x1018, 0x18000);
203 fake_memory_->SetData32(0x1020, 0x19000);
204 ASSERT_TRUE(interface.FindEntry(0x8100, &entry_offset));
205 ASSERT_EQ(0x1010U, entry_offset);
206 }
207
TEST_F(ElfInterfaceArmTest,iterate)208 TEST_F(ElfInterfaceArmTest, iterate) {
209 ElfInterfaceArmFake interface(memory_);
210 interface.FakeSetStartOffset(0x1000);
211 interface.FakeSetTotalEntries(5);
212 fake_memory_->SetData32(0x1000, 0x5000);
213 fake_memory_->SetData32(0x1008, 0x6000);
214 fake_memory_->SetData32(0x1010, 0x7000);
215 fake_memory_->SetData32(0x1018, 0x8000);
216 fake_memory_->SetData32(0x1020, 0x9000);
217
218 std::vector<uint32_t> entries;
219 for (auto addr : interface) {
220 entries.push_back(addr);
221 }
222 ASSERT_EQ(5U, entries.size());
223 ASSERT_EQ(0x6000U, entries[0]);
224 ASSERT_EQ(0x7008U, entries[1]);
225 ASSERT_EQ(0x8010U, entries[2]);
226 ASSERT_EQ(0x9018U, entries[3]);
227 ASSERT_EQ(0xa020U, entries[4]);
228
229 // Make sure the iterate cached the entries.
230 fake_memory_->SetData32(0x1000, 0x11000);
231 fake_memory_->SetData32(0x1008, 0x12000);
232 fake_memory_->SetData32(0x1010, 0x13000);
233 fake_memory_->SetData32(0x1018, 0x14000);
234 fake_memory_->SetData32(0x1020, 0x15000);
235
236 entries.clear();
237 for (auto addr : interface) {
238 entries.push_back(addr);
239 }
240 ASSERT_EQ(5U, entries.size());
241 ASSERT_EQ(0x6000U, entries[0]);
242 ASSERT_EQ(0x7008U, entries[1]);
243 ASSERT_EQ(0x8010U, entries[2]);
244 ASSERT_EQ(0x9018U, entries[3]);
245 ASSERT_EQ(0xa020U, entries[4]);
246 }
247
TEST_F(ElfInterfaceArmTest,HandleUnknownType_arm_exidx)248 TEST_F(ElfInterfaceArmTest, HandleUnknownType_arm_exidx) {
249 ElfInterfaceArmFake interface(memory_);
250
251 interface.FakeSetStartOffset(0x1000);
252 interface.FakeSetTotalEntries(100);
253
254 // Verify that if the type is not the one we want, we don't set the values.
255 interface.HandleUnknownType(0x70000000, 0x2000, 320);
256 ASSERT_EQ(0x1000U, interface.start_offset());
257 ASSERT_EQ(100U, interface.total_entries());
258
259 // Everything is correct and present.
260 interface.HandleUnknownType(0x70000001, 0x2000, 320);
261 ASSERT_EQ(0x2000U, interface.start_offset());
262 ASSERT_EQ(40U, interface.total_entries());
263 }
264
TEST_F(ElfInterfaceArmTest,StepExidx)265 TEST_F(ElfInterfaceArmTest, StepExidx) {
266 ElfInterfaceArmFake interface(memory_);
267
268 // FindEntry fails.
269 bool finished;
270 ASSERT_FALSE(interface.StepExidx(0x7000, nullptr, nullptr, &finished));
271 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
272
273 // ExtractEntry should fail.
274 interface.FakeSetStartOffset(0x1000);
275 interface.FakeSetTotalEntries(2);
276 fake_memory_->SetData32(0x1000, 0x6000);
277 fake_memory_->SetData32(0x1008, 0x8000);
278
279 RegsArm regs;
280 regs[ARM_REG_SP] = 0x1000;
281 regs[ARM_REG_LR] = 0x20000;
282 regs.set_sp(regs[ARM_REG_SP]);
283 regs.set_pc(0x1234);
284 ASSERT_FALSE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
285 EXPECT_EQ(ERROR_MEMORY_INVALID, interface.LastErrorCode());
286 EXPECT_EQ(0x1004U, interface.LastErrorAddress());
287
288 // Eval should fail.
289 fake_memory_->SetData32(0x1004, 0x81000000);
290 ASSERT_FALSE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
291 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
292
293 // Everything should pass.
294 fake_memory_->SetData32(0x1004, 0x80b0b0b0);
295 ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
296 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
297 ASSERT_FALSE(finished);
298 ASSERT_EQ(0x1000U, regs.sp());
299 ASSERT_EQ(0x1000U, regs[ARM_REG_SP]);
300 ASSERT_EQ(0x20000U, regs.pc());
301 ASSERT_EQ(0x20000U, regs[ARM_REG_PC]);
302
303 // Load bias is non-zero.
304 interface.set_load_bias(0x1000);
305 ASSERT_TRUE(interface.StepExidx(0x8000, ®s, &process_memory_, &finished));
306 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
307
308 // Pc too small.
309 interface.set_load_bias(0x9000);
310 ASSERT_FALSE(interface.StepExidx(0x8000, ®s, &process_memory_, &finished));
311 EXPECT_EQ(ERROR_UNWIND_INFO, interface.LastErrorCode());
312 }
313
TEST_F(ElfInterfaceArmTest,StepExidx_pc_set)314 TEST_F(ElfInterfaceArmTest, StepExidx_pc_set) {
315 ElfInterfaceArmFake interface(memory_);
316
317 interface.FakeSetStartOffset(0x1000);
318 interface.FakeSetTotalEntries(2);
319 fake_memory_->SetData32(0x1000, 0x6000);
320 fake_memory_->SetData32(0x1004, 0x808800b0);
321 fake_memory_->SetData32(0x1008, 0x8000);
322 process_memory_.SetData32(0x10000, 0x10);
323
324 RegsArm regs;
325 regs[ARM_REG_SP] = 0x10000;
326 regs[ARM_REG_LR] = 0x20000;
327 regs.set_sp(regs[ARM_REG_SP]);
328 regs.set_pc(0x1234);
329
330 // Everything should pass.
331 bool finished;
332 ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
333 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
334 ASSERT_FALSE(finished);
335 ASSERT_EQ(0x10004U, regs.sp());
336 ASSERT_EQ(0x10004U, regs[ARM_REG_SP]);
337 ASSERT_EQ(0x10U, regs.pc());
338 ASSERT_EQ(0x10U, regs[ARM_REG_PC]);
339 }
340
TEST_F(ElfInterfaceArmTest,StepExidx_cant_unwind)341 TEST_F(ElfInterfaceArmTest, StepExidx_cant_unwind) {
342 ElfInterfaceArmFake interface(memory_);
343
344 interface.FakeSetStartOffset(0x1000);
345 interface.FakeSetTotalEntries(1);
346 fake_memory_->SetData32(0x1000, 0x6000);
347 fake_memory_->SetData32(0x1004, 1);
348
349 RegsArm regs;
350 regs[ARM_REG_SP] = 0x10000;
351 regs[ARM_REG_LR] = 0x20000;
352 regs.set_sp(regs[ARM_REG_SP]);
353 regs.set_pc(0x1234);
354
355 bool finished;
356 ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
357 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
358 ASSERT_TRUE(finished);
359 ASSERT_EQ(0x10000U, regs.sp());
360 ASSERT_EQ(0x10000U, regs[ARM_REG_SP]);
361 ASSERT_EQ(0x1234U, regs.pc());
362 }
363
TEST_F(ElfInterfaceArmTest,StepExidx_refuse_unwind)364 TEST_F(ElfInterfaceArmTest, StepExidx_refuse_unwind) {
365 ElfInterfaceArmFake interface(memory_);
366
367 interface.FakeSetStartOffset(0x1000);
368 interface.FakeSetTotalEntries(1);
369 fake_memory_->SetData32(0x1000, 0x6000);
370 fake_memory_->SetData32(0x1004, 0x808000b0);
371
372 RegsArm regs;
373 regs[ARM_REG_SP] = 0x10000;
374 regs[ARM_REG_LR] = 0x20000;
375 regs.set_sp(regs[ARM_REG_SP]);
376 regs.set_pc(0x1234);
377
378 bool finished;
379 ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
380 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
381 ASSERT_TRUE(finished);
382 ASSERT_EQ(0x10000U, regs.sp());
383 ASSERT_EQ(0x10000U, regs[ARM_REG_SP]);
384 ASSERT_EQ(0x1234U, regs.pc());
385 }
386
TEST_F(ElfInterfaceArmTest,StepExidx_pc_zero)387 TEST_F(ElfInterfaceArmTest, StepExidx_pc_zero) {
388 ElfInterfaceArmFake interface(memory_);
389
390 interface.FakeSetStartOffset(0x1000);
391 interface.FakeSetTotalEntries(1);
392 fake_memory_->SetData32(0x1000, 0x6000);
393 // Set the pc using a pop r15 command.
394 fake_memory_->SetData32(0x1004, 0x808800b0);
395
396 // pc value of zero.
397 process_memory_.SetData32(0x10000, 0);
398
399 RegsArm regs;
400 regs[ARM_REG_SP] = 0x10000;
401 regs[ARM_REG_LR] = 0x20000;
402 regs.set_sp(regs[ARM_REG_SP]);
403 regs.set_pc(0x1234);
404
405 bool finished;
406 ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
407 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
408 ASSERT_TRUE(finished);
409 ASSERT_EQ(0U, regs.pc());
410
411 // Now set the pc from the lr register (pop r14).
412 fake_memory_->SetData32(0x1004, 0x808400b0);
413
414 regs[ARM_REG_SP] = 0x10000;
415 regs[ARM_REG_LR] = 0x20000;
416 regs.set_sp(regs[ARM_REG_SP]);
417 regs.set_pc(0x1234);
418
419 ASSERT_TRUE(interface.StepExidx(0x7000, ®s, &process_memory_, &finished));
420 EXPECT_EQ(ERROR_NONE, interface.LastErrorCode());
421 ASSERT_TRUE(finished);
422 ASSERT_EQ(0U, regs.pc());
423 }
424
425 } // namespace unwindstack
426