1 //===- llvm/CodeGen/SelectionDAGNodes.h - SelectionDAG Nodes ----*- C++ -*-===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file declares the SDNode class and derived classes, which are used to 10 // represent the nodes and operations present in a SelectionDAG. These nodes 11 // and operations are machine code level operations, with some similarities to 12 // the GCC RTL representation. 13 // 14 // Clients should include the SelectionDAG.h file instead of this file directly. 15 // 16 //===----------------------------------------------------------------------===// 17 18 #ifndef LLVM_CODEGEN_SELECTIONDAGNODES_H 19 #define LLVM_CODEGEN_SELECTIONDAGNODES_H 20 21 #include "llvm/ADT/APFloat.h" 22 #include "llvm/ADT/ArrayRef.h" 23 #include "llvm/ADT/BitVector.h" 24 #include "llvm/ADT/FoldingSet.h" 25 #include "llvm/ADT/GraphTraits.h" 26 #include "llvm/ADT/SmallPtrSet.h" 27 #include "llvm/ADT/SmallVector.h" 28 #include "llvm/ADT/ilist_node.h" 29 #include "llvm/ADT/iterator.h" 30 #include "llvm/ADT/iterator_range.h" 31 #include "llvm/CodeGen/ISDOpcodes.h" 32 #include "llvm/CodeGen/MachineMemOperand.h" 33 #include "llvm/CodeGen/Register.h" 34 #include "llvm/CodeGen/ValueTypes.h" 35 #include "llvm/CodeGenTypes/MachineValueType.h" 36 #include "llvm/IR/Constants.h" 37 #include "llvm/IR/DebugLoc.h" 38 #include "llvm/IR/Instruction.h" 39 #include "llvm/IR/Instructions.h" 40 #include "llvm/IR/Metadata.h" 41 #include "llvm/IR/Operator.h" 42 #include "llvm/Support/AlignOf.h" 43 #include "llvm/Support/AtomicOrdering.h" 44 #include "llvm/Support/Casting.h" 45 #include "llvm/Support/ErrorHandling.h" 46 #include "llvm/Support/TypeSize.h" 47 #include <algorithm> 48 #include <cassert> 49 #include <climits> 50 #include <cstddef> 51 #include <cstdint> 52 #include <cstring> 53 #include <iterator> 54 #include <string> 55 #include <tuple> 56 #include <utility> 57 58 namespace llvm { 59 60 class APInt; 61 class Constant; 62 class GlobalValue; 63 class MachineBasicBlock; 64 class MachineConstantPoolValue; 65 class MCSymbol; 66 class raw_ostream; 67 class SDNode; 68 class SelectionDAG; 69 class Type; 70 class Value; 71 72 void checkForCycles(const SDNode *N, const SelectionDAG *DAG = nullptr, 73 bool force = false); 74 75 /// This represents a list of ValueType's that has been intern'd by 76 /// a SelectionDAG. Instances of this simple value class are returned by 77 /// SelectionDAG::getVTList(...). 78 /// 79 struct SDVTList { 80 const EVT *VTs; 81 unsigned int NumVTs; 82 }; 83 84 namespace ISD { 85 86 /// Node predicates 87 88 /// If N is a BUILD_VECTOR or SPLAT_VECTOR node whose elements are all the 89 /// same constant or undefined, return true and return the constant value in 90 /// \p SplatValue. 91 bool isConstantSplatVector(const SDNode *N, APInt &SplatValue); 92 93 /// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where 94 /// all of the elements are ~0 or undef. If \p BuildVectorOnly is set to 95 /// true, it only checks BUILD_VECTOR. 96 bool isConstantSplatVectorAllOnes(const SDNode *N, 97 bool BuildVectorOnly = false); 98 99 /// Return true if the specified node is a BUILD_VECTOR or SPLAT_VECTOR where 100 /// all of the elements are 0 or undef. If \p BuildVectorOnly is set to true, it 101 /// only checks BUILD_VECTOR. 102 bool isConstantSplatVectorAllZeros(const SDNode *N, 103 bool BuildVectorOnly = false); 104 105 /// Return true if the specified node is a BUILD_VECTOR where all of the 106 /// elements are ~0 or undef. 107 bool isBuildVectorAllOnes(const SDNode *N); 108 109 /// Return true if the specified node is a BUILD_VECTOR where all of the 110 /// elements are 0 or undef. 111 bool isBuildVectorAllZeros(const SDNode *N); 112 113 /// Return true if the specified node is a BUILD_VECTOR node of all 114 /// ConstantSDNode or undef. 115 bool isBuildVectorOfConstantSDNodes(const SDNode *N); 116 117 /// Return true if the specified node is a BUILD_VECTOR node of all 118 /// ConstantFPSDNode or undef. 119 bool isBuildVectorOfConstantFPSDNodes(const SDNode *N); 120 121 /// Returns true if the specified node is a vector where all elements can 122 /// be truncated to the specified element size without a loss in meaning. 123 bool isVectorShrinkable(const SDNode *N, unsigned NewEltSize, bool Signed); 124 125 /// Return true if the node has at least one operand and all operands of the 126 /// specified node are ISD::UNDEF. 127 bool allOperandsUndef(const SDNode *N); 128 129 /// Return true if the specified node is FREEZE(UNDEF). 130 bool isFreezeUndef(const SDNode *N); 131 132 } // end namespace ISD 133 134 //===----------------------------------------------------------------------===// 135 /// Unlike LLVM values, Selection DAG nodes may return multiple 136 /// values as the result of a computation. Many nodes return multiple values, 137 /// from loads (which define a token and a return value) to ADDC (which returns 138 /// a result and a carry value), to calls (which may return an arbitrary number 139 /// of values). 140 /// 141 /// As such, each use of a SelectionDAG computation must indicate the node that 142 /// computes it as well as which return value to use from that node. This pair 143 /// of information is represented with the SDValue value type. 144 /// 145 class SDValue { 146 friend struct DenseMapInfo<SDValue>; 147 148 SDNode *Node = nullptr; // The node defining the value we are using. 149 unsigned ResNo = 0; // Which return value of the node we are using. 150 151 public: 152 SDValue() = default; 153 SDValue(SDNode *node, unsigned resno); 154 155 /// get the index which selects a specific result in the SDNode 156 unsigned getResNo() const { return ResNo; } 157 158 /// get the SDNode which holds the desired result 159 SDNode *getNode() const { return Node; } 160 161 /// set the SDNode 162 void setNode(SDNode *N) { Node = N; } 163 164 inline SDNode *operator->() const { return Node; } 165 166 bool operator==(const SDValue &O) const { 167 return Node == O.Node && ResNo == O.ResNo; 168 } 169 bool operator!=(const SDValue &O) const { 170 return !operator==(O); 171 } 172 bool operator<(const SDValue &O) const { 173 return std::tie(Node, ResNo) < std::tie(O.Node, O.ResNo); 174 } 175 explicit operator bool() const { 176 return Node != nullptr; 177 } 178 179 SDValue getValue(unsigned R) const { 180 return SDValue(Node, R); 181 } 182 183 /// Return true if this node is an operand of N. 184 bool isOperandOf(const SDNode *N) const; 185 186 /// Return the ValueType of the referenced return value. 187 inline EVT getValueType() const; 188 189 /// Return the simple ValueType of the referenced return value. 190 MVT getSimpleValueType() const { 191 return getValueType().getSimpleVT(); 192 } 193 194 /// Returns the size of the value in bits. 195 /// 196 /// If the value type is a scalable vector type, the scalable property will 197 /// be set and the runtime size will be a positive integer multiple of the 198 /// base size. 199 TypeSize getValueSizeInBits() const { 200 return getValueType().getSizeInBits(); 201 } 202 203 uint64_t getScalarValueSizeInBits() const { 204 return getValueType().getScalarType().getFixedSizeInBits(); 205 } 206 207 // Forwarding methods - These forward to the corresponding methods in SDNode. 208 inline unsigned getOpcode() const; 209 inline unsigned getNumOperands() const; 210 inline const SDValue &getOperand(unsigned i) const; 211 inline uint64_t getConstantOperandVal(unsigned i) const; 212 inline const APInt &getConstantOperandAPInt(unsigned i) const; 213 inline bool isTargetMemoryOpcode() const; 214 inline bool isTargetOpcode() const; 215 inline bool isMachineOpcode() const; 216 inline bool isUndef() const; 217 inline unsigned getMachineOpcode() const; 218 inline const DebugLoc &getDebugLoc() const; 219 inline void dump() const; 220 inline void dump(const SelectionDAG *G) const; 221 inline void dumpr() const; 222 inline void dumpr(const SelectionDAG *G) const; 223 224 /// Return true if this operand (which must be a chain) reaches the 225 /// specified operand without crossing any side-effecting instructions. 226 /// In practice, this looks through token factors and non-volatile loads. 227 /// In order to remain efficient, this only 228 /// looks a couple of nodes in, it does not do an exhaustive search. 229 bool reachesChainWithoutSideEffects(SDValue Dest, 230 unsigned Depth = 2) const; 231 232 /// Return true if there are no nodes using value ResNo of Node. 233 inline bool use_empty() const; 234 235 /// Return true if there is exactly one node using value ResNo of Node. 236 inline bool hasOneUse() const; 237 }; 238 239 template<> struct DenseMapInfo<SDValue> { 240 static inline SDValue getEmptyKey() { 241 SDValue V; 242 V.ResNo = -1U; 243 return V; 244 } 245 246 static inline SDValue getTombstoneKey() { 247 SDValue V; 248 V.ResNo = -2U; 249 return V; 250 } 251 252 static unsigned getHashValue(const SDValue &Val) { 253 return ((unsigned)((uintptr_t)Val.getNode() >> 4) ^ 254 (unsigned)((uintptr_t)Val.getNode() >> 9)) + Val.getResNo(); 255 } 256 257 static bool isEqual(const SDValue &LHS, const SDValue &RHS) { 258 return LHS == RHS; 259 } 260 }; 261 262 /// Allow casting operators to work directly on 263 /// SDValues as if they were SDNode*'s. 264 template<> struct simplify_type<SDValue> { 265 using SimpleType = SDNode *; 266 267 static SimpleType getSimplifiedValue(SDValue &Val) { 268 return Val.getNode(); 269 } 270 }; 271 template<> struct simplify_type<const SDValue> { 272 using SimpleType = /*const*/ SDNode *; 273 274 static SimpleType getSimplifiedValue(const SDValue &Val) { 275 return Val.getNode(); 276 } 277 }; 278 279 /// Represents a use of a SDNode. This class holds an SDValue, 280 /// which records the SDNode being used and the result number, a 281 /// pointer to the SDNode using the value, and Next and Prev pointers, 282 /// which link together all the uses of an SDNode. 283 /// 284 class SDUse { 285 /// Val - The value being used. 286 SDValue Val; 287 /// User - The user of this value. 288 SDNode *User = nullptr; 289 /// Prev, Next - Pointers to the uses list of the SDNode referred by 290 /// this operand. 291 SDUse **Prev = nullptr; 292 SDUse *Next = nullptr; 293 294 public: 295 SDUse() = default; 296 SDUse(const SDUse &U) = delete; 297 SDUse &operator=(const SDUse &) = delete; 298 299 /// Normally SDUse will just implicitly convert to an SDValue that it holds. 300 operator const SDValue&() const { return Val; } 301 302 /// If implicit conversion to SDValue doesn't work, the get() method returns 303 /// the SDValue. 304 const SDValue &get() const { return Val; } 305 306 /// This returns the SDNode that contains this Use. 307 SDNode *getUser() { return User; } 308 const SDNode *getUser() const { return User; } 309 310 /// Get the next SDUse in the use list. 311 SDUse *getNext() const { return Next; } 312 313 /// Convenience function for get().getNode(). 314 SDNode *getNode() const { return Val.getNode(); } 315 /// Convenience function for get().getResNo(). 316 unsigned getResNo() const { return Val.getResNo(); } 317 /// Convenience function for get().getValueType(). 318 EVT getValueType() const { return Val.getValueType(); } 319 320 /// Convenience function for get().operator== 321 bool operator==(const SDValue &V) const { 322 return Val == V; 323 } 324 325 /// Convenience function for get().operator!= 326 bool operator!=(const SDValue &V) const { 327 return Val != V; 328 } 329 330 /// Convenience function for get().operator< 331 bool operator<(const SDValue &V) const { 332 return Val < V; 333 } 334 335 private: 336 friend class SelectionDAG; 337 friend class SDNode; 338 // TODO: unfriend HandleSDNode once we fix its operand handling. 339 friend class HandleSDNode; 340 341 void setUser(SDNode *p) { User = p; } 342 343 /// Remove this use from its existing use list, assign it the 344 /// given value, and add it to the new value's node's use list. 345 inline void set(const SDValue &V); 346 /// Like set, but only supports initializing a newly-allocated 347 /// SDUse with a non-null value. 348 inline void setInitial(const SDValue &V); 349 /// Like set, but only sets the Node portion of the value, 350 /// leaving the ResNo portion unmodified. 351 inline void setNode(SDNode *N); 352 353 void addToList(SDUse **List) { 354 Next = *List; 355 if (Next) Next->Prev = &Next; 356 Prev = List; 357 *List = this; 358 } 359 360 void removeFromList() { 361 *Prev = Next; 362 if (Next) Next->Prev = Prev; 363 } 364 }; 365 366 /// simplify_type specializations - Allow casting operators to work directly on 367 /// SDValues as if they were SDNode*'s. 368 template<> struct simplify_type<SDUse> { 369 using SimpleType = SDNode *; 370 371 static SimpleType getSimplifiedValue(SDUse &Val) { 372 return Val.getNode(); 373 } 374 }; 375 376 /// These are IR-level optimization flags that may be propagated to SDNodes. 377 /// TODO: This data structure should be shared by the IR optimizer and the 378 /// the backend. 379 struct SDNodeFlags { 380 private: 381 bool NoUnsignedWrap : 1; 382 bool NoSignedWrap : 1; 383 bool Exact : 1; 384 bool Disjoint : 1; 385 bool NonNeg : 1; 386 bool NoNaNs : 1; 387 bool NoInfs : 1; 388 bool NoSignedZeros : 1; 389 bool AllowReciprocal : 1; 390 bool AllowContract : 1; 391 bool ApproximateFuncs : 1; 392 bool AllowReassociation : 1; 393 394 // We assume instructions do not raise floating-point exceptions by default, 395 // and only those marked explicitly may do so. We could choose to represent 396 // this via a positive "FPExcept" flags like on the MI level, but having a 397 // negative "NoFPExcept" flag here makes the flag intersection logic more 398 // straightforward. 399 bool NoFPExcept : 1; 400 // Instructions with attached 'unpredictable' metadata on IR level. 401 bool Unpredictable : 1; 402 403 public: 404 /// Default constructor turns off all optimization flags. 405 SDNodeFlags() 406 : NoUnsignedWrap(false), NoSignedWrap(false), Exact(false), 407 Disjoint(false), NonNeg(false), NoNaNs(false), NoInfs(false), 408 NoSignedZeros(false), AllowReciprocal(false), AllowContract(false), 409 ApproximateFuncs(false), AllowReassociation(false), NoFPExcept(false), 410 Unpredictable(false) {} 411 412 /// Propagate the fast-math-flags from an IR FPMathOperator. 413 void copyFMF(const FPMathOperator &FPMO) { 414 setNoNaNs(FPMO.hasNoNaNs()); 415 setNoInfs(FPMO.hasNoInfs()); 416 setNoSignedZeros(FPMO.hasNoSignedZeros()); 417 setAllowReciprocal(FPMO.hasAllowReciprocal()); 418 setAllowContract(FPMO.hasAllowContract()); 419 setApproximateFuncs(FPMO.hasApproxFunc()); 420 setAllowReassociation(FPMO.hasAllowReassoc()); 421 } 422 423 // These are mutators for each flag. 424 void setNoUnsignedWrap(bool b) { NoUnsignedWrap = b; } 425 void setNoSignedWrap(bool b) { NoSignedWrap = b; } 426 void setExact(bool b) { Exact = b; } 427 void setDisjoint(bool b) { Disjoint = b; } 428 void setNonNeg(bool b) { NonNeg = b; } 429 void setNoNaNs(bool b) { NoNaNs = b; } 430 void setNoInfs(bool b) { NoInfs = b; } 431 void setNoSignedZeros(bool b) { NoSignedZeros = b; } 432 void setAllowReciprocal(bool b) { AllowReciprocal = b; } 433 void setAllowContract(bool b) { AllowContract = b; } 434 void setApproximateFuncs(bool b) { ApproximateFuncs = b; } 435 void setAllowReassociation(bool b) { AllowReassociation = b; } 436 void setNoFPExcept(bool b) { NoFPExcept = b; } 437 void setUnpredictable(bool b) { Unpredictable = b; } 438 439 // These are accessors for each flag. 440 bool hasNoUnsignedWrap() const { return NoUnsignedWrap; } 441 bool hasNoSignedWrap() const { return NoSignedWrap; } 442 bool hasExact() const { return Exact; } 443 bool hasDisjoint() const { return Disjoint; } 444 bool hasNonNeg() const { return NonNeg; } 445 bool hasNoNaNs() const { return NoNaNs; } 446 bool hasNoInfs() const { return NoInfs; } 447 bool hasNoSignedZeros() const { return NoSignedZeros; } 448 bool hasAllowReciprocal() const { return AllowReciprocal; } 449 bool hasAllowContract() const { return AllowContract; } 450 bool hasApproximateFuncs() const { return ApproximateFuncs; } 451 bool hasAllowReassociation() const { return AllowReassociation; } 452 bool hasNoFPExcept() const { return NoFPExcept; } 453 bool hasUnpredictable() const { return Unpredictable; } 454 455 /// Clear any flags in this flag set that aren't also set in Flags. All 456 /// flags will be cleared if Flags are undefined. 457 void intersectWith(const SDNodeFlags Flags) { 458 NoUnsignedWrap &= Flags.NoUnsignedWrap; 459 NoSignedWrap &= Flags.NoSignedWrap; 460 Exact &= Flags.Exact; 461 Disjoint &= Flags.Disjoint; 462 NonNeg &= Flags.NonNeg; 463 NoNaNs &= Flags.NoNaNs; 464 NoInfs &= Flags.NoInfs; 465 NoSignedZeros &= Flags.NoSignedZeros; 466 AllowReciprocal &= Flags.AllowReciprocal; 467 AllowContract &= Flags.AllowContract; 468 ApproximateFuncs &= Flags.ApproximateFuncs; 469 AllowReassociation &= Flags.AllowReassociation; 470 NoFPExcept &= Flags.NoFPExcept; 471 Unpredictable &= Flags.Unpredictable; 472 } 473 }; 474 475 /// Represents one node in the SelectionDAG. 476 /// 477 class SDNode : public FoldingSetNode, public ilist_node<SDNode> { 478 private: 479 /// The operation that this node performs. 480 int32_t NodeType; 481 482 public: 483 /// Unique and persistent id per SDNode in the DAG. Used for debug printing. 484 /// We do not place that under `#if LLVM_ENABLE_ABI_BREAKING_CHECKS` 485 /// intentionally because it adds unneeded complexity without noticeable 486 /// benefits (see discussion with @thakis in D120714). 487 uint16_t PersistentId = 0xffff; 488 489 protected: 490 // We define a set of mini-helper classes to help us interpret the bits in our 491 // SubclassData. These are designed to fit within a uint16_t so they pack 492 // with PersistentId. 493 494 #if defined(_AIX) && (!defined(__GNUC__) || defined(__clang__)) 495 // Except for GCC; by default, AIX compilers store bit-fields in 4-byte words 496 // and give the `pack` pragma push semantics. 497 #define BEGIN_TWO_BYTE_PACK() _Pragma("pack(2)") 498 #define END_TWO_BYTE_PACK() _Pragma("pack(pop)") 499 #else 500 #define BEGIN_TWO_BYTE_PACK() 501 #define END_TWO_BYTE_PACK() 502 #endif 503 504 BEGIN_TWO_BYTE_PACK() 505 class SDNodeBitfields { 506 friend class SDNode; 507 friend class MemIntrinsicSDNode; 508 friend class MemSDNode; 509 friend class SelectionDAG; 510 511 uint16_t HasDebugValue : 1; 512 uint16_t IsMemIntrinsic : 1; 513 uint16_t IsDivergent : 1; 514 }; 515 enum { NumSDNodeBits = 3 }; 516 517 class ConstantSDNodeBitfields { 518 friend class ConstantSDNode; 519 520 uint16_t : NumSDNodeBits; 521 522 uint16_t IsOpaque : 1; 523 }; 524 525 class MemSDNodeBitfields { 526 friend class MemSDNode; 527 friend class MemIntrinsicSDNode; 528 friend class AtomicSDNode; 529 530 uint16_t : NumSDNodeBits; 531 532 uint16_t IsVolatile : 1; 533 uint16_t IsNonTemporal : 1; 534 uint16_t IsDereferenceable : 1; 535 uint16_t IsInvariant : 1; 536 }; 537 enum { NumMemSDNodeBits = NumSDNodeBits + 4 }; 538 539 class LSBaseSDNodeBitfields { 540 friend class LSBaseSDNode; 541 friend class VPBaseLoadStoreSDNode; 542 friend class MaskedLoadStoreSDNode; 543 friend class MaskedGatherScatterSDNode; 544 friend class VPGatherScatterSDNode; 545 546 uint16_t : NumMemSDNodeBits; 547 548 // This storage is shared between disparate class hierarchies to hold an 549 // enumeration specific to the class hierarchy in use. 550 // LSBaseSDNode => enum ISD::MemIndexedMode 551 // VPLoadStoreBaseSDNode => enum ISD::MemIndexedMode 552 // MaskedLoadStoreBaseSDNode => enum ISD::MemIndexedMode 553 // VPGatherScatterSDNode => enum ISD::MemIndexType 554 // MaskedGatherScatterSDNode => enum ISD::MemIndexType 555 uint16_t AddressingMode : 3; 556 }; 557 enum { NumLSBaseSDNodeBits = NumMemSDNodeBits + 3 }; 558 559 class LoadSDNodeBitfields { 560 friend class LoadSDNode; 561 friend class AtomicSDNode; 562 friend class VPLoadSDNode; 563 friend class VPStridedLoadSDNode; 564 friend class MaskedLoadSDNode; 565 friend class MaskedGatherSDNode; 566 friend class VPGatherSDNode; 567 568 uint16_t : NumLSBaseSDNodeBits; 569 570 uint16_t ExtTy : 2; // enum ISD::LoadExtType 571 uint16_t IsExpanding : 1; 572 }; 573 574 class StoreSDNodeBitfields { 575 friend class StoreSDNode; 576 friend class VPStoreSDNode; 577 friend class VPStridedStoreSDNode; 578 friend class MaskedStoreSDNode; 579 friend class MaskedScatterSDNode; 580 friend class VPScatterSDNode; 581 582 uint16_t : NumLSBaseSDNodeBits; 583 584 uint16_t IsTruncating : 1; 585 uint16_t IsCompressing : 1; 586 }; 587 588 union { 589 char RawSDNodeBits[sizeof(uint16_t)]; 590 SDNodeBitfields SDNodeBits; 591 ConstantSDNodeBitfields ConstantSDNodeBits; 592 MemSDNodeBitfields MemSDNodeBits; 593 LSBaseSDNodeBitfields LSBaseSDNodeBits; 594 LoadSDNodeBitfields LoadSDNodeBits; 595 StoreSDNodeBitfields StoreSDNodeBits; 596 }; 597 END_TWO_BYTE_PACK() 598 #undef BEGIN_TWO_BYTE_PACK 599 #undef END_TWO_BYTE_PACK 600 601 // RawSDNodeBits must cover the entirety of the union. This means that all of 602 // the union's members must have size <= RawSDNodeBits. We write the RHS as 603 // "2" instead of sizeof(RawSDNodeBits) because MSVC can't handle the latter. 604 static_assert(sizeof(SDNodeBitfields) <= 2, "field too wide"); 605 static_assert(sizeof(ConstantSDNodeBitfields) <= 2, "field too wide"); 606 static_assert(sizeof(MemSDNodeBitfields) <= 2, "field too wide"); 607 static_assert(sizeof(LSBaseSDNodeBitfields) <= 2, "field too wide"); 608 static_assert(sizeof(LoadSDNodeBitfields) <= 2, "field too wide"); 609 static_assert(sizeof(StoreSDNodeBitfields) <= 2, "field too wide"); 610 611 private: 612 friend class SelectionDAG; 613 // TODO: unfriend HandleSDNode once we fix its operand handling. 614 friend class HandleSDNode; 615 616 /// Unique id per SDNode in the DAG. 617 int NodeId = -1; 618 619 /// The values that are used by this operation. 620 SDUse *OperandList = nullptr; 621 622 /// The types of the values this node defines. SDNode's may 623 /// define multiple values simultaneously. 624 const EVT *ValueList; 625 626 /// List of uses for this SDNode. 627 SDUse *UseList = nullptr; 628 629 /// The number of entries in the Operand/Value list. 630 unsigned short NumOperands = 0; 631 unsigned short NumValues; 632 633 // The ordering of the SDNodes. It roughly corresponds to the ordering of the 634 // original LLVM instructions. 635 // This is used for turning off scheduling, because we'll forgo 636 // the normal scheduling algorithms and output the instructions according to 637 // this ordering. 638 unsigned IROrder; 639 640 /// Source line information. 641 DebugLoc debugLoc; 642 643 /// Return a pointer to the specified value type. 644 static const EVT *getValueTypeList(EVT VT); 645 646 SDNodeFlags Flags; 647 648 uint32_t CFIType = 0; 649 650 public: 651 //===--------------------------------------------------------------------===// 652 // Accessors 653 // 654 655 /// Return the SelectionDAG opcode value for this node. For 656 /// pre-isel nodes (those for which isMachineOpcode returns false), these 657 /// are the opcode values in the ISD and <target>ISD namespaces. For 658 /// post-isel opcodes, see getMachineOpcode. 659 unsigned getOpcode() const { return (unsigned)NodeType; } 660 661 /// Test if this node has a target-specific opcode (in the 662 /// \<target\>ISD namespace). 663 bool isTargetOpcode() const { return NodeType >= ISD::BUILTIN_OP_END; } 664 665 /// Test if this node has a target-specific opcode that may raise 666 /// FP exceptions (in the \<target\>ISD namespace and greater than 667 /// FIRST_TARGET_STRICTFP_OPCODE). Note that all target memory 668 /// opcode are currently automatically considered to possibly raise 669 /// FP exceptions as well. 670 bool isTargetStrictFPOpcode() const { 671 return NodeType >= ISD::FIRST_TARGET_STRICTFP_OPCODE; 672 } 673 674 /// Test if this node has a target-specific 675 /// memory-referencing opcode (in the \<target\>ISD namespace and 676 /// greater than FIRST_TARGET_MEMORY_OPCODE). 677 bool isTargetMemoryOpcode() const { 678 return NodeType >= ISD::FIRST_TARGET_MEMORY_OPCODE; 679 } 680 681 /// Return true if the type of the node type undefined. 682 bool isUndef() const { return NodeType == ISD::UNDEF; } 683 684 /// Test if this node is a memory intrinsic (with valid pointer information). 685 /// INTRINSIC_W_CHAIN and INTRINSIC_VOID nodes are sometimes created for 686 /// non-memory intrinsics (with chains) that are not really instances of 687 /// MemSDNode. For such nodes, we need some extra state to determine the 688 /// proper classof relationship. 689 bool isMemIntrinsic() const { 690 return (NodeType == ISD::INTRINSIC_W_CHAIN || 691 NodeType == ISD::INTRINSIC_VOID) && 692 SDNodeBits.IsMemIntrinsic; 693 } 694 695 /// Test if this node is a strict floating point pseudo-op. 696 bool isStrictFPOpcode() { 697 switch (NodeType) { 698 default: 699 return false; 700 case ISD::STRICT_FP16_TO_FP: 701 case ISD::STRICT_FP_TO_FP16: 702 case ISD::STRICT_BF16_TO_FP: 703 case ISD::STRICT_FP_TO_BF16: 704 #define DAG_INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC, DAGN) \ 705 case ISD::STRICT_##DAGN: 706 #include "llvm/IR/ConstrainedOps.def" 707 return true; 708 } 709 } 710 711 /// Test if this node is a vector predication operation. 712 bool isVPOpcode() const { return ISD::isVPOpcode(getOpcode()); } 713 714 /// Test if this node has a post-isel opcode, directly 715 /// corresponding to a MachineInstr opcode. 716 bool isMachineOpcode() const { return NodeType < 0; } 717 718 /// This may only be called if isMachineOpcode returns 719 /// true. It returns the MachineInstr opcode value that the node's opcode 720 /// corresponds to. 721 unsigned getMachineOpcode() const { 722 assert(isMachineOpcode() && "Not a MachineInstr opcode!"); 723 return ~NodeType; 724 } 725 726 bool getHasDebugValue() const { return SDNodeBits.HasDebugValue; } 727 void setHasDebugValue(bool b) { SDNodeBits.HasDebugValue = b; } 728 729 bool isDivergent() const { return SDNodeBits.IsDivergent; } 730 731 /// Return true if there are no uses of this node. 732 bool use_empty() const { return UseList == nullptr; } 733 734 /// Return true if there is exactly one use of this node. 735 bool hasOneUse() const { return hasSingleElement(uses()); } 736 737 /// Return the number of uses of this node. This method takes 738 /// time proportional to the number of uses. 739 size_t use_size() const { return std::distance(use_begin(), use_end()); } 740 741 /// Return the unique node id. 742 int getNodeId() const { return NodeId; } 743 744 /// Set unique node id. 745 void setNodeId(int Id) { NodeId = Id; } 746 747 /// Return the node ordering. 748 unsigned getIROrder() const { return IROrder; } 749 750 /// Set the node ordering. 751 void setIROrder(unsigned Order) { IROrder = Order; } 752 753 /// Return the source location info. 754 const DebugLoc &getDebugLoc() const { return debugLoc; } 755 756 /// Set source location info. Try to avoid this, putting 757 /// it in the constructor is preferable. 758 void setDebugLoc(DebugLoc dl) { debugLoc = std::move(dl); } 759 760 /// This class provides iterator support for SDUse 761 /// operands that use a specific SDNode. 762 class use_iterator { 763 friend class SDNode; 764 765 SDUse *Op = nullptr; 766 767 explicit use_iterator(SDUse *op) : Op(op) {} 768 769 public: 770 using iterator_category = std::forward_iterator_tag; 771 using value_type = SDUse; 772 using difference_type = std::ptrdiff_t; 773 using pointer = value_type *; 774 using reference = value_type &; 775 776 use_iterator() = default; 777 use_iterator(const use_iterator &I) = default; 778 use_iterator &operator=(const use_iterator &) = default; 779 780 bool operator==(const use_iterator &x) const { return Op == x.Op; } 781 bool operator!=(const use_iterator &x) const { 782 return !operator==(x); 783 } 784 785 /// Return true if this iterator is at the end of uses list. 786 bool atEnd() const { return Op == nullptr; } 787 788 // Iterator traversal: forward iteration only. 789 use_iterator &operator++() { // Preincrement 790 assert(Op && "Cannot increment end iterator!"); 791 Op = Op->getNext(); 792 return *this; 793 } 794 795 use_iterator operator++(int) { // Postincrement 796 use_iterator tmp = *this; ++*this; return tmp; 797 } 798 799 /// Retrieve a pointer to the current user node. 800 SDNode *operator*() const { 801 assert(Op && "Cannot dereference end iterator!"); 802 return Op->getUser(); 803 } 804 805 SDNode *operator->() const { return operator*(); } 806 807 SDUse &getUse() const { return *Op; } 808 809 /// Retrieve the operand # of this use in its user. 810 unsigned getOperandNo() const { 811 assert(Op && "Cannot dereference end iterator!"); 812 return (unsigned)(Op - Op->getUser()->OperandList); 813 } 814 }; 815 816 /// Provide iteration support to walk over all uses of an SDNode. 817 use_iterator use_begin() const { 818 return use_iterator(UseList); 819 } 820 821 static use_iterator use_end() { return use_iterator(nullptr); } 822 823 inline iterator_range<use_iterator> uses() { 824 return make_range(use_begin(), use_end()); 825 } 826 inline iterator_range<use_iterator> uses() const { 827 return make_range(use_begin(), use_end()); 828 } 829 830 /// Return true if there are exactly NUSES uses of the indicated value. 831 /// This method ignores uses of other values defined by this operation. 832 bool hasNUsesOfValue(unsigned NUses, unsigned Value) const; 833 834 /// Return true if there are any use of the indicated value. 835 /// This method ignores uses of other values defined by this operation. 836 bool hasAnyUseOfValue(unsigned Value) const; 837 838 /// Return true if this node is the only use of N. 839 bool isOnlyUserOf(const SDNode *N) const; 840 841 /// Return true if this node is an operand of N. 842 bool isOperandOf(const SDNode *N) const; 843 844 /// Return true if this node is a predecessor of N. 845 /// NOTE: Implemented on top of hasPredecessor and every bit as 846 /// expensive. Use carefully. 847 bool isPredecessorOf(const SDNode *N) const { 848 return N->hasPredecessor(this); 849 } 850 851 /// Return true if N is a predecessor of this node. 852 /// N is either an operand of this node, or can be reached by recursively 853 /// traversing up the operands. 854 /// NOTE: This is an expensive method. Use it carefully. 855 bool hasPredecessor(const SDNode *N) const; 856 857 /// Returns true if N is a predecessor of any node in Worklist. This 858 /// helper keeps Visited and Worklist sets externally to allow unions 859 /// searches to be performed in parallel, caching of results across 860 /// queries and incremental addition to Worklist. Stops early if N is 861 /// found but will resume. Remember to clear Visited and Worklists 862 /// if DAG changes. MaxSteps gives a maximum number of nodes to visit before 863 /// giving up. The TopologicalPrune flag signals that positive NodeIds are 864 /// topologically ordered (Operands have strictly smaller node id) and search 865 /// can be pruned leveraging this. 866 static bool hasPredecessorHelper(const SDNode *N, 867 SmallPtrSetImpl<const SDNode *> &Visited, 868 SmallVectorImpl<const SDNode *> &Worklist, 869 unsigned int MaxSteps = 0, 870 bool TopologicalPrune = false) { 871 SmallVector<const SDNode *, 8> DeferredNodes; 872 if (Visited.count(N)) 873 return true; 874 875 // Node Id's are assigned in three places: As a topological 876 // ordering (> 0), during legalization (results in values set to 877 // 0), new nodes (set to -1). If N has a topolgical id then we 878 // know that all nodes with ids smaller than it cannot be 879 // successors and we need not check them. Filter out all node 880 // that can't be matches. We add them to the worklist before exit 881 // in case of multiple calls. Note that during selection the topological id 882 // may be violated if a node's predecessor is selected before it. We mark 883 // this at selection negating the id of unselected successors and 884 // restricting topological pruning to positive ids. 885 886 int NId = N->getNodeId(); 887 // If we Invalidated the Id, reconstruct original NId. 888 if (NId < -1) 889 NId = -(NId + 1); 890 891 bool Found = false; 892 while (!Worklist.empty()) { 893 const SDNode *M = Worklist.pop_back_val(); 894 int MId = M->getNodeId(); 895 if (TopologicalPrune && M->getOpcode() != ISD::TokenFactor && (NId > 0) && 896 (MId > 0) && (MId < NId)) { 897 DeferredNodes.push_back(M); 898 continue; 899 } 900 for (const SDValue &OpV : M->op_values()) { 901 SDNode *Op = OpV.getNode(); 902 if (Visited.insert(Op).second) 903 Worklist.push_back(Op); 904 if (Op == N) 905 Found = true; 906 } 907 if (Found) 908 break; 909 if (MaxSteps != 0 && Visited.size() >= MaxSteps) 910 break; 911 } 912 // Push deferred nodes back on worklist. 913 Worklist.append(DeferredNodes.begin(), DeferredNodes.end()); 914 // If we bailed early, conservatively return found. 915 if (MaxSteps != 0 && Visited.size() >= MaxSteps) 916 return true; 917 return Found; 918 } 919 920 /// Return true if all the users of N are contained in Nodes. 921 /// NOTE: Requires at least one match, but doesn't require them all. 922 static bool areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N); 923 924 /// Return the number of values used by this operation. 925 unsigned getNumOperands() const { return NumOperands; } 926 927 /// Return the maximum number of operands that a SDNode can hold. 928 static constexpr size_t getMaxNumOperands() { 929 return std::numeric_limits<decltype(SDNode::NumOperands)>::max(); 930 } 931 932 /// Helper method returns the integer value of a ConstantSDNode operand. 933 inline uint64_t getConstantOperandVal(unsigned Num) const; 934 935 /// Helper method returns the zero-extended integer value of a ConstantSDNode. 936 inline uint64_t getAsZExtVal() const; 937 938 /// Helper method returns the APInt of a ConstantSDNode operand. 939 inline const APInt &getConstantOperandAPInt(unsigned Num) const; 940 941 /// Helper method returns the APInt value of a ConstantSDNode. 942 inline const APInt &getAsAPIntVal() const; 943 944 const SDValue &getOperand(unsigned Num) const { 945 assert(Num < NumOperands && "Invalid child # of SDNode!"); 946 return OperandList[Num]; 947 } 948 949 using op_iterator = SDUse *; 950 951 op_iterator op_begin() const { return OperandList; } 952 op_iterator op_end() const { return OperandList+NumOperands; } 953 ArrayRef<SDUse> ops() const { return ArrayRef(op_begin(), op_end()); } 954 955 /// Iterator for directly iterating over the operand SDValue's. 956 struct value_op_iterator 957 : iterator_adaptor_base<value_op_iterator, op_iterator, 958 std::random_access_iterator_tag, SDValue, 959 ptrdiff_t, value_op_iterator *, 960 value_op_iterator *> { 961 explicit value_op_iterator(SDUse *U = nullptr) 962 : iterator_adaptor_base(U) {} 963 964 const SDValue &operator*() const { return I->get(); } 965 }; 966 967 iterator_range<value_op_iterator> op_values() const { 968 return make_range(value_op_iterator(op_begin()), 969 value_op_iterator(op_end())); 970 } 971 972 SDVTList getVTList() const { 973 SDVTList X = { ValueList, NumValues }; 974 return X; 975 } 976 977 /// If this node has a glue operand, return the node 978 /// to which the glue operand points. Otherwise return NULL. 979 SDNode *getGluedNode() const { 980 if (getNumOperands() != 0 && 981 getOperand(getNumOperands()-1).getValueType() == MVT::Glue) 982 return getOperand(getNumOperands()-1).getNode(); 983 return nullptr; 984 } 985 986 /// If this node has a glue value with a user, return 987 /// the user (there is at most one). Otherwise return NULL. 988 SDNode *getGluedUser() const { 989 for (use_iterator UI = use_begin(), UE = use_end(); UI != UE; ++UI) 990 if (UI.getUse().get().getValueType() == MVT::Glue) 991 return *UI; 992 return nullptr; 993 } 994 995 SDNodeFlags getFlags() const { return Flags; } 996 void setFlags(SDNodeFlags NewFlags) { Flags = NewFlags; } 997 998 /// Clear any flags in this node that aren't also set in Flags. 999 /// If Flags is not in a defined state then this has no effect. 1000 void intersectFlagsWith(const SDNodeFlags Flags); 1001 1002 bool hasPoisonGeneratingFlags() const { 1003 SDNodeFlags Flags = getFlags(); 1004 return Flags.hasNoUnsignedWrap() || Flags.hasNoSignedWrap() || 1005 Flags.hasExact() || Flags.hasDisjoint() || Flags.hasNonNeg() || 1006 Flags.hasNoNaNs() || Flags.hasNoInfs(); 1007 } 1008 1009 void setCFIType(uint32_t Type) { CFIType = Type; } 1010 uint32_t getCFIType() const { return CFIType; } 1011 1012 /// Return the number of values defined/returned by this operator. 1013 unsigned getNumValues() const { return NumValues; } 1014 1015 /// Return the type of a specified result. 1016 EVT getValueType(unsigned ResNo) const { 1017 assert(ResNo < NumValues && "Illegal result number!"); 1018 return ValueList[ResNo]; 1019 } 1020 1021 /// Return the type of a specified result as a simple type. 1022 MVT getSimpleValueType(unsigned ResNo) const { 1023 return getValueType(ResNo).getSimpleVT(); 1024 } 1025 1026 /// Returns MVT::getSizeInBits(getValueType(ResNo)). 1027 /// 1028 /// If the value type is a scalable vector type, the scalable property will 1029 /// be set and the runtime size will be a positive integer multiple of the 1030 /// base size. 1031 TypeSize getValueSizeInBits(unsigned ResNo) const { 1032 return getValueType(ResNo).getSizeInBits(); 1033 } 1034 1035 using value_iterator = const EVT *; 1036 1037 value_iterator value_begin() const { return ValueList; } 1038 value_iterator value_end() const { return ValueList+NumValues; } 1039 iterator_range<value_iterator> values() const { 1040 return llvm::make_range(value_begin(), value_end()); 1041 } 1042 1043 /// Return the opcode of this operation for printing. 1044 std::string getOperationName(const SelectionDAG *G = nullptr) const; 1045 static const char* getIndexedModeName(ISD::MemIndexedMode AM); 1046 void print_types(raw_ostream &OS, const SelectionDAG *G) const; 1047 void print_details(raw_ostream &OS, const SelectionDAG *G) const; 1048 void print(raw_ostream &OS, const SelectionDAG *G = nullptr) const; 1049 void printr(raw_ostream &OS, const SelectionDAG *G = nullptr) const; 1050 1051 /// Print a SelectionDAG node and all children down to 1052 /// the leaves. The given SelectionDAG allows target-specific nodes 1053 /// to be printed in human-readable form. Unlike printr, this will 1054 /// print the whole DAG, including children that appear multiple 1055 /// times. 1056 /// 1057 void printrFull(raw_ostream &O, const SelectionDAG *G = nullptr) const; 1058 1059 /// Print a SelectionDAG node and children up to 1060 /// depth "depth." The given SelectionDAG allows target-specific 1061 /// nodes to be printed in human-readable form. Unlike printr, this 1062 /// will print children that appear multiple times wherever they are 1063 /// used. 1064 /// 1065 void printrWithDepth(raw_ostream &O, const SelectionDAG *G = nullptr, 1066 unsigned depth = 100) const; 1067 1068 /// Dump this node, for debugging. 1069 void dump() const; 1070 1071 /// Dump (recursively) this node and its use-def subgraph. 1072 void dumpr() const; 1073 1074 /// Dump this node, for debugging. 1075 /// The given SelectionDAG allows target-specific nodes to be printed 1076 /// in human-readable form. 1077 void dump(const SelectionDAG *G) const; 1078 1079 /// Dump (recursively) this node and its use-def subgraph. 1080 /// The given SelectionDAG allows target-specific nodes to be printed 1081 /// in human-readable form. 1082 void dumpr(const SelectionDAG *G) const; 1083 1084 /// printrFull to dbgs(). The given SelectionDAG allows 1085 /// target-specific nodes to be printed in human-readable form. 1086 /// Unlike dumpr, this will print the whole DAG, including children 1087 /// that appear multiple times. 1088 void dumprFull(const SelectionDAG *G = nullptr) const; 1089 1090 /// printrWithDepth to dbgs(). The given 1091 /// SelectionDAG allows target-specific nodes to be printed in 1092 /// human-readable form. Unlike dumpr, this will print children 1093 /// that appear multiple times wherever they are used. 1094 /// 1095 void dumprWithDepth(const SelectionDAG *G = nullptr, 1096 unsigned depth = 100) const; 1097 1098 /// Gather unique data for the node. 1099 void Profile(FoldingSetNodeID &ID) const; 1100 1101 /// This method should only be used by the SDUse class. 1102 void addUse(SDUse &U) { U.addToList(&UseList); } 1103 1104 protected: 1105 static SDVTList getSDVTList(EVT VT) { 1106 SDVTList Ret = { getValueTypeList(VT), 1 }; 1107 return Ret; 1108 } 1109 1110 /// Create an SDNode. 1111 /// 1112 /// SDNodes are created without any operands, and never own the operand 1113 /// storage. To add operands, see SelectionDAG::createOperands. 1114 SDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs) 1115 : NodeType(Opc), ValueList(VTs.VTs), NumValues(VTs.NumVTs), 1116 IROrder(Order), debugLoc(std::move(dl)) { 1117 memset(&RawSDNodeBits, 0, sizeof(RawSDNodeBits)); 1118 assert(debugLoc.hasTrivialDestructor() && "Expected trivial destructor"); 1119 assert(NumValues == VTs.NumVTs && 1120 "NumValues wasn't wide enough for its operands!"); 1121 } 1122 1123 /// Release the operands and set this node to have zero operands. 1124 void DropOperands(); 1125 }; 1126 1127 /// Wrapper class for IR location info (IR ordering and DebugLoc) to be passed 1128 /// into SDNode creation functions. 1129 /// When an SDNode is created from the DAGBuilder, the DebugLoc is extracted 1130 /// from the original Instruction, and IROrder is the ordinal position of 1131 /// the instruction. 1132 /// When an SDNode is created after the DAG is being built, both DebugLoc and 1133 /// the IROrder are propagated from the original SDNode. 1134 /// So SDLoc class provides two constructors besides the default one, one to 1135 /// be used by the DAGBuilder, the other to be used by others. 1136 class SDLoc { 1137 private: 1138 DebugLoc DL; 1139 int IROrder = 0; 1140 1141 public: 1142 SDLoc() = default; 1143 SDLoc(const SDNode *N) : DL(N->getDebugLoc()), IROrder(N->getIROrder()) {} 1144 SDLoc(const SDValue V) : SDLoc(V.getNode()) {} 1145 SDLoc(const Instruction *I, int Order) : IROrder(Order) { 1146 assert(Order >= 0 && "bad IROrder"); 1147 if (I) 1148 DL = I->getDebugLoc(); 1149 } 1150 1151 unsigned getIROrder() const { return IROrder; } 1152 const DebugLoc &getDebugLoc() const { return DL; } 1153 }; 1154 1155 // Define inline functions from the SDValue class. 1156 1157 inline SDValue::SDValue(SDNode *node, unsigned resno) 1158 : Node(node), ResNo(resno) { 1159 // Explicitly check for !ResNo to avoid use-after-free, because there are 1160 // callers that use SDValue(N, 0) with a deleted N to indicate successful 1161 // combines. 1162 assert((!Node || !ResNo || ResNo < Node->getNumValues()) && 1163 "Invalid result number for the given node!"); 1164 assert(ResNo < -2U && "Cannot use result numbers reserved for DenseMaps."); 1165 } 1166 1167 inline unsigned SDValue::getOpcode() const { 1168 return Node->getOpcode(); 1169 } 1170 1171 inline EVT SDValue::getValueType() const { 1172 return Node->getValueType(ResNo); 1173 } 1174 1175 inline unsigned SDValue::getNumOperands() const { 1176 return Node->getNumOperands(); 1177 } 1178 1179 inline const SDValue &SDValue::getOperand(unsigned i) const { 1180 return Node->getOperand(i); 1181 } 1182 1183 inline uint64_t SDValue::getConstantOperandVal(unsigned i) const { 1184 return Node->getConstantOperandVal(i); 1185 } 1186 1187 inline const APInt &SDValue::getConstantOperandAPInt(unsigned i) const { 1188 return Node->getConstantOperandAPInt(i); 1189 } 1190 1191 inline bool SDValue::isTargetOpcode() const { 1192 return Node->isTargetOpcode(); 1193 } 1194 1195 inline bool SDValue::isTargetMemoryOpcode() const { 1196 return Node->isTargetMemoryOpcode(); 1197 } 1198 1199 inline bool SDValue::isMachineOpcode() const { 1200 return Node->isMachineOpcode(); 1201 } 1202 1203 inline unsigned SDValue::getMachineOpcode() const { 1204 return Node->getMachineOpcode(); 1205 } 1206 1207 inline bool SDValue::isUndef() const { 1208 return Node->isUndef(); 1209 } 1210 1211 inline bool SDValue::use_empty() const { 1212 return !Node->hasAnyUseOfValue(ResNo); 1213 } 1214 1215 inline bool SDValue::hasOneUse() const { 1216 return Node->hasNUsesOfValue(1, ResNo); 1217 } 1218 1219 inline const DebugLoc &SDValue::getDebugLoc() const { 1220 return Node->getDebugLoc(); 1221 } 1222 1223 inline void SDValue::dump() const { 1224 return Node->dump(); 1225 } 1226 1227 inline void SDValue::dump(const SelectionDAG *G) const { 1228 return Node->dump(G); 1229 } 1230 1231 inline void SDValue::dumpr() const { 1232 return Node->dumpr(); 1233 } 1234 1235 inline void SDValue::dumpr(const SelectionDAG *G) const { 1236 return Node->dumpr(G); 1237 } 1238 1239 // Define inline functions from the SDUse class. 1240 1241 inline void SDUse::set(const SDValue &V) { 1242 if (Val.getNode()) removeFromList(); 1243 Val = V; 1244 if (V.getNode()) 1245 V->addUse(*this); 1246 } 1247 1248 inline void SDUse::setInitial(const SDValue &V) { 1249 Val = V; 1250 V->addUse(*this); 1251 } 1252 1253 inline void SDUse::setNode(SDNode *N) { 1254 if (Val.getNode()) removeFromList(); 1255 Val.setNode(N); 1256 if (N) N->addUse(*this); 1257 } 1258 1259 /// This class is used to form a handle around another node that 1260 /// is persistent and is updated across invocations of replaceAllUsesWith on its 1261 /// operand. This node should be directly created by end-users and not added to 1262 /// the AllNodes list. 1263 class HandleSDNode : public SDNode { 1264 SDUse Op; 1265 1266 public: 1267 explicit HandleSDNode(SDValue X) 1268 : SDNode(ISD::HANDLENODE, 0, DebugLoc(), getSDVTList(MVT::Other)) { 1269 // HandleSDNodes are never inserted into the DAG, so they won't be 1270 // auto-numbered. Use ID 65535 as a sentinel. 1271 PersistentId = 0xffff; 1272 1273 // Manually set up the operand list. This node type is special in that it's 1274 // always stack allocated and SelectionDAG does not manage its operands. 1275 // TODO: This should either (a) not be in the SDNode hierarchy, or (b) not 1276 // be so special. 1277 Op.setUser(this); 1278 Op.setInitial(X); 1279 NumOperands = 1; 1280 OperandList = &Op; 1281 } 1282 ~HandleSDNode(); 1283 1284 const SDValue &getValue() const { return Op; } 1285 }; 1286 1287 class AddrSpaceCastSDNode : public SDNode { 1288 private: 1289 unsigned SrcAddrSpace; 1290 unsigned DestAddrSpace; 1291 1292 public: 1293 AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 1294 unsigned SrcAS, unsigned DestAS) 1295 : SDNode(ISD::ADDRSPACECAST, Order, dl, VTs), SrcAddrSpace(SrcAS), 1296 DestAddrSpace(DestAS) {} 1297 1298 unsigned getSrcAddressSpace() const { return SrcAddrSpace; } 1299 unsigned getDestAddressSpace() const { return DestAddrSpace; } 1300 1301 static bool classof(const SDNode *N) { 1302 return N->getOpcode() == ISD::ADDRSPACECAST; 1303 } 1304 }; 1305 1306 /// This is an abstract virtual class for memory operations. 1307 class MemSDNode : public SDNode { 1308 private: 1309 // VT of in-memory value. 1310 EVT MemoryVT; 1311 1312 protected: 1313 /// Memory reference information. 1314 MachineMemOperand *MMO; 1315 1316 public: 1317 MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTs, 1318 EVT memvt, MachineMemOperand *MMO); 1319 1320 bool readMem() const { return MMO->isLoad(); } 1321 bool writeMem() const { return MMO->isStore(); } 1322 1323 /// Returns alignment and volatility of the memory access 1324 Align getOriginalAlign() const { return MMO->getBaseAlign(); } 1325 Align getAlign() const { return MMO->getAlign(); } 1326 1327 /// Return the SubclassData value, without HasDebugValue. This contains an 1328 /// encoding of the volatile flag, as well as bits used by subclasses. This 1329 /// function should only be used to compute a FoldingSetNodeID value. 1330 /// The HasDebugValue bit is masked out because CSE map needs to match 1331 /// nodes with debug info with nodes without debug info. Same is about 1332 /// isDivergent bit. 1333 unsigned getRawSubclassData() const { 1334 uint16_t Data; 1335 union { 1336 char RawSDNodeBits[sizeof(uint16_t)]; 1337 SDNodeBitfields SDNodeBits; 1338 }; 1339 memcpy(&RawSDNodeBits, &this->RawSDNodeBits, sizeof(this->RawSDNodeBits)); 1340 SDNodeBits.HasDebugValue = 0; 1341 SDNodeBits.IsDivergent = false; 1342 memcpy(&Data, &RawSDNodeBits, sizeof(RawSDNodeBits)); 1343 return Data; 1344 } 1345 1346 bool isVolatile() const { return MemSDNodeBits.IsVolatile; } 1347 bool isNonTemporal() const { return MemSDNodeBits.IsNonTemporal; } 1348 bool isDereferenceable() const { return MemSDNodeBits.IsDereferenceable; } 1349 bool isInvariant() const { return MemSDNodeBits.IsInvariant; } 1350 1351 // Returns the offset from the location of the access. 1352 int64_t getSrcValueOffset() const { return MMO->getOffset(); } 1353 1354 /// Returns the AA info that describes the dereference. 1355 AAMDNodes getAAInfo() const { return MMO->getAAInfo(); } 1356 1357 /// Returns the Ranges that describes the dereference. 1358 const MDNode *getRanges() const { return MMO->getRanges(); } 1359 1360 /// Returns the synchronization scope ID for this memory operation. 1361 SyncScope::ID getSyncScopeID() const { return MMO->getSyncScopeID(); } 1362 1363 /// Return the atomic ordering requirements for this memory operation. For 1364 /// cmpxchg atomic operations, return the atomic ordering requirements when 1365 /// store occurs. 1366 AtomicOrdering getSuccessOrdering() const { 1367 return MMO->getSuccessOrdering(); 1368 } 1369 1370 /// Return a single atomic ordering that is at least as strong as both the 1371 /// success and failure orderings for an atomic operation. (For operations 1372 /// other than cmpxchg, this is equivalent to getSuccessOrdering().) 1373 AtomicOrdering getMergedOrdering() const { return MMO->getMergedOrdering(); } 1374 1375 /// Return true if the memory operation ordering is Unordered or higher. 1376 bool isAtomic() const { return MMO->isAtomic(); } 1377 1378 /// Returns true if the memory operation doesn't imply any ordering 1379 /// constraints on surrounding memory operations beyond the normal memory 1380 /// aliasing rules. 1381 bool isUnordered() const { return MMO->isUnordered(); } 1382 1383 /// Returns true if the memory operation is neither atomic or volatile. 1384 bool isSimple() const { return !isAtomic() && !isVolatile(); } 1385 1386 /// Return the type of the in-memory value. 1387 EVT getMemoryVT() const { return MemoryVT; } 1388 1389 /// Return a MachineMemOperand object describing the memory 1390 /// reference performed by operation. 1391 MachineMemOperand *getMemOperand() const { return MMO; } 1392 1393 const MachinePointerInfo &getPointerInfo() const { 1394 return MMO->getPointerInfo(); 1395 } 1396 1397 /// Return the address space for the associated pointer 1398 unsigned getAddressSpace() const { 1399 return getPointerInfo().getAddrSpace(); 1400 } 1401 1402 /// Update this MemSDNode's MachineMemOperand information 1403 /// to reflect the alignment of NewMMO, if it has a greater alignment. 1404 /// This must only be used when the new alignment applies to all users of 1405 /// this MachineMemOperand. 1406 void refineAlignment(const MachineMemOperand *NewMMO) { 1407 MMO->refineAlignment(NewMMO); 1408 } 1409 1410 const SDValue &getChain() const { return getOperand(0); } 1411 1412 const SDValue &getBasePtr() const { 1413 switch (getOpcode()) { 1414 case ISD::STORE: 1415 case ISD::ATOMIC_STORE: 1416 case ISD::VP_STORE: 1417 case ISD::MSTORE: 1418 case ISD::VP_SCATTER: 1419 case ISD::EXPERIMENTAL_VP_STRIDED_STORE: 1420 return getOperand(2); 1421 case ISD::MGATHER: 1422 case ISD::MSCATTER: 1423 return getOperand(3); 1424 default: 1425 return getOperand(1); 1426 } 1427 } 1428 1429 // Methods to support isa and dyn_cast 1430 static bool classof(const SDNode *N) { 1431 // For some targets, we lower some target intrinsics to a MemIntrinsicNode 1432 // with either an intrinsic or a target opcode. 1433 switch (N->getOpcode()) { 1434 case ISD::LOAD: 1435 case ISD::STORE: 1436 case ISD::PREFETCH: 1437 case ISD::ATOMIC_CMP_SWAP: 1438 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: 1439 case ISD::ATOMIC_SWAP: 1440 case ISD::ATOMIC_LOAD_ADD: 1441 case ISD::ATOMIC_LOAD_SUB: 1442 case ISD::ATOMIC_LOAD_AND: 1443 case ISD::ATOMIC_LOAD_CLR: 1444 case ISD::ATOMIC_LOAD_OR: 1445 case ISD::ATOMIC_LOAD_XOR: 1446 case ISD::ATOMIC_LOAD_NAND: 1447 case ISD::ATOMIC_LOAD_MIN: 1448 case ISD::ATOMIC_LOAD_MAX: 1449 case ISD::ATOMIC_LOAD_UMIN: 1450 case ISD::ATOMIC_LOAD_UMAX: 1451 case ISD::ATOMIC_LOAD_FADD: 1452 case ISD::ATOMIC_LOAD_FSUB: 1453 case ISD::ATOMIC_LOAD_FMAX: 1454 case ISD::ATOMIC_LOAD_FMIN: 1455 case ISD::ATOMIC_LOAD_UINC_WRAP: 1456 case ISD::ATOMIC_LOAD_UDEC_WRAP: 1457 case ISD::ATOMIC_LOAD: 1458 case ISD::ATOMIC_STORE: 1459 case ISD::MLOAD: 1460 case ISD::MSTORE: 1461 case ISD::MGATHER: 1462 case ISD::MSCATTER: 1463 case ISD::VP_LOAD: 1464 case ISD::VP_STORE: 1465 case ISD::VP_GATHER: 1466 case ISD::VP_SCATTER: 1467 case ISD::EXPERIMENTAL_VP_STRIDED_LOAD: 1468 case ISD::EXPERIMENTAL_VP_STRIDED_STORE: 1469 case ISD::GET_FPENV_MEM: 1470 case ISD::SET_FPENV_MEM: 1471 return true; 1472 default: 1473 return N->isMemIntrinsic() || N->isTargetMemoryOpcode(); 1474 } 1475 } 1476 }; 1477 1478 /// This is an SDNode representing atomic operations. 1479 class AtomicSDNode : public MemSDNode { 1480 public: 1481 AtomicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, SDVTList VTL, 1482 EVT MemVT, MachineMemOperand *MMO) 1483 : MemSDNode(Opc, Order, dl, VTL, MemVT, MMO) { 1484 assert(((Opc != ISD::ATOMIC_LOAD && Opc != ISD::ATOMIC_STORE) || 1485 MMO->isAtomic()) && "then why are we using an AtomicSDNode?"); 1486 } 1487 1488 void setExtensionType(ISD::LoadExtType ETy) { 1489 assert(getOpcode() == ISD::ATOMIC_LOAD && "Only used for atomic loads."); 1490 LoadSDNodeBits.ExtTy = ETy; 1491 } 1492 1493 ISD::LoadExtType getExtensionType() const { 1494 assert(getOpcode() == ISD::ATOMIC_LOAD && "Only used for atomic loads."); 1495 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy); 1496 } 1497 1498 const SDValue &getBasePtr() const { 1499 return getOpcode() == ISD::ATOMIC_STORE ? getOperand(2) : getOperand(1); 1500 } 1501 const SDValue &getVal() const { 1502 return getOpcode() == ISD::ATOMIC_STORE ? getOperand(1) : getOperand(2); 1503 } 1504 1505 /// Returns true if this SDNode represents cmpxchg atomic operation, false 1506 /// otherwise. 1507 bool isCompareAndSwap() const { 1508 unsigned Op = getOpcode(); 1509 return Op == ISD::ATOMIC_CMP_SWAP || 1510 Op == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS; 1511 } 1512 1513 /// For cmpxchg atomic operations, return the atomic ordering requirements 1514 /// when store does not occur. 1515 AtomicOrdering getFailureOrdering() const { 1516 assert(isCompareAndSwap() && "Must be cmpxchg operation"); 1517 return MMO->getFailureOrdering(); 1518 } 1519 1520 // Methods to support isa and dyn_cast 1521 static bool classof(const SDNode *N) { 1522 return N->getOpcode() == ISD::ATOMIC_CMP_SWAP || 1523 N->getOpcode() == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS || 1524 N->getOpcode() == ISD::ATOMIC_SWAP || 1525 N->getOpcode() == ISD::ATOMIC_LOAD_ADD || 1526 N->getOpcode() == ISD::ATOMIC_LOAD_SUB || 1527 N->getOpcode() == ISD::ATOMIC_LOAD_AND || 1528 N->getOpcode() == ISD::ATOMIC_LOAD_CLR || 1529 N->getOpcode() == ISD::ATOMIC_LOAD_OR || 1530 N->getOpcode() == ISD::ATOMIC_LOAD_XOR || 1531 N->getOpcode() == ISD::ATOMIC_LOAD_NAND || 1532 N->getOpcode() == ISD::ATOMIC_LOAD_MIN || 1533 N->getOpcode() == ISD::ATOMIC_LOAD_MAX || 1534 N->getOpcode() == ISD::ATOMIC_LOAD_UMIN || 1535 N->getOpcode() == ISD::ATOMIC_LOAD_UMAX || 1536 N->getOpcode() == ISD::ATOMIC_LOAD_FADD || 1537 N->getOpcode() == ISD::ATOMIC_LOAD_FSUB || 1538 N->getOpcode() == ISD::ATOMIC_LOAD_FMAX || 1539 N->getOpcode() == ISD::ATOMIC_LOAD_FMIN || 1540 N->getOpcode() == ISD::ATOMIC_LOAD_UINC_WRAP || 1541 N->getOpcode() == ISD::ATOMIC_LOAD_UDEC_WRAP || 1542 N->getOpcode() == ISD::ATOMIC_LOAD || 1543 N->getOpcode() == ISD::ATOMIC_STORE; 1544 } 1545 }; 1546 1547 /// This SDNode is used for target intrinsics that touch 1548 /// memory and need an associated MachineMemOperand. Its opcode may be 1549 /// INTRINSIC_VOID, INTRINSIC_W_CHAIN, PREFETCH, or a target-specific opcode 1550 /// with a value not less than FIRST_TARGET_MEMORY_OPCODE. 1551 class MemIntrinsicSDNode : public MemSDNode { 1552 public: 1553 MemIntrinsicSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl, 1554 SDVTList VTs, EVT MemoryVT, MachineMemOperand *MMO) 1555 : MemSDNode(Opc, Order, dl, VTs, MemoryVT, MMO) { 1556 SDNodeBits.IsMemIntrinsic = true; 1557 } 1558 1559 // Methods to support isa and dyn_cast 1560 static bool classof(const SDNode *N) { 1561 // We lower some target intrinsics to their target opcode 1562 // early a node with a target opcode can be of this class 1563 return N->isMemIntrinsic() || 1564 N->getOpcode() == ISD::PREFETCH || 1565 N->isTargetMemoryOpcode(); 1566 } 1567 }; 1568 1569 /// This SDNode is used to implement the code generator 1570 /// support for the llvm IR shufflevector instruction. It combines elements 1571 /// from two input vectors into a new input vector, with the selection and 1572 /// ordering of elements determined by an array of integers, referred to as 1573 /// the shuffle mask. For input vectors of width N, mask indices of 0..N-1 1574 /// refer to elements from the LHS input, and indices from N to 2N-1 the RHS. 1575 /// An index of -1 is treated as undef, such that the code generator may put 1576 /// any value in the corresponding element of the result. 1577 class ShuffleVectorSDNode : public SDNode { 1578 // The memory for Mask is owned by the SelectionDAG's OperandAllocator, and 1579 // is freed when the SelectionDAG object is destroyed. 1580 const int *Mask; 1581 1582 protected: 1583 friend class SelectionDAG; 1584 1585 ShuffleVectorSDNode(SDVTList VTs, unsigned Order, const DebugLoc &dl, 1586 const int *M) 1587 : SDNode(ISD::VECTOR_SHUFFLE, Order, dl, VTs), Mask(M) {} 1588 1589 public: 1590 ArrayRef<int> getMask() const { 1591 EVT VT = getValueType(0); 1592 return ArrayRef(Mask, VT.getVectorNumElements()); 1593 } 1594 1595 int getMaskElt(unsigned Idx) const { 1596 assert(Idx < getValueType(0).getVectorNumElements() && "Idx out of range!"); 1597 return Mask[Idx]; 1598 } 1599 1600 bool isSplat() const { return isSplatMask(Mask, getValueType(0)); } 1601 1602 int getSplatIndex() const { 1603 assert(isSplat() && "Cannot get splat index for non-splat!"); 1604 EVT VT = getValueType(0); 1605 for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i) 1606 if (Mask[i] >= 0) 1607 return Mask[i]; 1608 1609 // We can choose any index value here and be correct because all elements 1610 // are undefined. Return 0 for better potential for callers to simplify. 1611 return 0; 1612 } 1613 1614 static bool isSplatMask(const int *Mask, EVT VT); 1615 1616 /// Change values in a shuffle permute mask assuming 1617 /// the two vector operands have swapped position. 1618 static void commuteMask(MutableArrayRef<int> Mask) { 1619 unsigned NumElems = Mask.size(); 1620 for (unsigned i = 0; i != NumElems; ++i) { 1621 int idx = Mask[i]; 1622 if (idx < 0) 1623 continue; 1624 else if (idx < (int)NumElems) 1625 Mask[i] = idx + NumElems; 1626 else 1627 Mask[i] = idx - NumElems; 1628 } 1629 } 1630 1631 static bool classof(const SDNode *N) { 1632 return N->getOpcode() == ISD::VECTOR_SHUFFLE; 1633 } 1634 }; 1635 1636 class ConstantSDNode : public SDNode { 1637 friend class SelectionDAG; 1638 1639 const ConstantInt *Value; 1640 1641 ConstantSDNode(bool isTarget, bool isOpaque, const ConstantInt *val, 1642 SDVTList VTs) 1643 : SDNode(isTarget ? ISD::TargetConstant : ISD::Constant, 0, DebugLoc(), 1644 VTs), 1645 Value(val) { 1646 ConstantSDNodeBits.IsOpaque = isOpaque; 1647 } 1648 1649 public: 1650 const ConstantInt *getConstantIntValue() const { return Value; } 1651 const APInt &getAPIntValue() const { return Value->getValue(); } 1652 uint64_t getZExtValue() const { return Value->getZExtValue(); } 1653 int64_t getSExtValue() const { return Value->getSExtValue(); } 1654 uint64_t getLimitedValue(uint64_t Limit = UINT64_MAX) { 1655 return Value->getLimitedValue(Limit); 1656 } 1657 MaybeAlign getMaybeAlignValue() const { return Value->getMaybeAlignValue(); } 1658 Align getAlignValue() const { return Value->getAlignValue(); } 1659 1660 bool isOne() const { return Value->isOne(); } 1661 bool isZero() const { return Value->isZero(); } 1662 bool isAllOnes() const { return Value->isMinusOne(); } 1663 bool isMaxSignedValue() const { return Value->isMaxValue(true); } 1664 bool isMinSignedValue() const { return Value->isMinValue(true); } 1665 1666 bool isOpaque() const { return ConstantSDNodeBits.IsOpaque; } 1667 1668 static bool classof(const SDNode *N) { 1669 return N->getOpcode() == ISD::Constant || 1670 N->getOpcode() == ISD::TargetConstant; 1671 } 1672 }; 1673 1674 uint64_t SDNode::getConstantOperandVal(unsigned Num) const { 1675 return cast<ConstantSDNode>(getOperand(Num))->getZExtValue(); 1676 } 1677 1678 uint64_t SDNode::getAsZExtVal() const { 1679 return cast<ConstantSDNode>(this)->getZExtValue(); 1680 } 1681 1682 const APInt &SDNode::getConstantOperandAPInt(unsigned Num) const { 1683 return cast<ConstantSDNode>(getOperand(Num))->getAPIntValue(); 1684 } 1685 1686 const APInt &SDNode::getAsAPIntVal() const { 1687 return cast<ConstantSDNode>(this)->getAPIntValue(); 1688 } 1689 1690 class ConstantFPSDNode : public SDNode { 1691 friend class SelectionDAG; 1692 1693 const ConstantFP *Value; 1694 1695 ConstantFPSDNode(bool isTarget, const ConstantFP *val, SDVTList VTs) 1696 : SDNode(isTarget ? ISD::TargetConstantFP : ISD::ConstantFP, 0, 1697 DebugLoc(), VTs), 1698 Value(val) {} 1699 1700 public: 1701 const APFloat& getValueAPF() const { return Value->getValueAPF(); } 1702 const ConstantFP *getConstantFPValue() const { return Value; } 1703 1704 /// Return true if the value is positive or negative zero. 1705 bool isZero() const { return Value->isZero(); } 1706 1707 /// Return true if the value is a NaN. 1708 bool isNaN() const { return Value->isNaN(); } 1709 1710 /// Return true if the value is an infinity 1711 bool isInfinity() const { return Value->isInfinity(); } 1712 1713 /// Return true if the value is negative. 1714 bool isNegative() const { return Value->isNegative(); } 1715 1716 /// We don't rely on operator== working on double values, as 1717 /// it returns true for things that are clearly not equal, like -0.0 and 0.0. 1718 /// As such, this method can be used to do an exact bit-for-bit comparison of 1719 /// two floating point values. 1720 1721 /// We leave the version with the double argument here because it's just so 1722 /// convenient to write "2.0" and the like. Without this function we'd 1723 /// have to duplicate its logic everywhere it's called. 1724 bool isExactlyValue(double V) const { 1725 return Value->getValueAPF().isExactlyValue(V); 1726 } 1727 bool isExactlyValue(const APFloat& V) const; 1728 1729 static bool isValueValidForType(EVT VT, const APFloat& Val); 1730 1731 static bool classof(const SDNode *N) { 1732 return N->getOpcode() == ISD::ConstantFP || 1733 N->getOpcode() == ISD::TargetConstantFP; 1734 } 1735 }; 1736 1737 /// Returns true if \p V is a constant integer zero. 1738 bool isNullConstant(SDValue V); 1739 1740 /// Returns true if \p V is an FP constant with a value of positive zero. 1741 bool isNullFPConstant(SDValue V); 1742 1743 /// Returns true if \p V is an integer constant with all bits set. 1744 bool isAllOnesConstant(SDValue V); 1745 1746 /// Returns true if \p V is a constant integer one. 1747 bool isOneConstant(SDValue V); 1748 1749 /// Returns true if \p V is a constant min signed integer value. 1750 bool isMinSignedConstant(SDValue V); 1751 1752 /// Returns true if \p V is a neutral element of Opc with Flags. 1753 /// When OperandNo is 0, it checks that V is a left identity. Otherwise, it 1754 /// checks that V is a right identity. 1755 bool isNeutralConstant(unsigned Opc, SDNodeFlags Flags, SDValue V, 1756 unsigned OperandNo); 1757 1758 /// Return the non-bitcasted source operand of \p V if it exists. 1759 /// If \p V is not a bitcasted value, it is returned as-is. 1760 SDValue peekThroughBitcasts(SDValue V); 1761 1762 /// Return the non-bitcasted and one-use source operand of \p V if it exists. 1763 /// If \p V is not a bitcasted one-use value, it is returned as-is. 1764 SDValue peekThroughOneUseBitcasts(SDValue V); 1765 1766 /// Return the non-extracted vector source operand of \p V if it exists. 1767 /// If \p V is not an extracted subvector, it is returned as-is. 1768 SDValue peekThroughExtractSubvectors(SDValue V); 1769 1770 /// Return the non-truncated source operand of \p V if it exists. 1771 /// If \p V is not a truncation, it is returned as-is. 1772 SDValue peekThroughTruncates(SDValue V); 1773 1774 /// Returns true if \p V is a bitwise not operation. Assumes that an all ones 1775 /// constant is canonicalized to be operand 1. 1776 bool isBitwiseNot(SDValue V, bool AllowUndefs = false); 1777 1778 /// If \p V is a bitwise not, returns the inverted operand. Otherwise returns 1779 /// an empty SDValue. Only bits set in \p Mask are required to be inverted, 1780 /// other bits may be arbitrary. 1781 SDValue getBitwiseNotOperand(SDValue V, SDValue Mask, bool AllowUndefs); 1782 1783 /// Returns the SDNode if it is a constant splat BuildVector or constant int. 1784 ConstantSDNode *isConstOrConstSplat(SDValue N, bool AllowUndefs = false, 1785 bool AllowTruncation = false); 1786 1787 /// Returns the SDNode if it is a demanded constant splat BuildVector or 1788 /// constant int. 1789 ConstantSDNode *isConstOrConstSplat(SDValue N, const APInt &DemandedElts, 1790 bool AllowUndefs = false, 1791 bool AllowTruncation = false); 1792 1793 /// Returns the SDNode if it is a constant splat BuildVector or constant float. 1794 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, bool AllowUndefs = false); 1795 1796 /// Returns the SDNode if it is a demanded constant splat BuildVector or 1797 /// constant float. 1798 ConstantFPSDNode *isConstOrConstSplatFP(SDValue N, const APInt &DemandedElts, 1799 bool AllowUndefs = false); 1800 1801 /// Return true if the value is a constant 0 integer or a splatted vector of 1802 /// a constant 0 integer (with no undefs by default). 1803 /// Build vector implicit truncation is not an issue for null values. 1804 bool isNullOrNullSplat(SDValue V, bool AllowUndefs = false); 1805 1806 /// Return true if the value is a constant 1 integer or a splatted vector of a 1807 /// constant 1 integer (with no undefs). 1808 /// Build vector implicit truncation is allowed, but the truncated bits need to 1809 /// be zero. 1810 bool isOneOrOneSplat(SDValue V, bool AllowUndefs = false); 1811 1812 /// Return true if the value is a constant -1 integer or a splatted vector of a 1813 /// constant -1 integer (with no undefs). 1814 /// Does not permit build vector implicit truncation. 1815 bool isAllOnesOrAllOnesSplat(SDValue V, bool AllowUndefs = false); 1816 1817 /// Return true if \p V is either a integer or FP constant. 1818 inline bool isIntOrFPConstant(SDValue V) { 1819 return isa<ConstantSDNode>(V) || isa<ConstantFPSDNode>(V); 1820 } 1821 1822 class GlobalAddressSDNode : public SDNode { 1823 friend class SelectionDAG; 1824 1825 const GlobalValue *TheGlobal; 1826 int64_t Offset; 1827 unsigned TargetFlags; 1828 1829 GlobalAddressSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL, 1830 const GlobalValue *GA, SDVTList VTs, int64_t o, 1831 unsigned TF) 1832 : SDNode(Opc, Order, DL, VTs), TheGlobal(GA), Offset(o), TargetFlags(TF) { 1833 } 1834 1835 public: 1836 const GlobalValue *getGlobal() const { return TheGlobal; } 1837 int64_t getOffset() const { return Offset; } 1838 unsigned getTargetFlags() const { return TargetFlags; } 1839 // Return the address space this GlobalAddress belongs to. 1840 unsigned getAddressSpace() const; 1841 1842 static bool classof(const SDNode *N) { 1843 return N->getOpcode() == ISD::GlobalAddress || 1844 N->getOpcode() == ISD::TargetGlobalAddress || 1845 N->getOpcode() == ISD::GlobalTLSAddress || 1846 N->getOpcode() == ISD::TargetGlobalTLSAddress; 1847 } 1848 }; 1849 1850 class FrameIndexSDNode : public SDNode { 1851 friend class SelectionDAG; 1852 1853 int FI; 1854 1855 FrameIndexSDNode(int fi, SDVTList VTs, bool isTarg) 1856 : SDNode(isTarg ? ISD::TargetFrameIndex : ISD::FrameIndex, 0, DebugLoc(), 1857 VTs), 1858 FI(fi) {} 1859 1860 public: 1861 int getIndex() const { return FI; } 1862 1863 static bool classof(const SDNode *N) { 1864 return N->getOpcode() == ISD::FrameIndex || 1865 N->getOpcode() == ISD::TargetFrameIndex; 1866 } 1867 }; 1868 1869 /// This SDNode is used for LIFETIME_START/LIFETIME_END values, which indicate 1870 /// the offet and size that are started/ended in the underlying FrameIndex. 1871 class LifetimeSDNode : public SDNode { 1872 friend class SelectionDAG; 1873 int64_t Size; 1874 int64_t Offset; // -1 if offset is unknown. 1875 1876 LifetimeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, 1877 SDVTList VTs, int64_t Size, int64_t Offset) 1878 : SDNode(Opcode, Order, dl, VTs), Size(Size), Offset(Offset) {} 1879 public: 1880 int64_t getFrameIndex() const { 1881 return cast<FrameIndexSDNode>(getOperand(1))->getIndex(); 1882 } 1883 1884 bool hasOffset() const { return Offset >= 0; } 1885 int64_t getOffset() const { 1886 assert(hasOffset() && "offset is unknown"); 1887 return Offset; 1888 } 1889 int64_t getSize() const { 1890 assert(hasOffset() && "offset is unknown"); 1891 return Size; 1892 } 1893 1894 // Methods to support isa and dyn_cast 1895 static bool classof(const SDNode *N) { 1896 return N->getOpcode() == ISD::LIFETIME_START || 1897 N->getOpcode() == ISD::LIFETIME_END; 1898 } 1899 }; 1900 1901 /// This SDNode is used for PSEUDO_PROBE values, which are the function guid and 1902 /// the index of the basic block being probed. A pseudo probe serves as a place 1903 /// holder and will be removed at the end of compilation. It does not have any 1904 /// operand because we do not want the instruction selection to deal with any. 1905 class PseudoProbeSDNode : public SDNode { 1906 friend class SelectionDAG; 1907 uint64_t Guid; 1908 uint64_t Index; 1909 uint32_t Attributes; 1910 1911 PseudoProbeSDNode(unsigned Opcode, unsigned Order, const DebugLoc &Dl, 1912 SDVTList VTs, uint64_t Guid, uint64_t Index, uint32_t Attr) 1913 : SDNode(Opcode, Order, Dl, VTs), Guid(Guid), Index(Index), 1914 Attributes(Attr) {} 1915 1916 public: 1917 uint64_t getGuid() const { return Guid; } 1918 uint64_t getIndex() const { return Index; } 1919 uint32_t getAttributes() const { return Attributes; } 1920 1921 // Methods to support isa and dyn_cast 1922 static bool classof(const SDNode *N) { 1923 return N->getOpcode() == ISD::PSEUDO_PROBE; 1924 } 1925 }; 1926 1927 class JumpTableSDNode : public SDNode { 1928 friend class SelectionDAG; 1929 1930 int JTI; 1931 unsigned TargetFlags; 1932 1933 JumpTableSDNode(int jti, SDVTList VTs, bool isTarg, unsigned TF) 1934 : SDNode(isTarg ? ISD::TargetJumpTable : ISD::JumpTable, 0, DebugLoc(), 1935 VTs), 1936 JTI(jti), TargetFlags(TF) {} 1937 1938 public: 1939 int getIndex() const { return JTI; } 1940 unsigned getTargetFlags() const { return TargetFlags; } 1941 1942 static bool classof(const SDNode *N) { 1943 return N->getOpcode() == ISD::JumpTable || 1944 N->getOpcode() == ISD::TargetJumpTable; 1945 } 1946 }; 1947 1948 class ConstantPoolSDNode : public SDNode { 1949 friend class SelectionDAG; 1950 1951 union { 1952 const Constant *ConstVal; 1953 MachineConstantPoolValue *MachineCPVal; 1954 } Val; 1955 int Offset; // It's a MachineConstantPoolValue if top bit is set. 1956 Align Alignment; // Minimum alignment requirement of CP. 1957 unsigned TargetFlags; 1958 1959 ConstantPoolSDNode(bool isTarget, const Constant *c, SDVTList VTs, int o, 1960 Align Alignment, unsigned TF) 1961 : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0, 1962 DebugLoc(), VTs), 1963 Offset(o), Alignment(Alignment), TargetFlags(TF) { 1964 assert(Offset >= 0 && "Offset is too large"); 1965 Val.ConstVal = c; 1966 } 1967 1968 ConstantPoolSDNode(bool isTarget, MachineConstantPoolValue *v, SDVTList VTs, 1969 int o, Align Alignment, unsigned TF) 1970 : SDNode(isTarget ? ISD::TargetConstantPool : ISD::ConstantPool, 0, 1971 DebugLoc(), VTs), 1972 Offset(o), Alignment(Alignment), TargetFlags(TF) { 1973 assert(Offset >= 0 && "Offset is too large"); 1974 Val.MachineCPVal = v; 1975 Offset |= 1 << (sizeof(unsigned)*CHAR_BIT-1); 1976 } 1977 1978 public: 1979 bool isMachineConstantPoolEntry() const { 1980 return Offset < 0; 1981 } 1982 1983 const Constant *getConstVal() const { 1984 assert(!isMachineConstantPoolEntry() && "Wrong constantpool type"); 1985 return Val.ConstVal; 1986 } 1987 1988 MachineConstantPoolValue *getMachineCPVal() const { 1989 assert(isMachineConstantPoolEntry() && "Wrong constantpool type"); 1990 return Val.MachineCPVal; 1991 } 1992 1993 int getOffset() const { 1994 return Offset & ~(1 << (sizeof(unsigned)*CHAR_BIT-1)); 1995 } 1996 1997 // Return the alignment of this constant pool object, which is either 0 (for 1998 // default alignment) or the desired value. 1999 Align getAlign() const { return Alignment; } 2000 unsigned getTargetFlags() const { return TargetFlags; } 2001 2002 Type *getType() const; 2003 2004 static bool classof(const SDNode *N) { 2005 return N->getOpcode() == ISD::ConstantPool || 2006 N->getOpcode() == ISD::TargetConstantPool; 2007 } 2008 }; 2009 2010 /// Completely target-dependent object reference. 2011 class TargetIndexSDNode : public SDNode { 2012 friend class SelectionDAG; 2013 2014 unsigned TargetFlags; 2015 int Index; 2016 int64_t Offset; 2017 2018 public: 2019 TargetIndexSDNode(int Idx, SDVTList VTs, int64_t Ofs, unsigned TF) 2020 : SDNode(ISD::TargetIndex, 0, DebugLoc(), VTs), TargetFlags(TF), 2021 Index(Idx), Offset(Ofs) {} 2022 2023 unsigned getTargetFlags() const { return TargetFlags; } 2024 int getIndex() const { return Index; } 2025 int64_t getOffset() const { return Offset; } 2026 2027 static bool classof(const SDNode *N) { 2028 return N->getOpcode() == ISD::TargetIndex; 2029 } 2030 }; 2031 2032 class BasicBlockSDNode : public SDNode { 2033 friend class SelectionDAG; 2034 2035 MachineBasicBlock *MBB; 2036 2037 /// Debug info is meaningful and potentially useful here, but we create 2038 /// blocks out of order when they're jumped to, which makes it a bit 2039 /// harder. Let's see if we need it first. 2040 explicit BasicBlockSDNode(MachineBasicBlock *mbb) 2041 : SDNode(ISD::BasicBlock, 0, DebugLoc(), getSDVTList(MVT::Other)), MBB(mbb) 2042 {} 2043 2044 public: 2045 MachineBasicBlock *getBasicBlock() const { return MBB; } 2046 2047 static bool classof(const SDNode *N) { 2048 return N->getOpcode() == ISD::BasicBlock; 2049 } 2050 }; 2051 2052 /// A "pseudo-class" with methods for operating on BUILD_VECTORs. 2053 class BuildVectorSDNode : public SDNode { 2054 public: 2055 // These are constructed as SDNodes and then cast to BuildVectorSDNodes. 2056 explicit BuildVectorSDNode() = delete; 2057 2058 /// Check if this is a constant splat, and if so, find the 2059 /// smallest element size that splats the vector. If MinSplatBits is 2060 /// nonzero, the element size must be at least that large. Note that the 2061 /// splat element may be the entire vector (i.e., a one element vector). 2062 /// Returns the splat element value in SplatValue. Any undefined bits in 2063 /// that value are zero, and the corresponding bits in the SplatUndef mask 2064 /// are set. The SplatBitSize value is set to the splat element size in 2065 /// bits. HasAnyUndefs is set to true if any bits in the vector are 2066 /// undefined. isBigEndian describes the endianness of the target. 2067 bool isConstantSplat(APInt &SplatValue, APInt &SplatUndef, 2068 unsigned &SplatBitSize, bool &HasAnyUndefs, 2069 unsigned MinSplatBits = 0, 2070 bool isBigEndian = false) const; 2071 2072 /// Returns the demanded splatted value or a null value if this is not a 2073 /// splat. 2074 /// 2075 /// The DemandedElts mask indicates the elements that must be in the splat. 2076 /// If passed a non-null UndefElements bitvector, it will resize it to match 2077 /// the vector width and set the bits where elements are undef. 2078 SDValue getSplatValue(const APInt &DemandedElts, 2079 BitVector *UndefElements = nullptr) const; 2080 2081 /// Returns the splatted value or a null value if this is not a splat. 2082 /// 2083 /// If passed a non-null UndefElements bitvector, it will resize it to match 2084 /// the vector width and set the bits where elements are undef. 2085 SDValue getSplatValue(BitVector *UndefElements = nullptr) const; 2086 2087 /// Find the shortest repeating sequence of values in the build vector. 2088 /// 2089 /// e.g. { u, X, u, X, u, u, X, u } -> { X } 2090 /// { X, Y, u, Y, u, u, X, u } -> { X, Y } 2091 /// 2092 /// Currently this must be a power-of-2 build vector. 2093 /// The DemandedElts mask indicates the elements that must be present, 2094 /// undemanded elements in Sequence may be null (SDValue()). If passed a 2095 /// non-null UndefElements bitvector, it will resize it to match the original 2096 /// vector width and set the bits where elements are undef. If result is 2097 /// false, Sequence will be empty. 2098 bool getRepeatedSequence(const APInt &DemandedElts, 2099 SmallVectorImpl<SDValue> &Sequence, 2100 BitVector *UndefElements = nullptr) const; 2101 2102 /// Find the shortest repeating sequence of values in the build vector. 2103 /// 2104 /// e.g. { u, X, u, X, u, u, X, u } -> { X } 2105 /// { X, Y, u, Y, u, u, X, u } -> { X, Y } 2106 /// 2107 /// Currently this must be a power-of-2 build vector. 2108 /// If passed a non-null UndefElements bitvector, it will resize it to match 2109 /// the original vector width and set the bits where elements are undef. 2110 /// If result is false, Sequence will be empty. 2111 bool getRepeatedSequence(SmallVectorImpl<SDValue> &Sequence, 2112 BitVector *UndefElements = nullptr) const; 2113 2114 /// Returns the demanded splatted constant or null if this is not a constant 2115 /// splat. 2116 /// 2117 /// The DemandedElts mask indicates the elements that must be in the splat. 2118 /// If passed a non-null UndefElements bitvector, it will resize it to match 2119 /// the vector width and set the bits where elements are undef. 2120 ConstantSDNode * 2121 getConstantSplatNode(const APInt &DemandedElts, 2122 BitVector *UndefElements = nullptr) const; 2123 2124 /// Returns the splatted constant or null if this is not a constant 2125 /// splat. 2126 /// 2127 /// If passed a non-null UndefElements bitvector, it will resize it to match 2128 /// the vector width and set the bits where elements are undef. 2129 ConstantSDNode * 2130 getConstantSplatNode(BitVector *UndefElements = nullptr) const; 2131 2132 /// Returns the demanded splatted constant FP or null if this is not a 2133 /// constant FP splat. 2134 /// 2135 /// The DemandedElts mask indicates the elements that must be in the splat. 2136 /// If passed a non-null UndefElements bitvector, it will resize it to match 2137 /// the vector width and set the bits where elements are undef. 2138 ConstantFPSDNode * 2139 getConstantFPSplatNode(const APInt &DemandedElts, 2140 BitVector *UndefElements = nullptr) const; 2141 2142 /// Returns the splatted constant FP or null if this is not a constant 2143 /// FP splat. 2144 /// 2145 /// If passed a non-null UndefElements bitvector, it will resize it to match 2146 /// the vector width and set the bits where elements are undef. 2147 ConstantFPSDNode * 2148 getConstantFPSplatNode(BitVector *UndefElements = nullptr) const; 2149 2150 /// If this is a constant FP splat and the splatted constant FP is an 2151 /// exact power or 2, return the log base 2 integer value. Otherwise, 2152 /// return -1. 2153 /// 2154 /// The BitWidth specifies the necessary bit precision. 2155 int32_t getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements, 2156 uint32_t BitWidth) const; 2157 2158 /// Extract the raw bit data from a build vector of Undef, Constant or 2159 /// ConstantFP node elements. Each raw bit element will be \p 2160 /// DstEltSizeInBits wide, undef elements are treated as zero, and entirely 2161 /// undefined elements are flagged in \p UndefElements. 2162 bool getConstantRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits, 2163 SmallVectorImpl<APInt> &RawBitElements, 2164 BitVector &UndefElements) const; 2165 2166 bool isConstant() const; 2167 2168 /// If this BuildVector is constant and represents the numerical series 2169 /// "<a, a+n, a+2n, a+3n, ...>" where a is integer and n is a non-zero integer, 2170 /// the value "<a,n>" is returned. 2171 std::optional<std::pair<APInt, APInt>> isConstantSequence() const; 2172 2173 /// Recast bit data \p SrcBitElements to \p DstEltSizeInBits wide elements. 2174 /// Undef elements are treated as zero, and entirely undefined elements are 2175 /// flagged in \p DstUndefElements. 2176 static void recastRawBits(bool IsLittleEndian, unsigned DstEltSizeInBits, 2177 SmallVectorImpl<APInt> &DstBitElements, 2178 ArrayRef<APInt> SrcBitElements, 2179 BitVector &DstUndefElements, 2180 const BitVector &SrcUndefElements); 2181 2182 static bool classof(const SDNode *N) { 2183 return N->getOpcode() == ISD::BUILD_VECTOR; 2184 } 2185 }; 2186 2187 /// An SDNode that holds an arbitrary LLVM IR Value. This is 2188 /// used when the SelectionDAG needs to make a simple reference to something 2189 /// in the LLVM IR representation. 2190 /// 2191 class SrcValueSDNode : public SDNode { 2192 friend class SelectionDAG; 2193 2194 const Value *V; 2195 2196 /// Create a SrcValue for a general value. 2197 explicit SrcValueSDNode(const Value *v) 2198 : SDNode(ISD::SRCVALUE, 0, DebugLoc(), getSDVTList(MVT::Other)), V(v) {} 2199 2200 public: 2201 /// Return the contained Value. 2202 const Value *getValue() const { return V; } 2203 2204 static bool classof(const SDNode *N) { 2205 return N->getOpcode() == ISD::SRCVALUE; 2206 } 2207 }; 2208 2209 class MDNodeSDNode : public SDNode { 2210 friend class SelectionDAG; 2211 2212 const MDNode *MD; 2213 2214 explicit MDNodeSDNode(const MDNode *md) 2215 : SDNode(ISD::MDNODE_SDNODE, 0, DebugLoc(), getSDVTList(MVT::Other)), MD(md) 2216 {} 2217 2218 public: 2219 const MDNode *getMD() const { return MD; } 2220 2221 static bool classof(const SDNode *N) { 2222 return N->getOpcode() == ISD::MDNODE_SDNODE; 2223 } 2224 }; 2225 2226 class RegisterSDNode : public SDNode { 2227 friend class SelectionDAG; 2228 2229 Register Reg; 2230 2231 RegisterSDNode(Register reg, SDVTList VTs) 2232 : SDNode(ISD::Register, 0, DebugLoc(), VTs), Reg(reg) {} 2233 2234 public: 2235 Register getReg() const { return Reg; } 2236 2237 static bool classof(const SDNode *N) { 2238 return N->getOpcode() == ISD::Register; 2239 } 2240 }; 2241 2242 class RegisterMaskSDNode : public SDNode { 2243 friend class SelectionDAG; 2244 2245 // The memory for RegMask is not owned by the node. 2246 const uint32_t *RegMask; 2247 2248 RegisterMaskSDNode(const uint32_t *mask) 2249 : SDNode(ISD::RegisterMask, 0, DebugLoc(), getSDVTList(MVT::Untyped)), 2250 RegMask(mask) {} 2251 2252 public: 2253 const uint32_t *getRegMask() const { return RegMask; } 2254 2255 static bool classof(const SDNode *N) { 2256 return N->getOpcode() == ISD::RegisterMask; 2257 } 2258 }; 2259 2260 class BlockAddressSDNode : public SDNode { 2261 friend class SelectionDAG; 2262 2263 const BlockAddress *BA; 2264 int64_t Offset; 2265 unsigned TargetFlags; 2266 2267 BlockAddressSDNode(unsigned NodeTy, SDVTList VTs, const BlockAddress *ba, 2268 int64_t o, unsigned Flags) 2269 : SDNode(NodeTy, 0, DebugLoc(), VTs), BA(ba), Offset(o), 2270 TargetFlags(Flags) {} 2271 2272 public: 2273 const BlockAddress *getBlockAddress() const { return BA; } 2274 int64_t getOffset() const { return Offset; } 2275 unsigned getTargetFlags() const { return TargetFlags; } 2276 2277 static bool classof(const SDNode *N) { 2278 return N->getOpcode() == ISD::BlockAddress || 2279 N->getOpcode() == ISD::TargetBlockAddress; 2280 } 2281 }; 2282 2283 class LabelSDNode : public SDNode { 2284 friend class SelectionDAG; 2285 2286 MCSymbol *Label; 2287 2288 LabelSDNode(unsigned Opcode, unsigned Order, const DebugLoc &dl, MCSymbol *L) 2289 : SDNode(Opcode, Order, dl, getSDVTList(MVT::Other)), Label(L) { 2290 assert(LabelSDNode::classof(this) && "not a label opcode"); 2291 } 2292 2293 public: 2294 MCSymbol *getLabel() const { return Label; } 2295 2296 static bool classof(const SDNode *N) { 2297 return N->getOpcode() == ISD::EH_LABEL || 2298 N->getOpcode() == ISD::ANNOTATION_LABEL; 2299 } 2300 }; 2301 2302 class ExternalSymbolSDNode : public SDNode { 2303 friend class SelectionDAG; 2304 2305 const char *Symbol; 2306 unsigned TargetFlags; 2307 2308 ExternalSymbolSDNode(bool isTarget, const char *Sym, unsigned TF, 2309 SDVTList VTs) 2310 : SDNode(isTarget ? ISD::TargetExternalSymbol : ISD::ExternalSymbol, 0, 2311 DebugLoc(), VTs), 2312 Symbol(Sym), TargetFlags(TF) {} 2313 2314 public: 2315 const char *getSymbol() const { return Symbol; } 2316 unsigned getTargetFlags() const { return TargetFlags; } 2317 2318 static bool classof(const SDNode *N) { 2319 return N->getOpcode() == ISD::ExternalSymbol || 2320 N->getOpcode() == ISD::TargetExternalSymbol; 2321 } 2322 }; 2323 2324 class MCSymbolSDNode : public SDNode { 2325 friend class SelectionDAG; 2326 2327 MCSymbol *Symbol; 2328 2329 MCSymbolSDNode(MCSymbol *Symbol, SDVTList VTs) 2330 : SDNode(ISD::MCSymbol, 0, DebugLoc(), VTs), Symbol(Symbol) {} 2331 2332 public: 2333 MCSymbol *getMCSymbol() const { return Symbol; } 2334 2335 static bool classof(const SDNode *N) { 2336 return N->getOpcode() == ISD::MCSymbol; 2337 } 2338 }; 2339 2340 class CondCodeSDNode : public SDNode { 2341 friend class SelectionDAG; 2342 2343 ISD::CondCode Condition; 2344 2345 explicit CondCodeSDNode(ISD::CondCode Cond) 2346 : SDNode(ISD::CONDCODE, 0, DebugLoc(), getSDVTList(MVT::Other)), 2347 Condition(Cond) {} 2348 2349 public: 2350 ISD::CondCode get() const { return Condition; } 2351 2352 static bool classof(const SDNode *N) { 2353 return N->getOpcode() == ISD::CONDCODE; 2354 } 2355 }; 2356 2357 /// This class is used to represent EVT's, which are used 2358 /// to parameterize some operations. 2359 class VTSDNode : public SDNode { 2360 friend class SelectionDAG; 2361 2362 EVT ValueType; 2363 2364 explicit VTSDNode(EVT VT) 2365 : SDNode(ISD::VALUETYPE, 0, DebugLoc(), getSDVTList(MVT::Other)), 2366 ValueType(VT) {} 2367 2368 public: 2369 EVT getVT() const { return ValueType; } 2370 2371 static bool classof(const SDNode *N) { 2372 return N->getOpcode() == ISD::VALUETYPE; 2373 } 2374 }; 2375 2376 /// Base class for LoadSDNode and StoreSDNode 2377 class LSBaseSDNode : public MemSDNode { 2378 public: 2379 LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, const DebugLoc &dl, 2380 SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, 2381 MachineMemOperand *MMO) 2382 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2383 LSBaseSDNodeBits.AddressingMode = AM; 2384 assert(getAddressingMode() == AM && "Value truncated"); 2385 } 2386 2387 const SDValue &getOffset() const { 2388 return getOperand(getOpcode() == ISD::LOAD ? 2 : 3); 2389 } 2390 2391 /// Return the addressing mode for this load or store: 2392 /// unindexed, pre-inc, pre-dec, post-inc, or post-dec. 2393 ISD::MemIndexedMode getAddressingMode() const { 2394 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode); 2395 } 2396 2397 /// Return true if this is a pre/post inc/dec load/store. 2398 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; } 2399 2400 /// Return true if this is NOT a pre/post inc/dec load/store. 2401 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; } 2402 2403 static bool classof(const SDNode *N) { 2404 return N->getOpcode() == ISD::LOAD || 2405 N->getOpcode() == ISD::STORE; 2406 } 2407 }; 2408 2409 /// This class is used to represent ISD::LOAD nodes. 2410 class LoadSDNode : public LSBaseSDNode { 2411 friend class SelectionDAG; 2412 2413 LoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2414 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT, 2415 MachineMemOperand *MMO) 2416 : LSBaseSDNode(ISD::LOAD, Order, dl, VTs, AM, MemVT, MMO) { 2417 LoadSDNodeBits.ExtTy = ETy; 2418 assert(readMem() && "Load MachineMemOperand is not a load!"); 2419 assert(!writeMem() && "Load MachineMemOperand is a store!"); 2420 } 2421 2422 public: 2423 /// Return whether this is a plain node, 2424 /// or one of the varieties of value-extending loads. 2425 ISD::LoadExtType getExtensionType() const { 2426 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy); 2427 } 2428 2429 const SDValue &getBasePtr() const { return getOperand(1); } 2430 const SDValue &getOffset() const { return getOperand(2); } 2431 2432 static bool classof(const SDNode *N) { 2433 return N->getOpcode() == ISD::LOAD; 2434 } 2435 }; 2436 2437 /// This class is used to represent ISD::STORE nodes. 2438 class StoreSDNode : public LSBaseSDNode { 2439 friend class SelectionDAG; 2440 2441 StoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2442 ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT, 2443 MachineMemOperand *MMO) 2444 : LSBaseSDNode(ISD::STORE, Order, dl, VTs, AM, MemVT, MMO) { 2445 StoreSDNodeBits.IsTruncating = isTrunc; 2446 assert(!readMem() && "Store MachineMemOperand is a load!"); 2447 assert(writeMem() && "Store MachineMemOperand is not a store!"); 2448 } 2449 2450 public: 2451 /// Return true if the op does a truncation before store. 2452 /// For integers this is the same as doing a TRUNCATE and storing the result. 2453 /// For floats, it is the same as doing an FP_ROUND and storing the result. 2454 bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; } 2455 void setTruncatingStore(bool Truncating) { 2456 StoreSDNodeBits.IsTruncating = Truncating; 2457 } 2458 2459 const SDValue &getValue() const { return getOperand(1); } 2460 const SDValue &getBasePtr() const { return getOperand(2); } 2461 const SDValue &getOffset() const { return getOperand(3); } 2462 2463 static bool classof(const SDNode *N) { 2464 return N->getOpcode() == ISD::STORE; 2465 } 2466 }; 2467 2468 /// This base class is used to represent VP_LOAD, VP_STORE, 2469 /// EXPERIMENTAL_VP_STRIDED_LOAD and EXPERIMENTAL_VP_STRIDED_STORE nodes 2470 class VPBaseLoadStoreSDNode : public MemSDNode { 2471 public: 2472 friend class SelectionDAG; 2473 2474 VPBaseLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order, 2475 const DebugLoc &DL, SDVTList VTs, 2476 ISD::MemIndexedMode AM, EVT MemVT, 2477 MachineMemOperand *MMO) 2478 : MemSDNode(NodeTy, Order, DL, VTs, MemVT, MMO) { 2479 LSBaseSDNodeBits.AddressingMode = AM; 2480 assert(getAddressingMode() == AM && "Value truncated"); 2481 } 2482 2483 // VPStridedStoreSDNode (Chain, Data, Ptr, Offset, Stride, Mask, EVL) 2484 // VPStoreSDNode (Chain, Data, Ptr, Offset, Mask, EVL) 2485 // VPStridedLoadSDNode (Chain, Ptr, Offset, Stride, Mask, EVL) 2486 // VPLoadSDNode (Chain, Ptr, Offset, Mask, EVL) 2487 // Mask is a vector of i1 elements; 2488 // the type of EVL is TLI.getVPExplicitVectorLengthTy(). 2489 const SDValue &getOffset() const { 2490 return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD || 2491 getOpcode() == ISD::VP_LOAD) 2492 ? 2 2493 : 3); 2494 } 2495 const SDValue &getBasePtr() const { 2496 return getOperand((getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD || 2497 getOpcode() == ISD::VP_LOAD) 2498 ? 1 2499 : 2); 2500 } 2501 const SDValue &getMask() const { 2502 switch (getOpcode()) { 2503 default: 2504 llvm_unreachable("Invalid opcode"); 2505 case ISD::VP_LOAD: 2506 return getOperand(3); 2507 case ISD::VP_STORE: 2508 case ISD::EXPERIMENTAL_VP_STRIDED_LOAD: 2509 return getOperand(4); 2510 case ISD::EXPERIMENTAL_VP_STRIDED_STORE: 2511 return getOperand(5); 2512 } 2513 } 2514 const SDValue &getVectorLength() const { 2515 switch (getOpcode()) { 2516 default: 2517 llvm_unreachable("Invalid opcode"); 2518 case ISD::VP_LOAD: 2519 return getOperand(4); 2520 case ISD::VP_STORE: 2521 case ISD::EXPERIMENTAL_VP_STRIDED_LOAD: 2522 return getOperand(5); 2523 case ISD::EXPERIMENTAL_VP_STRIDED_STORE: 2524 return getOperand(6); 2525 } 2526 } 2527 2528 /// Return the addressing mode for this load or store: 2529 /// unindexed, pre-inc, pre-dec, post-inc, or post-dec. 2530 ISD::MemIndexedMode getAddressingMode() const { 2531 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode); 2532 } 2533 2534 /// Return true if this is a pre/post inc/dec load/store. 2535 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; } 2536 2537 /// Return true if this is NOT a pre/post inc/dec load/store. 2538 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; } 2539 2540 static bool classof(const SDNode *N) { 2541 return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD || 2542 N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE || 2543 N->getOpcode() == ISD::VP_LOAD || N->getOpcode() == ISD::VP_STORE; 2544 } 2545 }; 2546 2547 /// This class is used to represent a VP_LOAD node 2548 class VPLoadSDNode : public VPBaseLoadStoreSDNode { 2549 public: 2550 friend class SelectionDAG; 2551 2552 VPLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2553 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, bool isExpanding, 2554 EVT MemVT, MachineMemOperand *MMO) 2555 : VPBaseLoadStoreSDNode(ISD::VP_LOAD, Order, dl, VTs, AM, MemVT, MMO) { 2556 LoadSDNodeBits.ExtTy = ETy; 2557 LoadSDNodeBits.IsExpanding = isExpanding; 2558 } 2559 2560 ISD::LoadExtType getExtensionType() const { 2561 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy); 2562 } 2563 2564 const SDValue &getBasePtr() const { return getOperand(1); } 2565 const SDValue &getOffset() const { return getOperand(2); } 2566 const SDValue &getMask() const { return getOperand(3); } 2567 const SDValue &getVectorLength() const { return getOperand(4); } 2568 2569 static bool classof(const SDNode *N) { 2570 return N->getOpcode() == ISD::VP_LOAD; 2571 } 2572 bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; } 2573 }; 2574 2575 /// This class is used to represent an EXPERIMENTAL_VP_STRIDED_LOAD node. 2576 class VPStridedLoadSDNode : public VPBaseLoadStoreSDNode { 2577 public: 2578 friend class SelectionDAG; 2579 2580 VPStridedLoadSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs, 2581 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, 2582 bool IsExpanding, EVT MemVT, MachineMemOperand *MMO) 2583 : VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_LOAD, Order, DL, VTs, 2584 AM, MemVT, MMO) { 2585 LoadSDNodeBits.ExtTy = ETy; 2586 LoadSDNodeBits.IsExpanding = IsExpanding; 2587 } 2588 2589 ISD::LoadExtType getExtensionType() const { 2590 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy); 2591 } 2592 2593 const SDValue &getBasePtr() const { return getOperand(1); } 2594 const SDValue &getOffset() const { return getOperand(2); } 2595 const SDValue &getStride() const { return getOperand(3); } 2596 const SDValue &getMask() const { return getOperand(4); } 2597 const SDValue &getVectorLength() const { return getOperand(5); } 2598 2599 static bool classof(const SDNode *N) { 2600 return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_LOAD; 2601 } 2602 bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; } 2603 }; 2604 2605 /// This class is used to represent a VP_STORE node 2606 class VPStoreSDNode : public VPBaseLoadStoreSDNode { 2607 public: 2608 friend class SelectionDAG; 2609 2610 VPStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2611 ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing, 2612 EVT MemVT, MachineMemOperand *MMO) 2613 : VPBaseLoadStoreSDNode(ISD::VP_STORE, Order, dl, VTs, AM, MemVT, MMO) { 2614 StoreSDNodeBits.IsTruncating = isTrunc; 2615 StoreSDNodeBits.IsCompressing = isCompressing; 2616 } 2617 2618 /// Return true if this is a truncating store. 2619 /// For integers this is the same as doing a TRUNCATE and storing the result. 2620 /// For floats, it is the same as doing an FP_ROUND and storing the result. 2621 bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; } 2622 2623 /// Returns true if the op does a compression to the vector before storing. 2624 /// The node contiguously stores the active elements (integers or floats) 2625 /// in src (those with their respective bit set in writemask k) to unaligned 2626 /// memory at base_addr. 2627 bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; } 2628 2629 const SDValue &getValue() const { return getOperand(1); } 2630 const SDValue &getBasePtr() const { return getOperand(2); } 2631 const SDValue &getOffset() const { return getOperand(3); } 2632 const SDValue &getMask() const { return getOperand(4); } 2633 const SDValue &getVectorLength() const { return getOperand(5); } 2634 2635 static bool classof(const SDNode *N) { 2636 return N->getOpcode() == ISD::VP_STORE; 2637 } 2638 }; 2639 2640 /// This class is used to represent an EXPERIMENTAL_VP_STRIDED_STORE node. 2641 class VPStridedStoreSDNode : public VPBaseLoadStoreSDNode { 2642 public: 2643 friend class SelectionDAG; 2644 2645 VPStridedStoreSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs, 2646 ISD::MemIndexedMode AM, bool IsTrunc, bool IsCompressing, 2647 EVT MemVT, MachineMemOperand *MMO) 2648 : VPBaseLoadStoreSDNode(ISD::EXPERIMENTAL_VP_STRIDED_STORE, Order, DL, 2649 VTs, AM, MemVT, MMO) { 2650 StoreSDNodeBits.IsTruncating = IsTrunc; 2651 StoreSDNodeBits.IsCompressing = IsCompressing; 2652 } 2653 2654 /// Return true if this is a truncating store. 2655 /// For integers this is the same as doing a TRUNCATE and storing the result. 2656 /// For floats, it is the same as doing an FP_ROUND and storing the result. 2657 bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; } 2658 2659 /// Returns true if the op does a compression to the vector before storing. 2660 /// The node contiguously stores the active elements (integers or floats) 2661 /// in src (those with their respective bit set in writemask k) to unaligned 2662 /// memory at base_addr. 2663 bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; } 2664 2665 const SDValue &getValue() const { return getOperand(1); } 2666 const SDValue &getBasePtr() const { return getOperand(2); } 2667 const SDValue &getOffset() const { return getOperand(3); } 2668 const SDValue &getStride() const { return getOperand(4); } 2669 const SDValue &getMask() const { return getOperand(5); } 2670 const SDValue &getVectorLength() const { return getOperand(6); } 2671 2672 static bool classof(const SDNode *N) { 2673 return N->getOpcode() == ISD::EXPERIMENTAL_VP_STRIDED_STORE; 2674 } 2675 }; 2676 2677 /// This base class is used to represent MLOAD and MSTORE nodes 2678 class MaskedLoadStoreSDNode : public MemSDNode { 2679 public: 2680 friend class SelectionDAG; 2681 2682 MaskedLoadStoreSDNode(ISD::NodeType NodeTy, unsigned Order, 2683 const DebugLoc &dl, SDVTList VTs, 2684 ISD::MemIndexedMode AM, EVT MemVT, 2685 MachineMemOperand *MMO) 2686 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2687 LSBaseSDNodeBits.AddressingMode = AM; 2688 assert(getAddressingMode() == AM && "Value truncated"); 2689 } 2690 2691 // MaskedLoadSDNode (Chain, ptr, offset, mask, passthru) 2692 // MaskedStoreSDNode (Chain, data, ptr, offset, mask) 2693 // Mask is a vector of i1 elements 2694 const SDValue &getOffset() const { 2695 return getOperand(getOpcode() == ISD::MLOAD ? 2 : 3); 2696 } 2697 const SDValue &getMask() const { 2698 return getOperand(getOpcode() == ISD::MLOAD ? 3 : 4); 2699 } 2700 2701 /// Return the addressing mode for this load or store: 2702 /// unindexed, pre-inc, pre-dec, post-inc, or post-dec. 2703 ISD::MemIndexedMode getAddressingMode() const { 2704 return static_cast<ISD::MemIndexedMode>(LSBaseSDNodeBits.AddressingMode); 2705 } 2706 2707 /// Return true if this is a pre/post inc/dec load/store. 2708 bool isIndexed() const { return getAddressingMode() != ISD::UNINDEXED; } 2709 2710 /// Return true if this is NOT a pre/post inc/dec load/store. 2711 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; } 2712 2713 static bool classof(const SDNode *N) { 2714 return N->getOpcode() == ISD::MLOAD || 2715 N->getOpcode() == ISD::MSTORE; 2716 } 2717 }; 2718 2719 /// This class is used to represent an MLOAD node 2720 class MaskedLoadSDNode : public MaskedLoadStoreSDNode { 2721 public: 2722 friend class SelectionDAG; 2723 2724 MaskedLoadSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2725 ISD::MemIndexedMode AM, ISD::LoadExtType ETy, 2726 bool IsExpanding, EVT MemVT, MachineMemOperand *MMO) 2727 : MaskedLoadStoreSDNode(ISD::MLOAD, Order, dl, VTs, AM, MemVT, MMO) { 2728 LoadSDNodeBits.ExtTy = ETy; 2729 LoadSDNodeBits.IsExpanding = IsExpanding; 2730 } 2731 2732 ISD::LoadExtType getExtensionType() const { 2733 return static_cast<ISD::LoadExtType>(LoadSDNodeBits.ExtTy); 2734 } 2735 2736 const SDValue &getBasePtr() const { return getOperand(1); } 2737 const SDValue &getOffset() const { return getOperand(2); } 2738 const SDValue &getMask() const { return getOperand(3); } 2739 const SDValue &getPassThru() const { return getOperand(4); } 2740 2741 static bool classof(const SDNode *N) { 2742 return N->getOpcode() == ISD::MLOAD; 2743 } 2744 2745 bool isExpandingLoad() const { return LoadSDNodeBits.IsExpanding; } 2746 }; 2747 2748 /// This class is used to represent an MSTORE node 2749 class MaskedStoreSDNode : public MaskedLoadStoreSDNode { 2750 public: 2751 friend class SelectionDAG; 2752 2753 MaskedStoreSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2754 ISD::MemIndexedMode AM, bool isTrunc, bool isCompressing, 2755 EVT MemVT, MachineMemOperand *MMO) 2756 : MaskedLoadStoreSDNode(ISD::MSTORE, Order, dl, VTs, AM, MemVT, MMO) { 2757 StoreSDNodeBits.IsTruncating = isTrunc; 2758 StoreSDNodeBits.IsCompressing = isCompressing; 2759 } 2760 2761 /// Return true if the op does a truncation before store. 2762 /// For integers this is the same as doing a TRUNCATE and storing the result. 2763 /// For floats, it is the same as doing an FP_ROUND and storing the result. 2764 bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; } 2765 2766 /// Returns true if the op does a compression to the vector before storing. 2767 /// The node contiguously stores the active elements (integers or floats) 2768 /// in src (those with their respective bit set in writemask k) to unaligned 2769 /// memory at base_addr. 2770 bool isCompressingStore() const { return StoreSDNodeBits.IsCompressing; } 2771 2772 const SDValue &getValue() const { return getOperand(1); } 2773 const SDValue &getBasePtr() const { return getOperand(2); } 2774 const SDValue &getOffset() const { return getOperand(3); } 2775 const SDValue &getMask() const { return getOperand(4); } 2776 2777 static bool classof(const SDNode *N) { 2778 return N->getOpcode() == ISD::MSTORE; 2779 } 2780 }; 2781 2782 /// This is a base class used to represent 2783 /// VP_GATHER and VP_SCATTER nodes 2784 /// 2785 class VPGatherScatterSDNode : public MemSDNode { 2786 public: 2787 friend class SelectionDAG; 2788 2789 VPGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order, 2790 const DebugLoc &dl, SDVTList VTs, EVT MemVT, 2791 MachineMemOperand *MMO, ISD::MemIndexType IndexType) 2792 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2793 LSBaseSDNodeBits.AddressingMode = IndexType; 2794 assert(getIndexType() == IndexType && "Value truncated"); 2795 } 2796 2797 /// How is Index applied to BasePtr when computing addresses. 2798 ISD::MemIndexType getIndexType() const { 2799 return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode); 2800 } 2801 bool isIndexScaled() const { 2802 return !cast<ConstantSDNode>(getScale())->isOne(); 2803 } 2804 bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); } 2805 2806 // In the both nodes address is Op1, mask is Op2: 2807 // VPGatherSDNode (Chain, base, index, scale, mask, vlen) 2808 // VPScatterSDNode (Chain, value, base, index, scale, mask, vlen) 2809 // Mask is a vector of i1 elements 2810 const SDValue &getBasePtr() const { 2811 return getOperand((getOpcode() == ISD::VP_GATHER) ? 1 : 2); 2812 } 2813 const SDValue &getIndex() const { 2814 return getOperand((getOpcode() == ISD::VP_GATHER) ? 2 : 3); 2815 } 2816 const SDValue &getScale() const { 2817 return getOperand((getOpcode() == ISD::VP_GATHER) ? 3 : 4); 2818 } 2819 const SDValue &getMask() const { 2820 return getOperand((getOpcode() == ISD::VP_GATHER) ? 4 : 5); 2821 } 2822 const SDValue &getVectorLength() const { 2823 return getOperand((getOpcode() == ISD::VP_GATHER) ? 5 : 6); 2824 } 2825 2826 static bool classof(const SDNode *N) { 2827 return N->getOpcode() == ISD::VP_GATHER || 2828 N->getOpcode() == ISD::VP_SCATTER; 2829 } 2830 }; 2831 2832 /// This class is used to represent an VP_GATHER node 2833 /// 2834 class VPGatherSDNode : public VPGatherScatterSDNode { 2835 public: 2836 friend class SelectionDAG; 2837 2838 VPGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, 2839 MachineMemOperand *MMO, ISD::MemIndexType IndexType) 2840 : VPGatherScatterSDNode(ISD::VP_GATHER, Order, dl, VTs, MemVT, MMO, 2841 IndexType) {} 2842 2843 static bool classof(const SDNode *N) { 2844 return N->getOpcode() == ISD::VP_GATHER; 2845 } 2846 }; 2847 2848 /// This class is used to represent an VP_SCATTER node 2849 /// 2850 class VPScatterSDNode : public VPGatherScatterSDNode { 2851 public: 2852 friend class SelectionDAG; 2853 2854 VPScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, EVT MemVT, 2855 MachineMemOperand *MMO, ISD::MemIndexType IndexType) 2856 : VPGatherScatterSDNode(ISD::VP_SCATTER, Order, dl, VTs, MemVT, MMO, 2857 IndexType) {} 2858 2859 const SDValue &getValue() const { return getOperand(1); } 2860 2861 static bool classof(const SDNode *N) { 2862 return N->getOpcode() == ISD::VP_SCATTER; 2863 } 2864 }; 2865 2866 /// This is a base class used to represent 2867 /// MGATHER and MSCATTER nodes 2868 /// 2869 class MaskedGatherScatterSDNode : public MemSDNode { 2870 public: 2871 friend class SelectionDAG; 2872 2873 MaskedGatherScatterSDNode(ISD::NodeType NodeTy, unsigned Order, 2874 const DebugLoc &dl, SDVTList VTs, EVT MemVT, 2875 MachineMemOperand *MMO, ISD::MemIndexType IndexType) 2876 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2877 LSBaseSDNodeBits.AddressingMode = IndexType; 2878 assert(getIndexType() == IndexType && "Value truncated"); 2879 } 2880 2881 /// How is Index applied to BasePtr when computing addresses. 2882 ISD::MemIndexType getIndexType() const { 2883 return static_cast<ISD::MemIndexType>(LSBaseSDNodeBits.AddressingMode); 2884 } 2885 bool isIndexScaled() const { 2886 return !cast<ConstantSDNode>(getScale())->isOne(); 2887 } 2888 bool isIndexSigned() const { return isIndexTypeSigned(getIndexType()); } 2889 2890 // In the both nodes address is Op1, mask is Op2: 2891 // MaskedGatherSDNode (Chain, passthru, mask, base, index, scale) 2892 // MaskedScatterSDNode (Chain, value, mask, base, index, scale) 2893 // Mask is a vector of i1 elements 2894 const SDValue &getBasePtr() const { return getOperand(3); } 2895 const SDValue &getIndex() const { return getOperand(4); } 2896 const SDValue &getMask() const { return getOperand(2); } 2897 const SDValue &getScale() const { return getOperand(5); } 2898 2899 static bool classof(const SDNode *N) { 2900 return N->getOpcode() == ISD::MGATHER || 2901 N->getOpcode() == ISD::MSCATTER; 2902 } 2903 }; 2904 2905 /// This class is used to represent an MGATHER node 2906 /// 2907 class MaskedGatherSDNode : public MaskedGatherScatterSDNode { 2908 public: 2909 friend class SelectionDAG; 2910 2911 MaskedGatherSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2912 EVT MemVT, MachineMemOperand *MMO, 2913 ISD::MemIndexType IndexType, ISD::LoadExtType ETy) 2914 : MaskedGatherScatterSDNode(ISD::MGATHER, Order, dl, VTs, MemVT, MMO, 2915 IndexType) { 2916 LoadSDNodeBits.ExtTy = ETy; 2917 } 2918 2919 const SDValue &getPassThru() const { return getOperand(1); } 2920 2921 ISD::LoadExtType getExtensionType() const { 2922 return ISD::LoadExtType(LoadSDNodeBits.ExtTy); 2923 } 2924 2925 static bool classof(const SDNode *N) { 2926 return N->getOpcode() == ISD::MGATHER; 2927 } 2928 }; 2929 2930 /// This class is used to represent an MSCATTER node 2931 /// 2932 class MaskedScatterSDNode : public MaskedGatherScatterSDNode { 2933 public: 2934 friend class SelectionDAG; 2935 2936 MaskedScatterSDNode(unsigned Order, const DebugLoc &dl, SDVTList VTs, 2937 EVT MemVT, MachineMemOperand *MMO, 2938 ISD::MemIndexType IndexType, bool IsTrunc) 2939 : MaskedGatherScatterSDNode(ISD::MSCATTER, Order, dl, VTs, MemVT, MMO, 2940 IndexType) { 2941 StoreSDNodeBits.IsTruncating = IsTrunc; 2942 } 2943 2944 /// Return true if the op does a truncation before store. 2945 /// For integers this is the same as doing a TRUNCATE and storing the result. 2946 /// For floats, it is the same as doing an FP_ROUND and storing the result. 2947 bool isTruncatingStore() const { return StoreSDNodeBits.IsTruncating; } 2948 2949 const SDValue &getValue() const { return getOperand(1); } 2950 2951 static bool classof(const SDNode *N) { 2952 return N->getOpcode() == ISD::MSCATTER; 2953 } 2954 }; 2955 2956 class FPStateAccessSDNode : public MemSDNode { 2957 public: 2958 friend class SelectionDAG; 2959 2960 FPStateAccessSDNode(unsigned NodeTy, unsigned Order, const DebugLoc &dl, 2961 SDVTList VTs, EVT MemVT, MachineMemOperand *MMO) 2962 : MemSDNode(NodeTy, Order, dl, VTs, MemVT, MMO) { 2963 assert((NodeTy == ISD::GET_FPENV_MEM || NodeTy == ISD::SET_FPENV_MEM) && 2964 "Expected FP state access node"); 2965 } 2966 2967 static bool classof(const SDNode *N) { 2968 return N->getOpcode() == ISD::GET_FPENV_MEM || 2969 N->getOpcode() == ISD::SET_FPENV_MEM; 2970 } 2971 }; 2972 2973 /// An SDNode that represents everything that will be needed 2974 /// to construct a MachineInstr. These nodes are created during the 2975 /// instruction selection proper phase. 2976 /// 2977 /// Note that the only supported way to set the `memoperands` is by calling the 2978 /// `SelectionDAG::setNodeMemRefs` function as the memory management happens 2979 /// inside the DAG rather than in the node. 2980 class MachineSDNode : public SDNode { 2981 private: 2982 friend class SelectionDAG; 2983 2984 MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc &DL, SDVTList VTs) 2985 : SDNode(Opc, Order, DL, VTs) {} 2986 2987 // We use a pointer union between a single `MachineMemOperand` pointer and 2988 // a pointer to an array of `MachineMemOperand` pointers. This is null when 2989 // the number of these is zero, the single pointer variant used when the 2990 // number is one, and the array is used for larger numbers. 2991 // 2992 // The array is allocated via the `SelectionDAG`'s allocator and so will 2993 // always live until the DAG is cleaned up and doesn't require ownership here. 2994 // 2995 // We can't use something simpler like `TinyPtrVector` here because `SDNode` 2996 // subclasses aren't managed in a conforming C++ manner. See the comments on 2997 // `SelectionDAG::MorphNodeTo` which details what all goes on, but the 2998 // constraint here is that these don't manage memory with their constructor or 2999 // destructor and can be initialized to a good state even if they start off 3000 // uninitialized. 3001 PointerUnion<MachineMemOperand *, MachineMemOperand **> MemRefs = {}; 3002 3003 // Note that this could be folded into the above `MemRefs` member if doing so 3004 // is advantageous at some point. We don't need to store this in most cases. 3005 // However, at the moment this doesn't appear to make the allocation any 3006 // smaller and makes the code somewhat simpler to read. 3007 int NumMemRefs = 0; 3008 3009 public: 3010 using mmo_iterator = ArrayRef<MachineMemOperand *>::const_iterator; 3011 3012 ArrayRef<MachineMemOperand *> memoperands() const { 3013 // Special case the common cases. 3014 if (NumMemRefs == 0) 3015 return {}; 3016 if (NumMemRefs == 1) 3017 return ArrayRef(MemRefs.getAddrOfPtr1(), 1); 3018 3019 // Otherwise we have an actual array. 3020 return ArrayRef(cast<MachineMemOperand **>(MemRefs), NumMemRefs); 3021 } 3022 mmo_iterator memoperands_begin() const { return memoperands().begin(); } 3023 mmo_iterator memoperands_end() const { return memoperands().end(); } 3024 bool memoperands_empty() const { return memoperands().empty(); } 3025 3026 /// Clear out the memory reference descriptor list. 3027 void clearMemRefs() { 3028 MemRefs = nullptr; 3029 NumMemRefs = 0; 3030 } 3031 3032 static bool classof(const SDNode *N) { 3033 return N->isMachineOpcode(); 3034 } 3035 }; 3036 3037 /// An SDNode that records if a register contains a value that is guaranteed to 3038 /// be aligned accordingly. 3039 class AssertAlignSDNode : public SDNode { 3040 Align Alignment; 3041 3042 public: 3043 AssertAlignSDNode(unsigned Order, const DebugLoc &DL, SDVTList VTs, Align A) 3044 : SDNode(ISD::AssertAlign, Order, DL, VTs), Alignment(A) {} 3045 3046 Align getAlign() const { return Alignment; } 3047 3048 static bool classof(const SDNode *N) { 3049 return N->getOpcode() == ISD::AssertAlign; 3050 } 3051 }; 3052 3053 class SDNodeIterator { 3054 const SDNode *Node; 3055 unsigned Operand; 3056 3057 SDNodeIterator(const SDNode *N, unsigned Op) : Node(N), Operand(Op) {} 3058 3059 public: 3060 using iterator_category = std::forward_iterator_tag; 3061 using value_type = SDNode; 3062 using difference_type = std::ptrdiff_t; 3063 using pointer = value_type *; 3064 using reference = value_type &; 3065 3066 bool operator==(const SDNodeIterator& x) const { 3067 return Operand == x.Operand; 3068 } 3069 bool operator!=(const SDNodeIterator& x) const { return !operator==(x); } 3070 3071 pointer operator*() const { 3072 return Node->getOperand(Operand).getNode(); 3073 } 3074 pointer operator->() const { return operator*(); } 3075 3076 SDNodeIterator& operator++() { // Preincrement 3077 ++Operand; 3078 return *this; 3079 } 3080 SDNodeIterator operator++(int) { // Postincrement 3081 SDNodeIterator tmp = *this; ++*this; return tmp; 3082 } 3083 size_t operator-(SDNodeIterator Other) const { 3084 assert(Node == Other.Node && 3085 "Cannot compare iterators of two different nodes!"); 3086 return Operand - Other.Operand; 3087 } 3088 3089 static SDNodeIterator begin(const SDNode *N) { return SDNodeIterator(N, 0); } 3090 static SDNodeIterator end (const SDNode *N) { 3091 return SDNodeIterator(N, N->getNumOperands()); 3092 } 3093 3094 unsigned getOperand() const { return Operand; } 3095 const SDNode *getNode() const { return Node; } 3096 }; 3097 3098 template <> struct GraphTraits<SDNode*> { 3099 using NodeRef = SDNode *; 3100 using ChildIteratorType = SDNodeIterator; 3101 3102 static NodeRef getEntryNode(SDNode *N) { return N; } 3103 3104 static ChildIteratorType child_begin(NodeRef N) { 3105 return SDNodeIterator::begin(N); 3106 } 3107 3108 static ChildIteratorType child_end(NodeRef N) { 3109 return SDNodeIterator::end(N); 3110 } 3111 }; 3112 3113 /// A representation of the largest SDNode, for use in sizeof(). 3114 /// 3115 /// This needs to be a union because the largest node differs on 32 bit systems 3116 /// with 4 and 8 byte pointer alignment, respectively. 3117 using LargestSDNode = AlignedCharArrayUnion<AtomicSDNode, TargetIndexSDNode, 3118 BlockAddressSDNode, 3119 GlobalAddressSDNode, 3120 PseudoProbeSDNode>; 3121 3122 /// The SDNode class with the greatest alignment requirement. 3123 using MostAlignedSDNode = GlobalAddressSDNode; 3124 3125 namespace ISD { 3126 3127 /// Returns true if the specified node is a non-extending and unindexed load. 3128 inline bool isNormalLoad(const SDNode *N) { 3129 auto *Ld = dyn_cast<LoadSDNode>(N); 3130 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD && 3131 Ld->getAddressingMode() == ISD::UNINDEXED; 3132 } 3133 3134 /// Returns true if the specified node is a non-extending load. 3135 inline bool isNON_EXTLoad(const SDNode *N) { 3136 auto *Ld = dyn_cast<LoadSDNode>(N); 3137 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD; 3138 } 3139 3140 /// Returns true if the specified node is a EXTLOAD. 3141 inline bool isEXTLoad(const SDNode *N) { 3142 auto *Ld = dyn_cast<LoadSDNode>(N); 3143 return Ld && Ld->getExtensionType() == ISD::EXTLOAD; 3144 } 3145 3146 /// Returns true if the specified node is a SEXTLOAD. 3147 inline bool isSEXTLoad(const SDNode *N) { 3148 auto *Ld = dyn_cast<LoadSDNode>(N); 3149 return Ld && Ld->getExtensionType() == ISD::SEXTLOAD; 3150 } 3151 3152 /// Returns true if the specified node is a ZEXTLOAD. 3153 inline bool isZEXTLoad(const SDNode *N) { 3154 auto *Ld = dyn_cast<LoadSDNode>(N); 3155 return Ld && Ld->getExtensionType() == ISD::ZEXTLOAD; 3156 } 3157 3158 /// Returns true if the specified node is an unindexed load. 3159 inline bool isUNINDEXEDLoad(const SDNode *N) { 3160 auto *Ld = dyn_cast<LoadSDNode>(N); 3161 return Ld && Ld->getAddressingMode() == ISD::UNINDEXED; 3162 } 3163 3164 /// Returns true if the specified node is a non-truncating 3165 /// and unindexed store. 3166 inline bool isNormalStore(const SDNode *N) { 3167 auto *St = dyn_cast<StoreSDNode>(N); 3168 return St && !St->isTruncatingStore() && 3169 St->getAddressingMode() == ISD::UNINDEXED; 3170 } 3171 3172 /// Returns true if the specified node is an unindexed store. 3173 inline bool isUNINDEXEDStore(const SDNode *N) { 3174 auto *St = dyn_cast<StoreSDNode>(N); 3175 return St && St->getAddressingMode() == ISD::UNINDEXED; 3176 } 3177 3178 /// Attempt to match a unary predicate against a scalar/splat constant or 3179 /// every element of a constant BUILD_VECTOR. 3180 /// If AllowUndef is true, then UNDEF elements will pass nullptr to Match. 3181 template <typename ConstNodeType> 3182 bool matchUnaryPredicateImpl(SDValue Op, 3183 std::function<bool(ConstNodeType *)> Match, 3184 bool AllowUndefs = false); 3185 3186 /// Hook for matching ConstantSDNode predicate 3187 inline bool matchUnaryPredicate(SDValue Op, 3188 std::function<bool(ConstantSDNode *)> Match, 3189 bool AllowUndefs = false) { 3190 return matchUnaryPredicateImpl<ConstantSDNode>(Op, Match, AllowUndefs); 3191 } 3192 3193 /// Hook for matching ConstantFPSDNode predicate 3194 inline bool 3195 matchUnaryFpPredicate(SDValue Op, 3196 std::function<bool(ConstantFPSDNode *)> Match, 3197 bool AllowUndefs = false) { 3198 return matchUnaryPredicateImpl<ConstantFPSDNode>(Op, Match, AllowUndefs); 3199 } 3200 3201 /// Attempt to match a binary predicate against a pair of scalar/splat 3202 /// constants or every element of a pair of constant BUILD_VECTORs. 3203 /// If AllowUndef is true, then UNDEF elements will pass nullptr to Match. 3204 /// If AllowTypeMismatch is true then RetType + ArgTypes don't need to match. 3205 bool matchBinaryPredicate( 3206 SDValue LHS, SDValue RHS, 3207 std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match, 3208 bool AllowUndefs = false, bool AllowTypeMismatch = false); 3209 3210 /// Returns true if the specified value is the overflow result from one 3211 /// of the overflow intrinsic nodes. 3212 inline bool isOverflowIntrOpRes(SDValue Op) { 3213 unsigned Opc = Op.getOpcode(); 3214 return (Op.getResNo() == 1 && 3215 (Opc == ISD::SADDO || Opc == ISD::UADDO || Opc == ISD::SSUBO || 3216 Opc == ISD::USUBO || Opc == ISD::SMULO || Opc == ISD::UMULO)); 3217 } 3218 3219 } // end namespace ISD 3220 3221 } // end namespace llvm 3222 3223 #endif // LLVM_CODEGEN_SELECTIONDAGNODES_H 3224