xref: /aosp_15_r20/external/llvm/test/CodeGen/PowerPC/load-v4i8-improved.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck \
2; RUN:   -implicit-check-not vmrg -implicit-check-not=vperm %s
3; RUN: llc -mcpu=pwr8 -mtriple=powerpc64-unknown-linux-gnu < %s | FileCheck \
4; RUN:   -implicit-check-not vmrg -implicit-check-not=vperm %s \
5; RUN:   --check-prefix=CHECK-BE
6
7define <16 x i8> @test(i32* %s, i32* %t) {
8entry:
9  %0 = bitcast i32* %s to <4 x i8>*
10  %1 = load <4 x i8>, <4 x i8>* %0, align 4
11  %2 = shufflevector <4 x i8> %1, <4 x i8> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
12  ret <16 x i8> %2
13; CHECK-LABEL: test
14; CHECK: lwz [[GPR:[0-9]+]], 0(3)
15; CHECK: mtvsrd [[VSR:[0-9]+]], [[GPR]]
16; CHECK: xxswapd  [[SWP:[0-9]+]], [[VSR]]
17; CHECK: xxspltw 34, [[SWP]], 3
18; CHECK-BE-LABEL: test
19; CHECK-BE: lwz [[GPR:[0-9]+]], 0(3)
20; CHECK-BE: sldi [[SHL:[0-9]+]], [[GPR]], 32
21; CHECK-BE: mtvsrd [[VSR:[0-9]+]], [[SHL]]
22; CHECK-BE: xxspltw 34, [[VSR]], 0
23}
24