1 //
2 // Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5
6 #include "ConvolutionTestHelper.hpp"
7
8 #include <armnn_delegate.hpp>
9
10 #include <flatbuffers/flatbuffers.h>
11 #include <tensorflow/lite/interpreter.h>
12 #include <tensorflow/lite/kernels/register.h>
13 #include <tensorflow/lite/model.h>
14 #include <schema_generated.h>
15
16 #include <doctest/doctest.h>
17
18 namespace armnnDelegate
19 {
20
21 // Conv3d is currently only supports Float32 inputs, filter, bias and outputs in TFLite.
22 // Conv3d is only correctly supported for external delegates from TF Lite v2.6, as there was a breaking bug in v2.5.
23 #if defined(ARMNN_POST_TFLITE_2_5)
24
25 // Create a vector from 0 to size divided to create smaller floating point values.
26 template <typename T>
CreateFloatData(int32_t size,float divisor)27 std::vector<T> CreateFloatData(int32_t size, float divisor)
28 {
29 std::vector<float> data;
30 for (int32_t i = 0; i < size; ++i)
31 {
32 float value = static_cast<float>(i);
33 data.push_back(value/divisor);
34 }
35 return data;
36 }
37
Conv3DWithBiasesSimpleWithPaddingFp32Test(std::vector<armnn::BackendId> & backends)38 void Conv3DWithBiasesSimpleWithPaddingFp32Test(std::vector<armnn::BackendId>& backends)
39 {
40 // Set input data
41 std::vector<int32_t> inputShape { 1, 2, 2, 2, 1 };
42 std::vector<int32_t> filterShape { 2, 2, 2, 1, 1 };
43 std::vector<int32_t> biasShape { 1 };
44 std::vector<int32_t> outputShape { 1, 2, 2, 2, 1 };
45
46 static std::vector<float> inputValues =
47 {
48 1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f
49 };
50
51 std::vector<float> filterValues =
52 {
53 2.f,1.f, 1.f,0.f, 0.f,1.f, 1.f,1.f
54 };
55
56 std::vector<float> biasValues = { 5.f };
57
58 std::vector<float> expectedOutputValues =
59 {
60 33.f, 21.f, 23.f, 13.f, 28.f, 25.f, 27.f, 21.f
61 };
62
63 Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
64 ::tflite::TensorType_FLOAT32,
65 { 1, 1, 1 }, // strideX, strideY, strideZ
66 { 1, 1, 1 }, // dilationX, dilationY, dilationZ
67 tflite::Padding_SAME,
68 tflite::ActivationFunctionType_NONE,
69 backends,
70 inputShape,
71 filterShape,
72 outputShape,
73 inputValues,
74 filterValues,
75 expectedOutputValues,
76 biasShape,
77 biasValues);
78 }
79
Conv3DWithBiasesStridesFp32Test(std::vector<armnn::BackendId> & backends)80 void Conv3DWithBiasesStridesFp32Test(std::vector<armnn::BackendId>& backends)
81 {
82 std::vector<int32_t> inputShape { 1, 3, 10, 10, 1 };
83 std::vector<int32_t> filterShape { 3, 5, 5, 1, 1 };
84 std::vector<int32_t> biasShape { 1 };
85 std::vector<int32_t> outputShape { 1, 1, 3, 3, 1 };
86
87 std::vector<float> inputValues = CreateFloatData<float>(300, 1.0f);
88
89 std::vector<float> filterValues =
90 {
91 1.f, 1.f, 1.f, 1.f, 1.f,
92 1.f, 1.f, 1.f, 1.f, 1.f,
93 1.f, 1.f, 1.f, 1.f, 1.f,
94 1.f, 1.f, 1.f, 1.f, 1.f,
95 1.f, 1.f, 1.f, 1.f, 1.f,
96
97 0.f, 0.f, 0.f, 0.f, 0.f,
98 0.f, 0.f, 0.f, 0.f, 0.f,
99 0.f, 0.f, 0.f, 0.f, 0.f,
100 0.f, 0.f, 0.f, 0.f, 0.f,
101 0.f, 0.f, 0.f, 0.f, 0.f,
102
103 2.f, 2.f, 2.f, 2.f, 2.f,
104 2.f, 2.f, 2.f, 2.f, 2.f,
105 2.f, 2.f, 2.f, 2.f, 2.f,
106 2.f, 2.f, 2.f, 2.f, 2.f,
107 2.f, 2.f, 2.f, 2.f, 2.f
108 };
109
110 std::vector<float> biasValues = { 10.f };
111
112 std::vector<float> expectedOutputValues =
113 {
114 11660.f, 11810.f, 11960.f,
115
116 13160.f, 13310.f, 13460.f,
117
118 14660.f, 14810.f, 14960.f
119 };
120
121 Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
122 ::tflite::TensorType_FLOAT32,
123 { 2, 2, 2 }, // strideX, strideY, strideZ
124 { 1, 1, 1 }, // dilationX, dilationY, dilationZ
125 tflite::Padding_VALID,
126 tflite::ActivationFunctionType_NONE,
127 backends,
128 inputShape,
129 filterShape,
130 outputShape,
131 inputValues,
132 filterValues,
133 expectedOutputValues,
134 biasShape,
135 biasValues);
136 }
137
138
Conv3DWithBiasesDilationFp32Test(std::vector<armnn::BackendId> & backends)139 void Conv3DWithBiasesDilationFp32Test(std::vector<armnn::BackendId>& backends)
140 {
141 std::vector<int32_t> inputShape { 1, 5, 5, 5, 2 };
142 std::vector<int32_t> filterShape { 2, 2, 2, 2, 2 };
143 std::vector<int32_t> biasShape { 2 };
144 std::vector<int32_t> outputShape { 1, 2, 2, 2, 2 };
145
146 std::vector<float> inputValues = CreateFloatData<float>(250, 1.0f);
147
148 std::vector<float> filterValues =
149 {
150 -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, -1.f, 1.f, 1.f, 1.f, -1.f, -1.f,
151 1.f, 1.f, -1.f, 1.f, -1.f, 1.f, -1.f, 1.f, -1.f, -1.f, -1.f, 1.f, -1.f, 1.f, -1.f, 1.f,
152 };
153
154 std::vector<float> biasValues = { 0.f, 2.f };
155
156 // Since the dilation rate is 3 this will dilate the kernel to be 4x4,
157 // therefore the output will be 2x2
158 std::vector<float> expectedOutputValues =
159 {
160 -1124.f, 976.f,
161 -1148.f, 980.f,
162
163 -1244.f, 996.f,
164 -1268.f, 1000.f,
165
166 -1724.f, 1076.f,
167 -1748.f, 1080.f,
168
169 -1844.f, 1096.f,
170 -1868.f, 1100.f
171 };
172
173 Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
174 ::tflite::TensorType_FLOAT32,
175 { 1, 1, 1 }, // strideX, strideY, strideZ
176 { 3, 3, 3 }, // dilationX, dilationY, dilationZ
177 tflite::Padding_VALID,
178 tflite::ActivationFunctionType_NONE,
179 backends,
180 inputShape,
181 filterShape,
182 outputShape,
183 inputValues,
184 filterValues,
185 expectedOutputValues,
186 biasShape,
187 biasValues);
188 }
189
Conv3DFp32SmallTest(std::vector<armnn::BackendId> & backends)190 void Conv3DFp32SmallTest(std::vector<armnn::BackendId>& backends)
191 {
192 std::vector<int32_t> inputShape { 1, 3, 10, 10, 1 };
193 std::vector<int32_t> filterShape { 3, 3, 3, 1, 1 };
194 std::vector<int32_t> biasShape { 1 };
195 std::vector<int32_t> outputShape { 1, 1, 4, 4, 1 };
196
197 std::vector<float> inputValues = CreateFloatData<float>(300, 100.0f);
198
199 std::vector<float> filterValues =
200 {
201 0.125977f, 0.150391f, 0.101562f,
202 0.0585938f, 0.0864258f, 0.043457f,
203 0.034668f, 0.0322266f, 0.0385742f,
204
205 0.125977f, 0.150391f, -0.101562f,
206 -0.0585938f,-0.0864258f,-0.043457f,
207 -0.0104630f, 0.0154114f, 0.0013768f,
208
209 0.0344238f, 0.035644f, 0.0495605f,
210 0.0683594f, 0.099121f, -0.0461426f,
211 -0.0996094f,-0.126953f, -0.043457f,
212 };
213
214 std::vector<float> biasValues = { 0 };
215
216 std::vector<float> expectedOutputValues =
217 {
218 -0.08156067f, -0.06891209f, -0.05589598f, -0.04310101f,
219 0.04584253f, 0.05855697f, 0.07129729f, 0.08325434f,
220 0.17304349f, 0.18521416f, 0.19818866f, 0.21096253f,
221 0.29965734f, 0.312698f, 0.32547557f, 0.33818722f
222 };
223
224 Convolution3dTest<float>(tflite::BuiltinOperator_CONV_3D,
225 ::tflite::TensorType_FLOAT32,
226 { 2, 2, 2 }, // strideX, strideY, strideZ
227 { 1, 1, 1 }, // dilationX, dilationY, dilationZ
228 tflite::Padding_VALID,
229 tflite::ActivationFunctionType_NONE,
230 backends,
231 inputShape,
232 filterShape,
233 outputShape,
234 inputValues,
235 filterValues,
236 expectedOutputValues,
237 biasShape,
238 biasValues);
239 }
240
241 TEST_SUITE("Convolution3dTest_CpuRefTests")
242 {
243
244 TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_CpuRef_Test")
245 {
246 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
247 Conv3DWithBiasesSimpleWithPaddingFp32Test(backends);
248 }
249
250 TEST_CASE ("Conv3DWithBiasesStrides_Fp32_CpuRef_Test")
251 {
252 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
253 Conv3DWithBiasesStridesFp32Test(backends);
254 }
255
256 TEST_CASE ("Conv3DWithBiasesDilation_Fp32_CpuRef_Test")
257 {
258 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
259 Conv3DWithBiasesDilationFp32Test(backends);
260 }
261
262 TEST_CASE ("Conv3DFp32Small_Fp32_CpuRef_Test")
263 {
264 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuRef};
265 Conv3DFp32SmallTest(backends);
266 }
267
268 } //End of TEST_SUITE("Convolution3dTest_CpuRefTests")
269
270 TEST_SUITE("Convolution3dTest_CpuAccTests")
271 {
272
273 TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_CpuAcc_Test")
274 {
275 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc};
276 Conv3DWithBiasesSimpleWithPaddingFp32Test(backends);
277 }
278
279 TEST_CASE ("Conv3DWithBiasesStrides_Fp32_CpuAcc_Test")
280 {
281 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc};
282 Conv3DWithBiasesStridesFp32Test(backends);
283 }
284
285 TEST_CASE ("Conv3DFp32Small_Fp32_CpuAcc_Test")
286 {
287 std::vector <armnn::BackendId> backends = {armnn::Compute::CpuAcc};
288 Conv3DFp32SmallTest(backends);
289 }
290
291 } //End of TEST_SUITE("Convolution3dTest_CpuAccTests")
292
293 TEST_SUITE("Convolution3dTest_GpuAccTests")
294 {
295
296 TEST_CASE ("Conv3DWithBiasesSimpleWithPadding_Fp32_GpuAcc_Test")
297 {
298 std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc};
299 Conv3DWithBiasesSimpleWithPaddingFp32Test(backends);
300 }
301
302 TEST_CASE ("Conv3DWithBiasesStrides_Fp32_GpuAcc_Test")
303 {
304 std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc};
305 Conv3DWithBiasesStridesFp32Test(backends);
306 }
307
308 TEST_CASE ("Conv3DFp32Small_Fp32_GpuAcc_Test")
309 {
310 std::vector <armnn::BackendId> backends = {armnn::Compute::GpuAcc};
311 Conv3DFp32SmallTest(backends);
312 }
313
314 } //End of TEST_SUITE("Convolution3dTest_GpuAccTests")
315
316 #endif
317
318 } // namespace armnnDelegate