1 /* 2 * Copyright (c) 2017-2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #include "src/core/common/Macros.h" 25 #include "src/cpu/ICpuOperator.h" 26 27 namespace arm_compute 28 { 29 namespace cpu 30 { 31 /** Basic function to simulate a convolution layer. This function calls one of the following functions: 32 * -# @ref CpuGemm (executed only in case GEMM is required for the operation) 33 * -# @ref CpuWinogradConv2d (executed only in case Winograd is required for the operation) 34 * -# @ref CpuDirectConv2d (executed only in case Direct Convolution is required for the operation) 35 * 36 * 37 * The function selects one of the algorithms mentioned above based on: 38 * - The size of the kernel 39 * - Number of input/output feature maps 40 * - Amount of memory needed 41 * 42 * Generally GEMM-based convolution is executed when neither Winograd nor FFT nor Direct convolution can be performed. 43 * 44 * FP32 Algorithm| Filter Size | Input/Output feature maps | 45 * --------------|----------------------------------------------------|-------------------------------------------| 46 * Winograd | 3x3 1x3 3x1 5x1 1x5 5x5(fast maths) 7x1 1x7 | Input channels is greater than 3 | 47 * FFT | Squared kernels and greater than 9x9 | Input feature maps > Output feature maps | 48 * DirectConv | 9x9 | | 49 * GEMM | Any size | | 50 * 51 * Winograd 5x5 requires fast maths enabled. 52 * 53 * FP16 Algorithm| Filter Size | 54 * --------------|------------------| 55 * Winograd | Not supported | 56 * FFT | Not supported | 57 * DirectConv | 9x9 | 58 * GEMM | Any size | 59 * 60 * 61 */ 62 class CpuConv2d : public ICpuOperator 63 { 64 public: 65 /** Constructor */ 66 CpuConv2d(); 67 ARM_COMPUTE_DISALLOW_COPY_ALLOW_MOVE(CpuConv2d); 68 /** Default destructor */ 69 ~CpuConv2d(); 70 /** Set the input and output tensors. 71 * 72 * Valid data layouts: 73 * - NHWC 74 * - NCHW 75 * 76 * Valid data type configurations: 77 * |src0 |src1 |src2 |dst | 78 * |:--------------|:------------------|:------|:--------------| 79 * |F16 |F16 |F16 |F16 | 80 * |F32 |F32 |F32 |F32 | 81 * |QASYMM8 |QASYMM8 |S32 |QASYMM8 | 82 * |QASYMM8 |QSYMM8_PER_CHANNEL |S32 |QASYMM8 | 83 * |QASYMM8_SIGNED |QASYMM8_SIGNED |S32 |QASYMM8_SIGNED | 84 * |QASYMM8_SIGNED |QSYMM8_PER_CHANNEL |S32 |QASYMM8_SIGNED | 85 * 86 * @param[in] src Source tensor info. 3 lower dimensions represent a single input [width, height, IFM], 87 * while every optional dimension from 4 and above represent a batch of inputs. 88 * Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32. 89 * @param[in] weights Weights tensor info. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. 90 * Data type supported: Same as @p src, also could be QSYMM8_PER_CHANNEL if input is QASYMM8/QASYMM8_SIGNED. 91 * @param[in] biases Biases tensor info. Shared biases supported. Biases are 1D tensor with dimensions [OFM]. 92 * Data type supported: Same as @p src, except for input of QASYMM8/QASYMM8_SIGNED type where biases should be of S32 type. 93 * @param[out] dst Destination tensor info. 3 lower dimensions represent a single output [width, height, OFM], while the rest represent batch of outputs. 94 * Data types supported: Same as @p src. 95 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. 96 * @param[in] weights_info Specifies if the weights tensor has been reshaped with NEWeightsReshapeKernel. If this is not part of the fully connected layer the weights 97 * tensor has also been transposed with cpu::kernels::CpuGemmTranspose1xWKernel. Data type supported: Same as @p input. 98 * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1). 99 * @param[in] act_info (Optional) Activation layer information in case of a fused activation. Only RELU, BOUNDED_RELU and LU_BOUNDED_RELU supported. 100 * @param[in] enable_fast_math (Optional) Enable fast math computation. In case this flag were set, the function could dispatch the fastest implementation 101 * available which may introduce a drop of accuracy as well. Default is false 102 * @param[in] num_groups (Optional) Number of groups when performing a grouped convolution. num_groups != 1 is not supported 103 */ 104 void configure(ITensorInfo *src, ITensorInfo *weights, const ITensorInfo *biases, ITensorInfo *dst, const PadStrideInfo &conv_info, const WeightsInfo &weights_info = WeightsInfo(), 105 const Size2D &dilation = Size2D(1U, 1U), const ActivationLayerInfo &act_info = ActivationLayerInfo(), bool enable_fast_math = false, unsigned int num_groups = 1); 106 /** Static function to check if given info will lead to a valid configuration of @ref CpuConv2d 107 * 108 * Similar to CpuConv2d::configure() 109 * 110 * @return a status 111 */ 112 static Status validate(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const PadStrideInfo &conv_info, 113 const WeightsInfo &weights_info = WeightsInfo(), const Size2D &dilation = Size2D(1U, 1U), const ActivationLayerInfo &act_info = ActivationLayerInfo(), bool enable_fast_math = false, 114 unsigned int num_groups = 1); 115 /** Static function to check if given info will return the convolution called by @ref CpuConv2d 116 * 117 * @param[in] src Source tensor info. 3 lower dimensions represent a single input [width, height, IFM], 118 * while every optional dimension from 4 and above represent a batch of inputs. 119 * Data types supported: QASYMM8/QASYMM8_SIGNED/F16/F32. 120 * @param[in] weights Weights tensor info. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. 121 * Data type supported:Same as @p src, also could be QSYMM8_PER_CHANNEL if input is QASYMM8/QASYMM8_SIGNED. 122 * @param[in] dst Destination tensor info. 3 lower dimensions represent a single output [width, height, OFM], while the rest represent batch of outputs. 123 * Data types supported: Same as @p src. 124 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo. 125 * @param[in] weights_info Specifies if the weights tensor has been reshaped with NEWeightsReshapeKernel. If this is not part of the fully connected layer the weights 126 * tensor has also been transposed with cpu::kernels::CpuGemmTranspose1xWKernel. Data type supported: Same as @p input. 127 * @param[in] dilation (Optional) Dilation, in elements, across x and y. Defaults to (1, 1). 128 * @param[in] act_info (Optional) Activation layer information in case of a fused activation. 129 * @param[in] enable_fast_math (Optional) Enable fast math computation. In case this flag were set, the function could dispatch the fastest implementation 130 * available which may introduce a drop of accuracy as well. Default is false 131 * 132 * @return the Convolution Method Hint 133 */ 134 static ConvolutionMethod get_convolution_method(const ITensorInfo *src, const ITensorInfo *weights, const ITensorInfo *dst, const PadStrideInfo &conv_info, 135 const WeightsInfo &weights_info = WeightsInfo(), const Size2D &dilation = Size2D(1U, 1U), const ActivationLayerInfo &act_info = ActivationLayerInfo(), bool enable_fast_math = false); 136 // Inherited methods overridden: 137 void run(ITensorPack &tensors) override; 138 void prepare(ITensorPack &constants) override; 139 experimental::MemoryRequirements workspace() const override; 140 141 private: 142 std::unique_ptr<ICpuOperator> _function; 143 experimental::MemoryRequirements _aux_mem{}; 144 }; 145 } // namespace cpu 146 } // namespace arm_compute 147