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Searched hist:"7 d45a146d3c44839ba821bb91ca4950dc2b817f2" (Results 1 – 15 of 15) sorted by relevance

/XiangShan/src/test/scala/top/
H A DSimTop.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/frontend/icache/
H A DICacheMissUnit.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
H A DIPrefetch.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
H A DICacheMainPipe.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/scripts/
H A Dxiangshan.pydiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/cache/mmu/
H A DL2TLB.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
H A DTLB.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/mem/sbuffer/
H A DSbuffer.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/mem/pipeline/
H A DAtomicsUnit.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/cache/dcache/mainpipe/
H A DMissQueue.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/
H A DMakefilediff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/backend/rob/
H A DRob.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/backend/
H A DCtrlBlock.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/backend/fu/
H A DCSR.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.
/XiangShan/src/main/scala/xiangshan/mem/lsqueue/
H A DStoreQueue.scaladiff 7d45a146d3c44839ba821bb91ca4950dc2b817f2 Sun Sep 10 03:55:52 CEST 2023 Yinan Xu <[email protected]> Bump difftest for Chisel-generated interfaces (#2284)

We also add support for difftest with RISC-V Vector extension and nFused.

L2 TLB check is disabled unexpectedly and will be fixed soon.