History log of /XiangShan/src/main/scala/xiangshan/backend/fu/fpu/FPUSubModule.scala (Results 1 – 19 of 19)
Revision Date Author Comments
# 9e200047 20-Apr-2024 lewislzh <[email protected]>

Functionunit: move parameterized delay for fixtiming to latency field renamed as extralatency


# 4b0d80d8 11-Oct-2023 Xuan Hu <[email protected]>

Merge upstream/master into tmp-backend-merge-master


# 8891a219 08-Oct-2023 Yinan Xu <[email protected]>

Bump rocket-chip (#2353)


# 935edac4 21-Sep-2023 Tang Haojin <[email protected]>

chore: remove deprecated brackets, APIs, etc. (#2321)


# 6a35d972 09-May-2023 Xuan Hu <[email protected]>

fu: split io bundle into ctrl and data parts


# 730cfbc0 16-Apr-2023 Xuan Hu <[email protected]>

backend: merge v2backend into backend


# 72d89280 10-Apr-2023 Xuan Hu <[email protected]>

backend: add float inst support


# 3b739f49 06-Mar-2023 Xuan Hu <[email protected]>

v2backend: huge tmp commit


# 4b65fc7e 04-Sep-2021 Jiawei Lin <[email protected]>

FMA: separate fmul/fadd/fma (#996)

* FMA: spearate fadd/fmul/fma

* exu: enable fast uop out from fmacExeUnit

Co-authored-by: Yinan Xu <[email protected]>


# dc597826 31-Aug-2021 Jiawei Lin <[email protected]>

fudian: The new floating-point lib to replace hardfloat (#975)

* Add submodule 'fudian'

* IntToFP: use fudian

* FMA: use fudian.CMA

* FPToInt: remove recode format


# f320e0f0 24-Jul-2021 Yinan Xu <[email protected]>

misc: update PCL information (#899)

XiangShan is jointly released by ICT and PCL.


# c6d43980 04-Jun-2021 Lemover <[email protected]>

Add MulanPSL-2.0 License (#824)

In this commit, we add License for XiangShan project.


# 2225d46e 19-Apr-2021 Jiawei Lin <[email protected]>

Refactor parameters, SimTop and difftest (#753)

* difftest: use DPI-C to refactor difftest

In this commit, difftest is refactored with DPI-C calls.
There're a few reasons:
(1) From Verilator's

Refactor parameters, SimTop and difftest (#753)

* difftest: use DPI-C to refactor difftest

In this commit, difftest is refactored with DPI-C calls.
There're a few reasons:
(1) From Verilator's manual, DPI-C calls should be more efficient than accessing from dut_ptr.
(2) DPI-C is cross-platform (Verilator, VCS, ...)
(3) difftest APIs are splited from emu.cpp to possibly support more backend platforms
(NEMU, Spike, ...)

The performance at this commit is quite slower than the original emu.
Performance issues will be fixed later.

* [WIP] SimTop: try to use 'XSTop' as soc

* CircularQueuePtr: ues F-bounded polymorphis instead implict helper

* Refactor parameters & Clean up code

* difftest: support basic difftest

* Support diffetst in new sim top

* Difftest; convert recode fmt to ieee754 when comparing fp regs

* Difftest: pass sign-ext pc to dpic functions && fix exception pc

* Debug: add int/exc inst wb to debug queue

* Difftest: pass sign-ext pc to dpic functions && fix exception pc

* Difftest: fix naive commit num limit

Co-authored-by: Yinan Xu <[email protected]>
Co-authored-by: William Wang <[email protected]>

show more ...


# 9ca85825 23-Feb-2021 LinJiawei <[email protected]>

fpu: wrap data part in a data module


# 7f1506e3 20-Dec-2020 LinJiawei <[email protected]>

[WIP] use berkeley-hardfloat in float units


# 52c3f215 16-Nov-2020 LinJiawei <[email protected]>

[WIP] exu: spilt exuConfig and it's module


# e18c367f 08-Nov-2020 LinJiawei <[email protected]>

[Backend]: Optimize exu and fu


# 1df1dea4 17-Sep-2020 LinJiawei <[email protected]>

FPU: change fpu submodules's IOs to 'FunctionIO'


# b5a00ce7 17-Sep-2020 LinJiawei <[email protected]>

FPU: move fpu to xiangshan/backend/fu/fpu