test: add example of chiseltest's unit-test and generating verilog for xs' module (#1890)

* test: add example to genenrate verilog for a small module

Just use Parameters from DefaultConfig(& Argp

test: add example of chiseltest's unit-test and generating verilog for xs' module (#1890)

* test: add example to genenrate verilog for a small module

Just use Parameters from DefaultConfig(& Argparser) like XSTop/SimTop

* test: add DecodeUnitTest as an example for xs' chiseltest

* ctrlblock: <> usage has changed, unidirection should use :=

* bump huancun

* makefile: mv new makefile cmd into Makefile.test

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