Makefile (b1b8eef17ced6b0b1654d86ce68a95f8047ce50c) Makefile (1fc8b8778a8bfc722c895017ebb477b5ecdd325e)
1#***************************************************************************************
2# Copyright (c) 2024 Beijing Institute of Open Source Chip (BOSC)
3# Copyright (c) 2020-2024 Institute of Computing Technology, Chinese Academy of Sciences
4# Copyright (c) 2020-2021 Peng Cheng Laboratory
5#
6# XiangShan is licensed under Mulan PSL v2.
7# You can use this software according to the terms and conditions of the Mulan PSL v2.
8# You may obtain a copy of Mulan PSL v2 at:

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31SCALA_FILE = $(shell find ./src/main/scala -name '*.scala')
32TEST_FILE = $(shell find ./src/test/scala -name '*.scala')
33
34MEM_GEN = ./scripts/vlsi_mem_gen
35MEM_GEN_SEP = ./scripts/gen_sep_mem.sh
36
37CONFIG ?= DefaultConfig
38NUM_CORES ?= 1
1#***************************************************************************************
2# Copyright (c) 2024 Beijing Institute of Open Source Chip (BOSC)
3# Copyright (c) 2020-2024 Institute of Computing Technology, Chinese Academy of Sciences
4# Copyright (c) 2020-2021 Peng Cheng Laboratory
5#
6# XiangShan is licensed under Mulan PSL v2.
7# You can use this software according to the terms and conditions of the Mulan PSL v2.
8# You may obtain a copy of Mulan PSL v2 at:

--- 22 unchanged lines hidden (view full) ---

31SCALA_FILE = $(shell find ./src/main/scala -name '*.scala')
32TEST_FILE = $(shell find ./src/test/scala -name '*.scala')
33
34MEM_GEN = ./scripts/vlsi_mem_gen
35MEM_GEN_SEP = ./scripts/gen_sep_mem.sh
36
37CONFIG ?= DefaultConfig
38NUM_CORES ?= 1
39ISSUE ?= B
39
40
41SUPPORT_CHI_ISSUE = B E.b
42ifeq ($(findstring $(ISSUE), $(SUPPORT_CHI_ISSUE)),)
43$(error "Unsupported CHI issue: $(ISSUE)")
44endif
45
40ifneq ($(shell echo "$(MAKECMDGOALS)" | grep ' '),)
41$(error At most one target can be specified)
42endif
43
44ifeq ($(MAKECMDGOALS),)
45GOALS = verilog
46else
47GOALS = $(MAKECMDGOALS)

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132.DEFAULT_GOAL = verilog
133
134help:
135 mill -i xiangshan.runMain $(FPGATOP) --help
136
137$(TOP_V): $(SCALA_FILE)
138 mkdir -p $(@D)
139 $(TIME_CMD) mill -i xiangshan.runMain $(FPGATOP) \
46ifneq ($(shell echo "$(MAKECMDGOALS)" | grep ' '),)
47$(error At most one target can be specified)
48endif
49
50ifeq ($(MAKECMDGOALS),)
51GOALS = verilog
52else
53GOALS = $(MAKECMDGOALS)

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138.DEFAULT_GOAL = verilog
139
140help:
141 mill -i xiangshan.runMain $(FPGATOP) --help
142
143$(TOP_V): $(SCALA_FILE)
144 mkdir -p $(@D)
145 $(TIME_CMD) mill -i xiangshan.runMain $(FPGATOP) \
140 --target-dir $(@D) --config $(CONFIG) $(FPGA_MEM_ARGS) \
146 --target-dir $(@D) --config $(CONFIG) --issue $(ISSUE) $(FPGA_MEM_ARGS) \
141 --num-cores $(NUM_CORES) $(RELEASE_ARGS)
142 $(MEM_GEN_SEP) "$(MEM_GEN)" "[email protected]" "$(@D)"
143 @git log -n 1 >> .__head__
144 @git diff >> .__diff__
145 @sed -i 's/^/\/\// ' .__head__
146 @sed -i 's/^/\/\//' .__diff__
147 @cat .__head__ .__diff__ $@ > .__out__
148 @mv .__out__ $@
149 @rm .__head__ .__diff__
150
151verilog: $(TOP_V)
152
153$(SIM_TOP_V): $(SCALA_FILE) $(TEST_FILE)
154 mkdir -p $(@D)
155 @echo -e "\n[mill] Generating Verilog files..." > $(TIMELOG)
156 @date -R | tee -a $(TIMELOG)
157 $(TIME_CMD) mill -i xiangshan.test.runMain $(SIMTOP) \
147 --num-cores $(NUM_CORES) $(RELEASE_ARGS)
148 $(MEM_GEN_SEP) "$(MEM_GEN)" "[email protected]" "$(@D)"
149 @git log -n 1 >> .__head__
150 @git diff >> .__diff__
151 @sed -i 's/^/\/\// ' .__head__
152 @sed -i 's/^/\/\//' .__diff__
153 @cat .__head__ .__diff__ $@ > .__out__
154 @mv .__out__ $@
155 @rm .__head__ .__diff__
156
157verilog: $(TOP_V)
158
159$(SIM_TOP_V): $(SCALA_FILE) $(TEST_FILE)
160 mkdir -p $(@D)
161 @echo -e "\n[mill] Generating Verilog files..." > $(TIMELOG)
162 @date -R | tee -a $(TIMELOG)
163 $(TIME_CMD) mill -i xiangshan.test.runMain $(SIMTOP) \
158 --target-dir $(@D) --config $(CONFIG) $(SIM_MEM_ARGS) \
164 --target-dir $(@D) --config $(CONFIG) --issue $(ISSUE) $(SIM_MEM_ARGS) \
159 --num-cores $(NUM_CORES) $(SIM_ARGS) --full-stacktrace
160 $(MEM_GEN_SEP) "$(MEM_GEN)" "[email protected]" "$(@D)"
161 @git log -n 1 >> .__head__
162 @git diff >> .__diff__
163 @sed -i 's/^/\/\// ' .__head__
164 @sed -i 's/^/\/\//' .__diff__
165 @cat .__head__ .__diff__ $@ > .__out__
166 @mv .__out__ $@

--- 61 unchanged lines hidden --- 		165 --num-cores $(NUM_CORES) $(SIM_ARGS) --full-stacktrace
166 $(MEM_GEN_SEP) "$(MEM_GEN)" "[email protected]" "$(@D)"
167 @git log -n 1 >> .__head__
168 @git diff >> .__diff__
169 @sed -i 's/^/\/\// ' .__head__
170 @sed -i 's/^/\/\//' .__diff__
171 @cat .__head__ .__diff__ $@ > .__out__
172 @mv .__out__ $@

--- 61 unchanged lines hidden ---