1 // Author: Xianjun Jiao, Michael Mehari, Wei Liu 2 // SPDX-FileCopyrightText: 2019 UGent 3 // SPDX-License-Identifier: AGPL-3.0-or-later 4 5 #include <linux/bitops.h> 6 #include <linux/dmapool.h> 7 #include <linux/io.h> 8 #include <linux/iopoll.h> 9 #include <linux/of_address.h> 10 #include <linux/of_platform.h> 11 #include <linux/of_irq.h> 12 #include <linux/slab.h> 13 #include <linux/clk.h> 14 #include <linux/io-64-nonatomic-lo-hi.h> 15 16 #include <linux/delay.h> 17 #include <linux/interrupt.h> 18 19 #include <linux/dmaengine.h> 20 #include <linux/slab.h> 21 #include <linux/delay.h> 22 #include <linux/etherdevice.h> 23 24 #include <linux/init.h> 25 #include <linux/kthread.h> 26 #include <linux/module.h> 27 #include <linux/of_dma.h> 28 #include <linux/platform_device.h> 29 #include <linux/random.h> 30 #include <linux/slab.h> 31 #include <linux/wait.h> 32 #include <linux/sched/task.h> 33 #include <linux/dma/xilinx_dma.h> 34 #include <linux/spi/spi.h> 35 #include <net/mac80211.h> 36 37 #include <linux/clk.h> 38 #include <linux/clkdev.h> 39 #include <linux/clk-provider.h> 40 41 #include <linux/iio/iio.h> 42 #include <linux/iio/sysfs.h> 43 44 #include <linux/gpio.h> 45 #include <linux/leds.h> 46 47 #define IIO_AD9361_USE_PRIVATE_H_ 48 #include "ad9361/ad9361_regs.h" 49 #include "ad9361/ad9361.h" 50 #include "ad9361/ad9361_private.h" 51 52 #include <../../drivers/iio/frequency/cf_axi_dds.h> 53 54 #include "../user_space/sdrctl_src/nl80211_testmode_def.h" 55 #include "hw_def.h" 56 #include "sdr.h" 57 #include "git_rev.h" 58 59 // driver API of component driver 60 extern struct tx_intf_driver_api *tx_intf_api; 61 extern struct rx_intf_driver_api *rx_intf_api; 62 extern struct openofdm_tx_driver_api *openofdm_tx_api; 63 extern struct openofdm_rx_driver_api *openofdm_rx_api; 64 extern struct xpu_driver_api *xpu_api; 65 66 static int test_mode = 0; // 0 normal; 1 rx test 67 68 MODULE_AUTHOR("Xianjun Jiao"); 69 MODULE_DESCRIPTION("SDR driver"); 70 MODULE_LICENSE("GPL v2"); 71 72 module_param(test_mode, int, 0); 73 MODULE_PARM_DESC(myint, "test_mode. 0 normal; 1 rx test"); 74 75 // ---------------rfkill--------------------------------------- 76 static bool openwifi_is_radio_enabled(struct openwifi_priv *priv) 77 { 78 int reg; 79 80 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 81 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 82 else 83 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 84 85 if (reg == AD9361_RADIO_ON_TX_ATT) 86 return true;// 0 off, 1 on 87 return false; 88 } 89 90 void openwifi_rfkill_init(struct ieee80211_hw *hw) 91 { 92 struct openwifi_priv *priv = hw->priv; 93 94 priv->rfkill_off = openwifi_is_radio_enabled(priv); 95 printk("%s openwifi_rfkill_init: wireless switch is %s\n", sdr_compatible_str, priv->rfkill_off ? "on" : "off"); 96 wiphy_rfkill_set_hw_state(hw->wiphy, !priv->rfkill_off); 97 wiphy_rfkill_start_polling(hw->wiphy); 98 } 99 100 void openwifi_rfkill_poll(struct ieee80211_hw *hw) 101 { 102 bool enabled; 103 struct openwifi_priv *priv = hw->priv; 104 105 enabled = openwifi_is_radio_enabled(priv); 106 // printk("%s openwifi_rfkill_poll: wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 107 if (unlikely(enabled != priv->rfkill_off)) { 108 priv->rfkill_off = enabled; 109 printk("%s openwifi_rfkill_poll: WARNING wireless radio switch turned %s\n", sdr_compatible_str, enabled ? "on" : "off"); 110 wiphy_rfkill_set_hw_state(hw->wiphy, !enabled); 111 } 112 } 113 114 void openwifi_rfkill_exit(struct ieee80211_hw *hw) 115 { 116 printk("%s openwifi_rfkill_exit\n", sdr_compatible_str); 117 wiphy_rfkill_stop_polling(hw->wiphy); 118 } 119 //----------------rfkill end----------------------------------- 120 121 //static void ad9361_rf_init(void); 122 //static void ad9361_rf_stop(void); 123 //static void ad9361_rf_calc_rssi(void); 124 static void ad9361_rf_set_channel(struct ieee80211_hw *dev, 125 struct ieee80211_conf *conf) 126 { 127 struct openwifi_priv *priv = dev->priv; 128 u32 actual_rx_lo = conf->chandef.chan->center_freq - priv->rx_freq_offset_to_lo_MHz + priv->drv_rx_reg_val[DRV_RX_REG_IDX_EXTRA_FO]; 129 u32 actual_tx_lo, reg_val; 130 bool change_flag = (actual_rx_lo != priv->actual_rx_lo); 131 132 if (change_flag) { 133 priv->actual_rx_lo = actual_rx_lo; 134 135 actual_tx_lo = conf->chandef.chan->center_freq - priv->tx_freq_offset_to_lo_MHz; 136 137 ad9361_clk_set_rate(priv->ad9361_phy->clks[RX_RFPLL], ( ((u64)1000000ull)*((u64)actual_rx_lo )>>1) ); 138 ad9361_clk_set_rate(priv->ad9361_phy->clks[TX_RFPLL], ( ((u64)1000000ull)*((u64)actual_tx_lo )>>1) ); 139 140 if (actual_rx_lo<2412) { 141 priv->rssi_correction = 153; 142 } else if (actual_rx_lo<=2484) { 143 priv->rssi_correction = 153; 144 } else if (actual_rx_lo<5160) { 145 priv->rssi_correction = 153; 146 } else if (actual_rx_lo<=5240) { 147 priv->rssi_correction = 145; 148 } else if (actual_rx_lo<=5320) { 149 priv->rssi_correction = 148; 150 } else { 151 priv->rssi_correction = 148; 152 } 153 154 // xpu_api->XPU_REG_LBT_TH_write((priv->rssi_correction-62)<<1); // -62dBm 155 reg_val=xpu_api->XPU_REG_LBT_TH_read(); 156 xpu_api->XPU_REG_LBT_TH_write( (reg_val & 0xFFFF0000) | ((priv->rssi_correction-62-16)<<1)); // wei's magic value is 135, here is 134 @ ch 44 157 158 if (actual_rx_lo < 2500) { 159 //priv->slot_time = 20; //20 is default slot time in ERP(OFDM)/11g 2.4G; short one is 9. 160 //xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_2_4GHZ<<16); 161 if (priv->band != BAND_2_4GHZ) { 162 priv->band = BAND_2_4GHZ; 163 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 164 } 165 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2)*10)<<16) | 10 ); // high 16 bits to cover sig valid of ACK packet, low 16 bits is adjustment of fcs valid waiting time. let's add 2us for those device that is really "slow"! 166 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((45+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 167 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 0 ); 168 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((10)*10)<<16); 169 } 170 else { 171 //priv->slot_time = 9; //default slot time of OFDM PHY (OFDM by default means 5GHz) 172 // xpu_api->XPU_REG_BAND_CHANNEL_write(BAND_5_8GHZ<<16); 173 if (priv->band != BAND_5_8GHZ) { 174 priv->band = BAND_5_8GHZ; 175 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 176 } 177 // //xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2)*10)<<16) | 10 ); // because 5GHz needs longer SIFS (16 instead of 10), we need 58 instead of 48 for XPU low mac setting. let's add 2us for those device that is really "slow"! 178 // xpu_api->XPU_REG_RECV_ACK_COUNT_TOP_write( (((51+2+2)*10)<<16) | 10 );//add 2us for longer fir. BUT corrding to FPGA probing test, we do not need this 179 // //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 60*10 ); 180 // xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( 50*10 );// for longer fir we need this delay 1us shorter 181 // tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write(((16)*10)<<16); 182 } 183 //printk("%s ad9361_rf_set_channel %dM rssi_correction %d\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction); 184 // //-- use less 185 //clk_prepare_enable(priv->ad9361_phy->clks[RX_RFPLL]); 186 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 187 //ad9361_set_trx_clock_chain_default(priv->ad9361_phy); 188 //printk("%s ad9361_rf_set_channel tune to %d read back %llu\n", sdr_compatible_str,conf->chandef.chan->center_freq,2*priv->ad9361_phy->state->current_rx_lo_freq); 189 } 190 printk("%s ad9361_rf_set_channel %dM rssi_correction %d (change flag %d)\n", sdr_compatible_str,conf->chandef.chan->center_freq,priv->rssi_correction,change_flag); 191 } 192 193 const struct openwifi_rf_ops ad9361_rf_ops = { 194 .name = "ad9361", 195 // .init = ad9361_rf_init, 196 // .stop = ad9361_rf_stop, 197 .set_chan = ad9361_rf_set_channel, 198 // .calc_rssi = ad9361_rf_calc_rssi, 199 }; 200 201 u16 reverse16(u16 d) { 202 union u16_byte2 tmp0, tmp1; 203 tmp0.a = d; 204 tmp1.c[0] = tmp0.c[1]; 205 tmp1.c[1] = tmp0.c[0]; 206 return(tmp1.a); 207 } 208 209 u32 reverse32(u32 d) { 210 union u32_byte4 tmp0, tmp1; 211 tmp0.a = d; 212 tmp1.c[0] = tmp0.c[3]; 213 tmp1.c[1] = tmp0.c[2]; 214 tmp1.c[2] = tmp0.c[1]; 215 tmp1.c[3] = tmp0.c[0]; 216 return(tmp1.a); 217 } 218 219 static int openwifi_init_tx_ring(struct openwifi_priv *priv, int ring_idx) 220 { 221 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 222 int i; 223 224 ring->stop_flag = 0; 225 ring->bd_wr_idx = 0; 226 ring->bd_rd_idx = 0; 227 ring->bds = kmalloc(sizeof(struct openwifi_buffer_descriptor)*NUM_TX_BD,GFP_KERNEL); 228 if (ring->bds==NULL) { 229 printk("%s openwifi_init_tx_ring: WARNING Cannot allocate TX ring\n",sdr_compatible_str); 230 return -ENOMEM; 231 } 232 233 for (i = 0; i < NUM_TX_BD; i++) { 234 ring->bds[i].skb_linked=0; // for tx, skb is from upper layer 235 //at first right after skb allocated, head, data, tail are the same. 236 ring->bds[i].dma_mapping_addr = 0; // for tx, mapping is done after skb is received from upper layer in tx routine 237 } 238 239 return 0; 240 } 241 242 static void openwifi_free_tx_ring(struct openwifi_priv *priv, int ring_idx) 243 { 244 struct openwifi_ring *ring = &(priv->tx_ring[ring_idx]); 245 int i; 246 247 ring->stop_flag = 0; 248 ring->bd_wr_idx = 0; 249 ring->bd_rd_idx = 0; 250 for (i = 0; i < NUM_TX_BD; i++) { 251 if (ring->bds[i].skb_linked == 0 && ring->bds[i].dma_mapping_addr == 0) 252 continue; 253 if (ring->bds[i].dma_mapping_addr != 0) 254 dma_unmap_single(priv->tx_chan->device->dev, ring->bds[i].dma_mapping_addr,ring->bds[i].skb_linked->len, DMA_MEM_TO_DEV); 255 // if (ring->bds[i].skb_linked!=NULL) 256 // dev_kfree_skb(ring->bds[i].skb_linked); // only use dev_kfree_skb when there is exception 257 if ( (ring->bds[i].dma_mapping_addr != 0 && ring->bds[i].skb_linked == 0) || 258 (ring->bds[i].dma_mapping_addr == 0 && ring->bds[i].skb_linked != 0)) 259 printk("%s openwifi_free_tx_ring: WARNING ring %d i %d skb_linked %p dma_mapping_addr %08llx\n", sdr_compatible_str, 260 ring_idx, i, (void*)(ring->bds[i].skb_linked), ring->bds[i].dma_mapping_addr); 261 262 ring->bds[i].skb_linked=0; 263 ring->bds[i].dma_mapping_addr = 0; 264 } 265 if (ring->bds) 266 kfree(ring->bds); 267 ring->bds = NULL; 268 } 269 270 static int openwifi_init_rx_ring(struct openwifi_priv *priv) 271 { 272 int i; 273 u8 *pdata_tmp; 274 275 priv->rx_cyclic_buf = dma_alloc_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,&priv->rx_cyclic_buf_dma_mapping_addr,GFP_KERNEL); 276 if (!priv->rx_cyclic_buf) { 277 printk("%s openwifi_init_rx_ring: WARNING dma_alloc_coherent failed!\n", sdr_compatible_str); 278 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 279 return(-1); 280 } 281 282 // Set tsft_low and tsft_high to 0. If they are not zero, it means there is a packet in the buffer by DMA 283 for (i=0; i<NUM_RX_BD; i++) { 284 pdata_tmp = priv->rx_cyclic_buf + i*RX_BD_BUF_SIZE; // our header insertion is at the beginning 285 (*((u32*)(pdata_tmp+0 ))) = 0; 286 (*((u32*)(pdata_tmp+4 ))) = 0; 287 } 288 printk("%s openwifi_init_rx_ring: tsft_low and tsft_high are cleared!\n", sdr_compatible_str); 289 290 return 0; 291 } 292 293 static void openwifi_free_rx_ring(struct openwifi_priv *priv) 294 { 295 if (priv->rx_cyclic_buf) 296 dma_free_coherent(priv->rx_chan->device->dev,RX_BD_BUF_SIZE*NUM_RX_BD,priv->rx_cyclic_buf,priv->rx_cyclic_buf_dma_mapping_addr); 297 298 priv->rx_cyclic_buf_dma_mapping_addr = 0; 299 priv->rx_cyclic_buf = 0; 300 } 301 302 static int rx_dma_setup(struct ieee80211_hw *dev){ 303 struct openwifi_priv *priv = dev->priv; 304 struct dma_device *rx_dev = priv->rx_chan->device; 305 306 priv->rxd = rx_dev->device_prep_dma_cyclic(priv->rx_chan,priv->rx_cyclic_buf_dma_mapping_addr,RX_BD_BUF_SIZE*NUM_RX_BD,RX_BD_BUF_SIZE,DMA_DEV_TO_MEM,DMA_CTRL_ACK|DMA_PREP_INTERRUPT); 307 if (!(priv->rxd)) { 308 openwifi_free_rx_ring(priv); 309 printk("%s rx_dma_setup: WARNING rx_dev->device_prep_dma_cyclic %p\n", sdr_compatible_str, (void*)(priv->rxd)); 310 return(-1); 311 } 312 priv->rxd->callback = 0; 313 priv->rxd->callback_param = 0; 314 315 priv->rx_cookie = priv->rxd->tx_submit(priv->rxd); 316 317 if (dma_submit_error(priv->rx_cookie)) { 318 printk("%s rx_dma_setup: WARNING dma_submit_error(rx_cookie) %d\n", sdr_compatible_str, (u32)(priv->rx_cookie)); 319 return(-1); 320 } 321 322 dma_async_issue_pending(priv->rx_chan); 323 return(0); 324 } 325 326 static irqreturn_t openwifi_rx_interrupt(int irq, void *dev_id) 327 { 328 struct ieee80211_hw *dev = dev_id; 329 struct openwifi_priv *priv = dev->priv; 330 struct ieee80211_rx_status rx_status = {0}; 331 struct sk_buff *skb; 332 struct ieee80211_hdr *hdr; 333 u32 addr1_low32=0, addr2_low32=0, addr3_low32=0, len, rate_idx, tsft_low, tsft_high, loop_count=0, ht_flag, short_gi;//, fc_di; 334 // u32 dma_driver_buf_idx_mod; 335 u8 *pdata_tmp, fcs_ok;//, target_buf_idx;//, phy_rx_sn_hw; 336 s8 signal; 337 u16 rssi_val, addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0; 338 bool content_ok = false, len_overflow = false; 339 static u8 target_buf_idx_old = 0; 340 341 spin_lock(&priv->lock); 342 343 while(1) { // loop all rx buffers that have new rx packets 344 pdata_tmp = priv->rx_cyclic_buf + target_buf_idx_old*RX_BD_BUF_SIZE; // our header insertion is at the beginning 345 tsft_low = (*((u32*)(pdata_tmp+0 ))); 346 tsft_high = (*((u32*)(pdata_tmp+4 ))); 347 if ( tsft_low==0 && tsft_high==0 ) // no packet in the buffer 348 break; 349 350 rssi_val = (*((u16*)(pdata_tmp+8 ))); 351 len = (*((u16*)(pdata_tmp+12))); 352 353 len_overflow = (len>(RX_BD_BUF_SIZE-16)?true:false); 354 355 rate_idx = (*((u16*)(pdata_tmp+14))); 356 short_gi = ((rate_idx&0x20)!=0); 357 rate_idx = (rate_idx&0xDF); 358 359 fcs_ok = ( len_overflow?0:(*(( u8*)(pdata_tmp+16+len-1))) ); 360 361 //phy_rx_sn_hw = (fcs_ok&(NUM_RX_BD-1)); 362 // phy_rx_sn_hw = (fcs_ok&0x7f);//0x7f is FPGA limitation 363 // dma_driver_buf_idx_mod = (state.residue&0x7f); 364 fcs_ok = ((fcs_ok&0x80)!=0); 365 ht_flag = ((rate_idx&0x10)!=0); 366 367 if ( (len>=14 && (!len_overflow)) && (rate_idx>=8 && rate_idx<=23)) { 368 // if ( phy_rx_sn_hw!=dma_driver_buf_idx_mod) { 369 // printk("%s openwifi_rx_interrupt: WARNING sn %d next buf_idx %d!\n", sdr_compatible_str,phy_rx_sn_hw,dma_driver_buf_idx_mod); 370 // } 371 content_ok = true; 372 } else { 373 printk("%s openwifi_rx_interrupt: WARNING content!\n", sdr_compatible_str); 374 content_ok = false; 375 } 376 377 rssi_val = (rssi_val>>1); 378 if ( (rssi_val+128)<priv->rssi_correction ) 379 signal = -128; 380 else 381 signal = rssi_val - priv->rssi_correction; 382 383 // fc_di = (*((u32*)(pdata_tmp+16))); 384 // addr1_high16 = (*((u16*)(pdata_tmp+16+4))); 385 // addr1_low32 = (*((u32*)(pdata_tmp+16+4+2))); 386 // addr2_high16 = (*((u16*)(pdata_tmp+16+6+4))); 387 // addr2_low32 = (*((u32*)(pdata_tmp+16+6+4+2))); 388 // addr3_high16 = (*((u16*)(pdata_tmp+16+12+4))); 389 // addr3_low32 = (*((u32*)(pdata_tmp+16+12+4+2))); 390 if ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&2) || ( (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) && fcs_ok==0 ) ) { 391 hdr = (struct ieee80211_hdr *)(pdata_tmp+16); 392 addr1_low32 = *((u32*)(hdr->addr1+2)); 393 addr1_high16 = *((u16*)(hdr->addr1)); 394 if (len>=20) { 395 addr2_low32 = *((u32*)(hdr->addr2+2)); 396 addr2_high16 = *((u16*)(hdr->addr2)); 397 } 398 if (len>=26) { 399 addr3_low32 = *((u32*)(hdr->addr3+2)); 400 addr3_high16 = *((u16*)(hdr->addr3)); 401 } 402 if (len>=28) 403 sc = hdr->seq_ctrl; 404 405 if ( addr1_low32!=0xffffffff || addr1_high16!=0xffff ) 406 printk("%s openwifi_rx_interrupt:%4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x fcs%d buf_idx%d %ddBm\n", sdr_compatible_str, 407 len, ht_flag, wifi_rate_table[rate_idx], hdr->frame_control, hdr->duration_id, 408 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 409 sc, fcs_ok, target_buf_idx_old, signal); 410 } 411 412 // priv->phy_rx_sn_hw_old = phy_rx_sn_hw; 413 if (content_ok) { 414 skb = dev_alloc_skb(len); 415 if (skb) { 416 skb_put_data(skb,pdata_tmp+16,len); 417 418 rx_status.antenna = 0; 419 // def in ieee80211_rate openwifi_rates 0~11. 0~3 11b(1M~11M), 4~11 11a/g(6M~54M) 420 rx_status.rate_idx = wifi_rate_table_mapping[rate_idx]; 421 rx_status.signal = signal; 422 rx_status.freq = dev->conf.chandef.chan->center_freq; 423 rx_status.band = dev->conf.chandef.chan->band; 424 rx_status.mactime = ( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 425 rx_status.flag |= RX_FLAG_MACTIME_START; 426 if (!fcs_ok) 427 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC; 428 if (rate_idx <= 15) 429 rx_status.encoding = RX_ENC_LEGACY; 430 else 431 rx_status.encoding = RX_ENC_HT; 432 rx_status.bw = RATE_INFO_BW_20; 433 if (short_gi) 434 rx_status.enc_flags |= RX_ENC_FLAG_SHORT_GI; 435 436 memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status)); // put rx_status into skb->cb, from now on skb->cb is not dma_dsts any more. 437 ieee80211_rx_irqsafe(dev, skb); // call mac80211 function 438 } else 439 printk("%s openwifi_rx_interrupt: WARNING dev_alloc_skb failed!\n", sdr_compatible_str); 440 } 441 (*((u32*)(pdata_tmp+0 ))) = 0; 442 (*((u32*)(pdata_tmp+4 ))) = 0; // clear the tsft_low and tsft_high to indicate the packet has been processed 443 loop_count++; 444 target_buf_idx_old=((target_buf_idx_old+1)&(NUM_RX_BD-1)); 445 } 446 447 if ( loop_count!=1 && (priv->drv_rx_reg_val[DRV_RX_REG_IDX_PRINT_CFG]&1) ) 448 printk("%s openwifi_rx_interrupt: WARNING loop_count %d\n", sdr_compatible_str,loop_count); 449 450 // openwifi_rx_interrupt_out: 451 spin_unlock(&priv->lock); 452 return IRQ_HANDLED; 453 } 454 455 static irqreturn_t openwifi_tx_interrupt(int irq, void *dev_id) 456 { 457 struct ieee80211_hw *dev = dev_id; 458 struct openwifi_priv *priv = dev->priv; 459 struct openwifi_ring *ring; 460 struct sk_buff *skb; 461 struct ieee80211_tx_info *info; 462 u32 reg_val, hw_queue_len, prio, queue_idx, dma_fifo_no_room_flag, num_slot_random, cw, loop_count=0;//, i; 463 u8 tx_result_report; 464 // u16 prio_rd_idx_store[64]={0}; 465 466 spin_lock(&priv->lock); 467 468 while(1) { // loop all packets that have been sent by FPGA 469 reg_val = tx_intf_api->TX_INTF_REG_PKT_INFO_read(); 470 if (reg_val!=0xFFFFFFFF) { 471 prio = ((0x7FFFF & reg_val)>>(5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 472 cw = ((0xF0000000 & reg_val) >> 28); 473 num_slot_random = ((0xFF80000 ®_val)>>(2+5+NUM_BIT_MAX_PHY_TX_SN+NUM_BIT_MAX_NUM_HW_QUEUE)); 474 if(cw > 10) { 475 cw = 10 ; 476 num_slot_random += 512 ; 477 } 478 479 ring = &(priv->tx_ring[prio]); 480 ring->bd_rd_idx = ((reg_val>>5)&MAX_PHY_TX_SN); 481 skb = ring->bds[ring->bd_rd_idx].skb_linked; 482 483 dma_unmap_single(priv->tx_chan->device->dev,ring->bds[ring->bd_rd_idx].dma_mapping_addr, 484 skb->len, DMA_MEM_TO_DEV); 485 486 if ( ring->stop_flag == 1) { 487 // Wake up Linux queue if FPGA and driver ring have room 488 queue_idx = ((reg_val>>(5+NUM_BIT_MAX_PHY_TX_SN))&(MAX_NUM_HW_QUEUE-1)); 489 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 490 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 491 492 // printk("%s openwifi_tx_interrupt: WARNING loop %d prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d call %d\n", sdr_compatible_str, 493 // loop_count, prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx, priv->call_counter); 494 495 if ( ((dma_fifo_no_room_flag>>queue_idx)&1)==0 && (NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))>=RING_ROOM_THRESHOLD ) { 496 // printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue loop %d call %d\n", sdr_compatible_str, loop_count, priv->call_counter); 497 printk("%s openwifi_tx_interrupt: WARNING ieee80211_wake_queue prio %d queue %d no room flag %x hw queue len %08x wr %d rd %d\n", sdr_compatible_str, 498 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, ring->bd_wr_idx, ring->bd_rd_idx); 499 ieee80211_wake_queue(dev, prio); 500 ring->stop_flag = 0; 501 } 502 } 503 504 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 505 printk("%s openwifi_tx_interrupt: WARNING %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 506 continue; 507 } 508 509 skb_pull(skb, LEN_PHY_HEADER); 510 //skb_trim(skb, num_byte_pad_skb); 511 info = IEEE80211_SKB_CB(skb); 512 ieee80211_tx_info_clear_status(info); 513 514 tx_result_report = (reg_val&0x1F); 515 if ( !(info->flags & IEEE80211_TX_CTL_NO_ACK) ) { 516 if ((tx_result_report&0x10)==0) 517 info->flags |= IEEE80211_TX_STAT_ACK; 518 519 // printk("%s openwifi_tx_interrupt: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 520 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 521 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 522 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 523 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 524 } 525 526 info->status.rates[0].count = (tx_result_report&0xF) + 1; //according to our test, the 1st rate is the most important. we only do retry on the 1st rate 527 info->status.rates[1].idx = -1; 528 info->status.rates[2].idx = -1; 529 info->status.rates[3].idx = -1;//in mac80211.h: #define IEEE80211_TX_MAX_RATES 4 530 531 if ( (tx_result_report&0x10) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 532 printk("%s openwifi_tx_interrupt: WARNING tx_result %02x prio%d wr%d rd%d\n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx); 533 if ( (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&2) ) 534 printk("%s openwifi_tx_interrupt: tx_result %02x prio%d wr%d rd%d num_rand_slot %d cw %d \n", sdr_compatible_str, tx_result_report, prio, ring->bd_wr_idx, ring->bd_rd_idx, num_slot_random,cw); 535 536 ieee80211_tx_status_irqsafe(dev, skb); 537 538 loop_count++; 539 540 // printk("%s openwifi_tx_interrupt: loop %d prio %d rd %d\n", sdr_compatible_str, loop_count, prio, ring->bd_rd_idx); 541 542 } else 543 break; 544 } 545 if ( loop_count!=1 && ((priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG])&1) ) 546 printk("%s openwifi_tx_interrupt: WARNING loop_count %d\n", sdr_compatible_str, loop_count); 547 548 spin_unlock(&priv->lock); 549 return IRQ_HANDLED; 550 } 551 552 u32 gen_parity(u32 v){ 553 v ^= v >> 1; 554 v ^= v >> 2; 555 v = (v & 0x11111111U) * 0x11111111U; 556 return (v >> 28) & 1; 557 } 558 559 u8 gen_ht_sig_crc(u64 m) 560 { 561 u8 i, temp, c[8] = {1, 1, 1, 1, 1, 1, 1, 1}, ht_sig_crc; 562 563 for (i = 0; i < 34; i++) 564 { 565 temp = c[7] ^ ((m >> i) & 0x01); 566 567 c[7] = c[6]; 568 c[6] = c[5]; 569 c[5] = c[4]; 570 c[4] = c[3]; 571 c[3] = c[2]; 572 c[2] = c[1] ^ temp; 573 c[1] = c[0] ^ temp; 574 c[0] = temp; 575 } 576 ht_sig_crc = ((~c[7] & 0x01) << 0) | ((~c[6] & 0x01) << 1) | ((~c[5] & 0x01) << 2) | ((~c[4] & 0x01) << 3) | ((~c[3] & 0x01) << 4) | ((~c[2] & 0x01) << 5) | ((~c[1] & 0x01) << 6) | ((~c[0] & 0x01) << 7); 577 578 return ht_sig_crc; 579 } 580 581 u32 calc_phy_header(u8 rate_hw_value, bool use_ht_rate, bool use_short_gi, u32 len, u8 *bytes){ 582 //u32 signal_word = 0 ; 583 u8 SIG_RATE = 0, HT_SIG_RATE; 584 u8 len_2to0, len_10to3, len_msb,b0,b1,b2, header_parity ; 585 u32 l_len, ht_len, ht_sig1, ht_sig2; 586 587 // printk("rate_hw_value=%u\tuse_ht_rate=%u\tuse_short_gi=%u\tlen=%u\n", rate_hw_value, use_ht_rate, use_short_gi, len); 588 589 // HT-mixed mode ht signal 590 591 if(use_ht_rate) 592 { 593 SIG_RATE = wifi_mcs_table_11b_force_up[4]; 594 HT_SIG_RATE = rate_hw_value; 595 l_len = 24 * len / wifi_n_dbps_ht_table[rate_hw_value]; 596 ht_len = len; 597 } 598 else 599 { 600 // rate_hw_value = (rate_hw_value<=4?0:(rate_hw_value-4)); 601 // SIG_RATE = wifi_mcs_table_phy_tx[rate_hw_value]; 602 SIG_RATE = wifi_mcs_table_11b_force_up[rate_hw_value]; 603 l_len = len; 604 } 605 606 len_2to0 = l_len & 0x07 ; 607 len_10to3 = (l_len >> 3 ) & 0xFF ; 608 len_msb = (l_len >> 11) & 0x01 ; 609 610 b0=SIG_RATE | (len_2to0 << 5) ; 611 b1 = len_10to3 ; 612 header_parity = gen_parity((len_msb << 16)| (b1<<8) | b0) ; 613 b2 = ( len_msb | (header_parity << 1) ) ; 614 615 memset(bytes,0,16); 616 bytes[0] = b0 ; 617 bytes[1] = b1 ; 618 bytes[2] = b2; 619 620 // HT-mixed mode signal 621 if(use_ht_rate) 622 { 623 ht_sig1 = (HT_SIG_RATE & 0x7F) | ((ht_len << 8) & 0xFFFF00); 624 ht_sig2 = 0x04 | (use_short_gi << 7); 625 ht_sig2 = ht_sig2 | (gen_ht_sig_crc(ht_sig1 | ht_sig2 << 24) << 10); 626 627 bytes[3] = 1; 628 bytes[8] = (ht_sig1 & 0xFF); 629 bytes[9] = (ht_sig1 >> 8) & 0xFF; 630 bytes[10] = (ht_sig1 >> 16) & 0xFF; 631 bytes[11] = (ht_sig2 & 0xFF); 632 bytes[12] = (ht_sig2 >> 8) & 0xFF; 633 bytes[13] = (ht_sig2 >> 16) & 0xFF; 634 635 return(HT_SIG_RATE); 636 } 637 else 638 { 639 //signal_word = b0+(b1<<8)+(b2<<16) ; 640 //return signal_word; 641 return(SIG_RATE); 642 } 643 } 644 645 static inline struct gpio_led_data * //please align with the implementation in leds-gpio.c 646 cdev_to_gpio_led_data(struct led_classdev *led_cdev) 647 { 648 return container_of(led_cdev, struct gpio_led_data, cdev); 649 } 650 651 static void openwifi_tx(struct ieee80211_hw *dev, 652 struct ieee80211_tx_control *control, 653 struct sk_buff *skb) 654 { 655 struct openwifi_priv *priv = dev->priv; 656 unsigned long flags; 657 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 658 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 659 struct openwifi_ring *ring; 660 dma_addr_t dma_mapping_addr; 661 unsigned int prio, i; 662 u32 num_dma_symbol, len_mac_pdu, num_dma_byte, len_phy_packet, num_byte_pad; 663 u32 rate_signal_value,rate_hw_value,ack_flag; 664 u32 pkt_need_ack, addr1_low32=0, addr2_low32=0, addr3_low32=0, queue_idx=2, dma_reg, cts_reg;//, openofdm_state_history; 665 u16 addr1_high16=0, addr2_high16=0, addr3_high16=0, sc=0, cts_duration=0, cts_rate_hw_value = 0, cts_rate_signal_value=0, sifs, ack_duration=0, traffic_pkt_duration; 666 u8 fc_flag,fc_type,fc_subtype,retry_limit_raw,*dma_buf,retry_limit_hw_value,rc_flags; 667 bool use_rts_cts, use_cts_protect, use_ht_rate=false, use_short_gi, addr_flag, cts_use_traffic_rate=false, force_use_cts_protect=false; 668 __le16 frame_control,duration_id; 669 u32 dma_fifo_no_room_flag, hw_queue_len; 670 enum dma_status status; 671 // static bool led_status=0; 672 // struct gpio_led_data *led_dat = cdev_to_gpio_led_data(priv->led[3]); 673 674 // if ( (priv->phy_tx_sn&7) ==0 ) { 675 // openofdm_state_history = openofdm_rx_api->OPENOFDM_RX_REG_STATE_HISTORY_read(); 676 // if (openofdm_state_history!=openofdm_state_history_old){ 677 // led_status = (~led_status); 678 // openofdm_state_history_old = openofdm_state_history; 679 // gpiod_set_value(led_dat->gpiod, led_status); 680 // } 681 // } 682 683 if (test_mode==1){ 684 printk("%s openwifi_tx: WARNING test_mode==1\n", sdr_compatible_str); 685 goto openwifi_tx_early_out; 686 } 687 688 if (skb->data_len>0) {// more data are not in linear data area skb->data 689 printk("%s openwifi_tx: WARNING skb->data_len>0\n", sdr_compatible_str); 690 goto openwifi_tx_early_out; 691 } 692 693 len_mac_pdu = skb->len; 694 len_phy_packet = len_mac_pdu + LEN_PHY_HEADER; 695 num_dma_symbol = (len_phy_packet>>TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS) + ((len_phy_packet&(TX_INTF_NUM_BYTE_PER_DMA_SYMBOL-1))!=0); 696 697 // get Linux priority/queue setting info and target mac address 698 prio = skb_get_queue_mapping(skb); 699 addr1_low32 = *((u32*)(hdr->addr1+2)); 700 ring = &(priv->tx_ring[prio]); 701 702 // -------------- DO your idea here! Map Linux/SW "prio" to hardware "queue_idx" ----------- 703 if (priv->slice_idx == 0xFFFFFFFF) {// use Linux default prio setting, if there isn't any slice config 704 queue_idx = prio; 705 } else {// customized prio to queue_idx mapping 706 //if (fc_type==2 && fc_subtype==0 && (!addr_flag)) { // for unicast data packet only 707 // check current packet belonging to which slice/hw-queue 708 for (i=0; i<MAX_NUM_HW_QUEUE; i++) { 709 if ( priv->dest_mac_addr_queue_map[i] == addr1_low32 ) { 710 break; 711 } 712 } 713 //} 714 queue_idx = (i>=MAX_NUM_HW_QUEUE?2:i); // if no address is hit, use FPGA queue 2. because the queue 2 is the longest. 715 } 716 // -------------------- end of Map Linux/SW "prio" to hardware "queue_idx" ------------------ 717 718 // check whether the packet is bigger than DMA buffer size 719 num_dma_byte = (num_dma_symbol<<TX_INTF_NUM_BYTE_PER_DMA_SYMBOL_IN_BITS); 720 if (num_dma_byte > TX_BD_BUF_SIZE) { 721 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING num_dma_byte > TX_BD_BUF_SIZE\n"); 722 printk("%s openwifi_tx: WARNING sn %d num_dma_byte > TX_BD_BUF_SIZE\n", sdr_compatible_str, ring->bd_wr_idx); 723 goto openwifi_tx_early_out; 724 } 725 num_byte_pad = num_dma_byte-len_phy_packet; 726 727 // get other info from packet header 728 addr1_high16 = *((u16*)(hdr->addr1)); 729 if (len_mac_pdu>=20) { 730 addr2_low32 = *((u32*)(hdr->addr2+2)); 731 addr2_high16 = *((u16*)(hdr->addr2)); 732 } 733 if (len_mac_pdu>=26) { 734 addr3_low32 = *((u32*)(hdr->addr3+2)); 735 addr3_high16 = *((u16*)(hdr->addr3)); 736 } 737 738 duration_id = hdr->duration_id; 739 frame_control=hdr->frame_control; 740 ack_flag = (info->flags&IEEE80211_TX_CTL_NO_ACK); 741 fc_type = ((frame_control)>>2)&3; 742 fc_subtype = ((frame_control)>>4)&0xf; 743 fc_flag = ( fc_type==2 || fc_type==0 || (fc_type==1 && (fc_subtype==8 || fc_subtype==9 || fc_subtype==10) ) ); 744 //if it is broadcasting or multicasting addr 745 addr_flag = ( (addr1_low32==0 && addr1_high16==0) || 746 (addr1_low32==0xFFFFFFFF && addr1_high16==0xFFFF) || 747 (addr1_high16==0x3333) || 748 (addr1_high16==0x0001 && hdr->addr1[2]==0x5E) ); 749 if ( fc_flag && ( !addr_flag ) && (!ack_flag) ) { // unicast data frame 750 pkt_need_ack = 1; //FPGA need to wait ACK after this pkt sent 751 } else { 752 pkt_need_ack = 0; 753 } 754 755 // get Linux rate (MCS) setting 756 rate_hw_value = ieee80211_get_tx_rate(dev, info)->hw_value; 757 //rate_hw_value = 10; //4:6M, 5:9M, 6:12M, 7:18M, 8:24M, 9:36M, 10:48M, 11:54M 758 if (priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]>0 && fc_type==2 && (!addr_flag)) //rate override command 759 rate_hw_value = priv->drv_tx_reg_val[DRV_TX_REG_IDX_RATE]; 760 761 retry_limit_raw = info->control.rates[0].count; 762 763 rc_flags = info->control.rates[0].flags; 764 use_rts_cts = ((rc_flags&IEEE80211_TX_RC_USE_RTS_CTS)!=0); 765 use_cts_protect = ((rc_flags&IEEE80211_TX_RC_USE_CTS_PROTECT)!=0); 766 use_ht_rate = ((rc_flags&IEEE80211_TX_RC_MCS)!=0); 767 use_short_gi = ((rc_flags&IEEE80211_TX_RC_SHORT_GI)!=0); 768 769 if (use_rts_cts) 770 printk("%s openwifi_tx: WARNING sn %d use_rts_cts is not supported!\n", sdr_compatible_str, ring->bd_wr_idx); 771 772 if (use_cts_protect) { 773 cts_rate_hw_value = ieee80211_get_rts_cts_rate(dev, info)->hw_value; 774 cts_duration = le16_to_cpu(ieee80211_ctstoself_duration(dev,info->control.vif,len_mac_pdu,info)); 775 } else if (force_use_cts_protect) { // could override mac80211 setting here. 776 cts_rate_hw_value = 4; //wifi_mcs_table_11b_force_up[] translate it to 1011(6M) 777 sifs = (priv->actual_rx_lo<2500?10:16); 778 if (pkt_need_ack) 779 ack_duration = 44;//assume the ack we wait use 6Mbps: 4*ceil((22+14*8)/24) + 20(preamble+SIGNAL) 780 traffic_pkt_duration = 20 + 4*(((22+len_mac_pdu*8)/wifi_n_dbps_table[rate_hw_value])+1); 781 cts_duration = traffic_pkt_duration + sifs + pkt_need_ack*(sifs+ack_duration); 782 } 783 784 // this is 11b stuff 785 // if (info->flags&IEEE80211_TX_RC_USE_SHORT_PREAMBLE) 786 // printk("%s openwifi_tx: WARNING IEEE80211_TX_RC_USE_SHORT_PREAMBLE\n", sdr_compatible_str); 787 788 if (len_mac_pdu>=28) { 789 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 790 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 791 priv->seqno += 0x10; 792 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 793 hdr->seq_ctrl |= cpu_to_le16(priv->seqno); 794 } 795 sc = hdr->seq_ctrl; 796 } 797 798 if ( (!addr_flag) && (priv->drv_tx_reg_val[DRV_TX_REG_IDX_PRINT_CFG]&2) ) 799 printk("%s openwifi_tx: %4dbytes ht%d %3dM FC%04x DI%04x addr1/2/3:%04x%08x/%04x%08x/%04x%08x SC%04x flag%08x retr%d ack%d prio%d q%d wr%d rd%d\n", sdr_compatible_str, 800 len_mac_pdu, (use_ht_rate == false ? 0 : 1), (use_ht_rate == false ? wifi_rate_all[rate_hw_value] : wifi_rate_all[rate_hw_value + 12]),frame_control,duration_id, 801 reverse16(addr1_high16), reverse32(addr1_low32), reverse16(addr2_high16), reverse32(addr2_low32), reverse16(addr3_high16), reverse32(addr3_low32), 802 sc, info->flags, retry_limit_raw, pkt_need_ack, prio, queue_idx, 803 // use_rts_cts,use_cts_protect|force_use_cts_protect,wifi_rate_all[cts_rate_hw_value],cts_duration, 804 ring->bd_wr_idx,ring->bd_rd_idx); 805 806 // printk("%s openwifi_tx: rate&try: %d %d %03x; %d %d %03x; %d %d %03x; %d %d %03x\n", sdr_compatible_str, 807 // info->status.rates[0].idx,info->status.rates[0].count,info->status.rates[0].flags, 808 // info->status.rates[1].idx,info->status.rates[1].count,info->status.rates[1].flags, 809 // info->status.rates[2].idx,info->status.rates[2].count,info->status.rates[2].flags, 810 // info->status.rates[3].idx,info->status.rates[3].count,info->status.rates[3].flags); 811 812 // -----------end of preprocess some info from header and skb---------------- 813 814 // /* HW will perform RTS-CTS when only RTS flags is set. 815 // * HW will perform CTS-to-self when both RTS and CTS flags are set. 816 // * RTS rate and RTS duration will be used also for CTS-to-self. 817 // */ 818 // if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) { 819 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 820 // rts_duration = ieee80211_rts_duration(dev, priv->vif[0], // assume all vif have the same config 821 // len_mac_pdu, info); 822 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_RTS_CTS\n", sdr_compatible_str); 823 // } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) { 824 // tx_flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19; 825 // rts_duration = ieee80211_ctstoself_duration(dev, priv->vif[0], // assume all vif have the same config 826 // len_mac_pdu, info); 827 // printk("%s openwifi_tx: rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT\n", sdr_compatible_str); 828 // } 829 830 // when skb does not have enough headroom, skb_push will cause kernel panic. headroom needs to be extended if necessary 831 if (skb_headroom(skb)<LEN_PHY_HEADER) { 832 struct sk_buff *skb_new; // in case original skb headroom is not enough to host phy header needed by FPGA IP core 833 printk("%s openwifi_tx: WARNING sn %d skb_headroom(skb)<LEN_PHY_HEADER\n", sdr_compatible_str, ring->bd_wr_idx); 834 if ((skb_new = skb_realloc_headroom(skb, LEN_PHY_HEADER)) == NULL) { 835 printk("%s openwifi_tx: WARNING sn %d skb_realloc_headroom failed!\n", sdr_compatible_str, ring->bd_wr_idx); 836 goto openwifi_tx_early_out; 837 } 838 if (skb->sk != NULL) 839 skb_set_owner_w(skb_new, skb->sk); 840 dev_kfree_skb(skb); 841 skb = skb_new; 842 } 843 844 skb_push( skb, LEN_PHY_HEADER ); 845 rate_signal_value = calc_phy_header(rate_hw_value, use_ht_rate, use_short_gi, len_mac_pdu+LEN_PHY_CRC, skb->data); //fill the phy header 846 847 //make sure dma length is integer times of DDC_NUM_BYTE_PER_DMA_SYMBOL 848 if (skb_tailroom(skb)<num_byte_pad) { 849 printk("%s openwifi_tx: WARNING sn %d skb_tailroom(skb)<num_byte_pad!\n", sdr_compatible_str, ring->bd_wr_idx); 850 // skb_pull(skb, LEN_PHY_HEADER); 851 goto openwifi_tx_early_out; 852 } 853 skb_put( skb, num_byte_pad ); 854 855 retry_limit_hw_value = (retry_limit_raw - 1)&0xF; 856 dma_buf = skb->data; 857 858 cts_rate_signal_value = wifi_mcs_table_11b_force_up[cts_rate_hw_value]; 859 cts_reg = (((use_cts_protect|force_use_cts_protect)<<31)|(cts_use_traffic_rate<<30)|(cts_duration<<8)|(cts_rate_signal_value<<4)|rate_signal_value); 860 dma_reg = ( (( ((prio<<(NUM_BIT_MAX_NUM_HW_QUEUE+NUM_BIT_MAX_PHY_TX_SN))|(ring->bd_wr_idx<<NUM_BIT_MAX_NUM_HW_QUEUE)|queue_idx) )<<18)|(retry_limit_hw_value<<14)|(pkt_need_ack<<13)|num_dma_symbol ); 861 862 /* We must be sure that tx_flags is written last because the HW 863 * looks at it to check if the rest of data is valid or not 864 */ 865 //wmb(); 866 // entry->flags = cpu_to_le32(tx_flags); 867 /* We must be sure this has been written before following HW 868 * register write, because this write will make the HW attempts 869 * to DMA the just-written data 870 */ 871 //wmb(); 872 873 spin_lock_irqsave(&priv->lock, flags); // from now on, we'd better avoid interrupt because ring->stop_flag is shared with interrupt 874 875 // -------------check whether FPGA dma fifo and queue (queue_idx) has enough room------------- 876 dma_fifo_no_room_flag = tx_intf_api->TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read(); 877 hw_queue_len = tx_intf_api->TX_INTF_REG_QUEUE_FIFO_DATA_COUNT_read(); 878 if ( ((dma_fifo_no_room_flag>>queue_idx)&1) || ((NUM_TX_BD-((hw_queue_len>>(queue_idx*8))&0xFF))<RING_ROOM_THRESHOLD) || ring->stop_flag==1 ) { 879 ieee80211_stop_queue(dev, prio); // here we should stop those prio related to the queue idx flag set in TX_INTF_REG_S_AXIS_FIFO_NO_ROOM_read 880 printk("%s openwifi_tx: WARNING ieee80211_stop_queue prio %d queue %d no room flag %x hw queue len %08x request %d wr %d rd %d\n", sdr_compatible_str, 881 prio, queue_idx, dma_fifo_no_room_flag, hw_queue_len, num_dma_symbol, ring->bd_wr_idx, ring->bd_rd_idx); 882 ring->stop_flag = 1; 883 goto openwifi_tx_early_out_after_lock; 884 } 885 // --------end of check whether FPGA fifo (queue_idx) has enough room------------ 886 887 status = dma_async_is_tx_complete(priv->tx_chan, priv->tx_cookie, NULL, NULL); 888 if (status!=DMA_COMPLETE) { 889 printk("%s openwifi_tx: WARNING status!=DMA_COMPLETE\n", sdr_compatible_str); 890 goto openwifi_tx_early_out_after_lock; 891 } 892 893 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) { 894 printk("%s openwifi_tx: WARNING 1 %d %08x %08x %08x %08x\n", sdr_compatible_str, num_byte_pad, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 895 goto openwifi_tx_early_out_after_lock; 896 } 897 898 //-------------------------fire skb DMA to hardware---------------------------------- 899 dma_mapping_addr = dma_map_single(priv->tx_chan->device->dev, dma_buf, 900 num_dma_byte, DMA_MEM_TO_DEV); 901 902 if (dma_mapping_error(priv->tx_chan->device->dev,dma_mapping_addr)) { 903 // dev_err(priv->tx_chan->device->dev, "sdr,sdr openwifi_tx: WARNING TX DMA mapping error\n"); 904 printk("%s openwifi_tx: WARNING sn %d TX DMA mapping error\n", sdr_compatible_str, ring->bd_wr_idx); 905 goto openwifi_tx_early_out_after_lock; 906 } 907 908 sg_init_table(&(priv->tx_sg), 1); // only need to be initialized once in openwifi_start 909 sg_dma_address( &(priv->tx_sg) ) = dma_mapping_addr; 910 sg_dma_len( &(priv->tx_sg) ) = num_dma_byte; 911 912 tx_intf_api->TX_INTF_REG_CTS_TOSELF_CONFIG_write(cts_reg); 913 tx_intf_api->TX_INTF_REG_NUM_DMA_SYMBOL_TO_PL_write(dma_reg); 914 priv->txd = priv->tx_chan->device->device_prep_slave_sg(priv->tx_chan, &(priv->tx_sg),1,DMA_MEM_TO_DEV, DMA_CTRL_ACK | DMA_PREP_INTERRUPT, NULL); 915 if (!(priv->txd)) { 916 printk("%s openwifi_tx: WARNING sn %d device_prep_slave_sg %p\n", sdr_compatible_str, ring->bd_wr_idx, (void*)(priv->txd)); 917 goto openwifi_tx_after_dma_mapping; 918 } 919 920 priv->tx_cookie = priv->txd->tx_submit(priv->txd); 921 922 if (dma_submit_error(priv->tx_cookie)) { 923 printk("%s openwifi_tx: WARNING sn %d dma_submit_error(tx_cookie) %d\n", sdr_compatible_str, ring->bd_wr_idx, (u32)(priv->tx_cookie)); 924 goto openwifi_tx_after_dma_mapping; 925 } 926 927 // seems everything is ok. let's mark this pkt in bd descriptor ring 928 ring->bds[ring->bd_wr_idx].skb_linked = skb; 929 ring->bds[ring->bd_wr_idx].dma_mapping_addr = dma_mapping_addr; 930 931 ring->bd_wr_idx = ((ring->bd_wr_idx+1)&(NUM_TX_BD-1)); 932 933 dma_async_issue_pending(priv->tx_chan); 934 935 if ( (*(u32*)(&(skb->data[4]))) || ((*(u32*)(&(skb->data[12])))&0xFFFF0000) ) 936 printk("%s openwifi_tx: WARNING 2 %08x %08x %08x %08x\n", sdr_compatible_str, *(u32*)(&(skb->data[12])), *(u32*)(&(skb->data[8])), *(u32*)(&(skb->data[4])), *(u32*)(&(skb->data[0]))); 937 938 spin_unlock_irqrestore(&priv->lock, flags); 939 940 return; 941 942 openwifi_tx_after_dma_mapping: 943 dma_unmap_single(priv->tx_chan->device->dev, dma_mapping_addr, num_dma_byte, DMA_MEM_TO_DEV); 944 945 openwifi_tx_early_out_after_lock: 946 // skb_pull(skb, LEN_PHY_HEADER); 947 dev_kfree_skb(skb); 948 spin_unlock_irqrestore(&priv->lock, flags); 949 // printk("%s openwifi_tx: WARNING openwifi_tx_after_dma_mapping phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 950 return; 951 952 openwifi_tx_early_out: 953 dev_kfree_skb(skb); 954 // printk("%s openwifi_tx: WARNING openwifi_tx_early_out phy_tx_sn %d queue %d\n", sdr_compatible_str,priv->phy_tx_sn,queue_idx); 955 } 956 957 static int openwifi_start(struct ieee80211_hw *dev) 958 { 959 struct openwifi_priv *priv = dev->priv; 960 int ret, i, rssi_half_db_offset, agc_gain_delay;//rssi_half_db_th, 961 u32 reg; 962 963 for (i=0; i<MAX_NUM_VIF; i++) { 964 priv->vif[i] = NULL; 965 } 966 967 memset(priv->drv_tx_reg_val, 0, sizeof(priv->drv_tx_reg_val)); 968 memset(priv->drv_rx_reg_val, 0, sizeof(priv->drv_rx_reg_val)); 969 memset(priv->drv_xpu_reg_val, 0, sizeof(priv->drv_xpu_reg_val)); 970 priv->drv_xpu_reg_val[DRV_XPU_REG_IDX_GIT_REV] = GIT_REV; 971 972 //turn on radio 973 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 974 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 975 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 976 } else { 977 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 978 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 979 } 980 if (reg == AD9361_RADIO_ON_TX_ATT) { 981 priv->rfkill_off = 1;// 0 off, 1 on 982 printk("%s openwifi_start: rfkill radio on\n",sdr_compatible_str); 983 } 984 else 985 printk("%s openwifi_start: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 986 987 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 988 priv->ctrl_out.index=0x16; 989 else 990 priv->ctrl_out.index=0x17; 991 992 ret = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 993 if (ret < 0) { 994 printk("%s openwifi_start: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, ret); 995 } else { 996 printk("%s openwifi_start: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 997 } 998 999 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1000 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1001 1002 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 1003 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 1004 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 1005 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 1006 xpu_api->hw_init(priv->xpu_cfg); 1007 1008 agc_gain_delay = 50; //samples 1009 rssi_half_db_offset = 150; // to be consistent 1010 xpu_api->XPU_REG_RSSI_DB_CFG_write(0x80000000|((rssi_half_db_offset<<16)|agc_gain_delay) ); 1011 xpu_api->XPU_REG_RSSI_DB_CFG_write((~0x80000000)&((rssi_half_db_offset<<16)|agc_gain_delay) ); 1012 1013 openofdm_rx_api->OPENOFDM_RX_REG_POWER_THRES_write(0); 1014 // rssi_half_db_th = 87<<1; // -62dBm // will setup in runtime in _rf_set_channel 1015 // xpu_api->XPU_REG_LBT_TH_write(rssi_half_db_th); // set IQ rssi th step .5dB to xxx and enable it 1016 reg=xpu_api->XPU_REG_LBT_TH_read(); 1017 xpu_api->XPU_REG_LBT_TH_write((reg & 0xFF00FFFF) | (75 << 16) ); // bit 23:16 of LBT TH reg is set to control the duration to force ch_idle after decoding a packet due to imperfection of agc and signals 1018 // xpu_api->XPU_REG_CSMA_CFG_write(3); // cw_min -- already set in xpu.c 1019 1020 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((40)<<16)|0 );//high 16bit 5GHz; low 16 bit 2.4GHz (Attention, current tx core has around 1.19us starting delay that makes the ack fall behind 10us SIFS in 2.4GHz! Need to improve TX in 2.4GHz!) 1021 //xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51)<<16)|0 );//now our tx send out I/Q immediately 1022 xpu_api->XPU_REG_SEND_ACK_WAIT_TOP_write( ((51+23)<<16)|(0+23) );//we have more time when we use FIR in AD9361 1023 1024 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP0_write( (1<<31) | (((45+2+2)*10 + 15)<<16) | 10 );//2.4GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1025 xpu_api->XPU_REG_RECV_ACK_COUNT_TOP1_write( (1<<31) | (((51+2+2)*10 + 15)<<16) | 10 );//5GHz. extra 300 clocks are needed when rx core fall into fake ht detection phase (rx mcs 6M) 1026 1027 tx_intf_api->TX_INTF_REG_CTS_TOSELF_WAIT_SIFS_TOP_write( ((16*10)<<16)|(10*10) );//high 16bit 5GHz; low 16 bit 2.4GHz. counter speed 10MHz is assumed 1028 1029 // //xpu_api->XPU_REG_BB_RF_DELAY_write(51); // fine tuned value at 0.005us. old: dac-->ant port: 0.6us, 57 taps fir at 40MHz: 1.425us; round trip: 2*(0.6+1.425)=4.05us; 4.05*10=41 1030 // xpu_api->XPU_REG_BB_RF_DELAY_write(47);//add .5us for slightly longer fir -- already in xpu.c 1031 xpu_api->XPU_REG_MAC_ADDR_write(priv->mac_addr); 1032 1033 // setup time schedule of 4 slices 1034 // slice 0 1035 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write(50000-1); // total 50ms 1036 xpu_api->XPU_REG_SLICE_COUNT_START_write(0); //start 0ms 1037 xpu_api->XPU_REG_SLICE_COUNT_END_write(50000-1); //end 50ms 1038 1039 // slice 1 1040 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((1<<20)|(50000-1)); // total 50ms 1041 xpu_api->XPU_REG_SLICE_COUNT_START_write((1<<20)|(0)); //start 0ms 1042 //xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(20000-1)); //end 20ms 1043 xpu_api->XPU_REG_SLICE_COUNT_END_write((1<<20)|(50000-1)); //end 20ms 1044 1045 // slice 2 1046 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((2<<20)|(50000-1)); // total 50ms 1047 //xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(20000)); //start 20ms 1048 xpu_api->XPU_REG_SLICE_COUNT_START_write((2<<20)|(0)); //start 20ms 1049 //xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(40000-1)); //end 20ms 1050 xpu_api->XPU_REG_SLICE_COUNT_END_write((2<<20)|(50000-1)); //end 20ms 1051 1052 // slice 3 1053 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((3<<20)|(50000-1)); // total 50ms 1054 //xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(40000)); //start 40ms 1055 xpu_api->XPU_REG_SLICE_COUNT_START_write((3<<20)|(0)); //start 40ms 1056 //xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1057 xpu_api->XPU_REG_SLICE_COUNT_END_write((3<<20)|(50000-1)); //end 20ms 1058 1059 // all slice sync rest 1060 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1061 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1062 1063 //xpu_api->XPU_REG_MAC_ADDR_HIGH_write( (*( (u16*)(priv->mac_addr + 4) )) ); 1064 printk("%s openwifi_start: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 1065 printk("%s openwifi_start: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 1066 1067 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1068 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable rx interrupt by interrupt test mode 1069 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1070 1071 if (test_mode==1) { 1072 printk("%s openwifi_start: test_mode==1\n",sdr_compatible_str); 1073 goto normal_out; 1074 } 1075 1076 priv->rx_chan = dma_request_slave_channel(&(priv->pdev->dev), "rx_dma_s2mm"); 1077 if (IS_ERR(priv->rx_chan)) { 1078 ret = PTR_ERR(priv->rx_chan); 1079 pr_err("%s openwifi_start: No Rx channel %d\n",sdr_compatible_str,ret); 1080 goto err_dma; 1081 } 1082 1083 priv->tx_chan = dma_request_slave_channel(&(priv->pdev->dev), "tx_dma_mm2s"); 1084 if (IS_ERR(priv->tx_chan)) { 1085 ret = PTR_ERR(priv->tx_chan); 1086 pr_err("%s openwifi_start: No Tx channel %d\n",sdr_compatible_str,ret); 1087 goto err_dma; 1088 } 1089 printk("%s openwifi_start: DMA channel setup successfully.\n",sdr_compatible_str); 1090 1091 ret = openwifi_init_rx_ring(priv); 1092 if (ret) { 1093 printk("%s openwifi_start: openwifi_init_rx_ring ret %d\n", sdr_compatible_str,ret); 1094 goto err_free_rings; 1095 } 1096 1097 priv->seqno=0; 1098 for (i=0; i<MAX_NUM_SW_QUEUE; i++) { 1099 if ((ret = openwifi_init_tx_ring(priv, i))) { 1100 printk("%s openwifi_start: openwifi_init_tx_ring %d ret %d\n", sdr_compatible_str, i, ret); 1101 goto err_free_rings; 1102 } 1103 } 1104 1105 if ( (ret = rx_dma_setup(dev)) ) { 1106 printk("%s openwifi_start: rx_dma_setup ret %d\n", sdr_compatible_str,ret); 1107 goto err_free_rings; 1108 } 1109 1110 priv->irq_rx = irq_of_parse_and_map(priv->pdev->dev.of_node, 1); 1111 ret = request_irq(priv->irq_rx, openwifi_rx_interrupt, 1112 IRQF_SHARED, "sdr,rx_pkt_intr", dev); 1113 if (ret) { 1114 wiphy_err(dev->wiphy, "openwifi_start:failed to register IRQ handler openwifi_rx_interrupt\n"); 1115 goto err_free_rings; 1116 } else { 1117 printk("%s openwifi_start: irq_rx %d\n", sdr_compatible_str, priv->irq_rx); 1118 } 1119 1120 priv->irq_tx = irq_of_parse_and_map(priv->pdev->dev.of_node, 3); 1121 ret = request_irq(priv->irq_tx, openwifi_tx_interrupt, 1122 IRQF_SHARED, "sdr,tx_itrpt1", dev); 1123 if (ret) { 1124 wiphy_err(dev->wiphy, "openwifi_start: failed to register IRQ handler openwifi_tx_interrupt\n"); 1125 goto err_free_rings; 1126 } else { 1127 printk("%s openwifi_start: irq_tx %d\n", sdr_compatible_str, priv->irq_tx); 1128 } 1129 1130 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x000); // enable rx interrupt get normal fcs valid pass through ddc to ARM 1131 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x4); //enable tx interrupt 1132 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(0); // release M AXIS 1133 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); // reset tsf timer 1134 1135 //ieee80211_wake_queue(dev, 0); 1136 1137 normal_out: 1138 printk("%s openwifi_start: normal end\n", sdr_compatible_str); 1139 return 0; 1140 1141 err_free_rings: 1142 openwifi_free_rx_ring(priv); 1143 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1144 openwifi_free_tx_ring(priv, i); 1145 1146 err_dma: 1147 ret = -1; 1148 printk("%s openwifi_start: abnormal end ret %d\n", sdr_compatible_str, ret); 1149 return ret; 1150 } 1151 1152 static void openwifi_stop(struct ieee80211_hw *dev) 1153 { 1154 struct openwifi_priv *priv = dev->priv; 1155 u32 reg, reg1; 1156 int i; 1157 1158 if (test_mode==1){ 1159 pr_info("%s openwifi_stop: test_mode==1\n", sdr_compatible_str); 1160 goto normal_out; 1161 } 1162 1163 //turn off radio 1164 #if 1 1165 ad9361_tx_mute(priv->ad9361_phy, 1); 1166 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 1167 reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 1168 if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 1169 priv->rfkill_off = 0;// 0 off, 1 on 1170 printk("%s openwifi_stop: rfkill radio off\n",sdr_compatible_str); 1171 } 1172 else 1173 printk("%s openwifi_stop: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 1174 #endif 1175 1176 //ieee80211_stop_queue(dev, 0); 1177 1178 tx_intf_api->TX_INTF_REG_INTERRUPT_SEL_write(0x30004); //disable tx interrupt 1179 rx_intf_api->RX_INTF_REG_INTERRUPT_TEST_write(0x100); // disable fcs_valid by interrupt test mode 1180 rx_intf_api->RX_INTF_REG_M_AXIS_RST_write(1); // hold M AXIS in reset status 1181 1182 for (i=0; i<MAX_NUM_VIF; i++) { 1183 priv->vif[i] = NULL; 1184 } 1185 1186 openwifi_free_rx_ring(priv); 1187 for (i=0; i<MAX_NUM_SW_QUEUE; i++) 1188 openwifi_free_tx_ring(priv, i); 1189 1190 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->rx_chan)); 1191 dmaengine_terminate_all(priv->rx_chan); 1192 dma_release_channel(priv->rx_chan); 1193 pr_info("%s openwifi_stop: dropped channel %s\n", sdr_compatible_str, dma_chan_name(priv->tx_chan)); 1194 dmaengine_terminate_all(priv->tx_chan); 1195 dma_release_channel(priv->tx_chan); 1196 1197 //priv->rf->stop(dev); 1198 1199 free_irq(priv->irq_rx, dev); 1200 free_irq(priv->irq_tx, dev); 1201 1202 normal_out: 1203 printk("%s openwifi_stop\n", sdr_compatible_str); 1204 } 1205 1206 static u64 openwifi_get_tsf(struct ieee80211_hw *dev, 1207 struct ieee80211_vif *vif) 1208 { 1209 u32 tsft_low, tsft_high; 1210 1211 tsft_low = xpu_api->XPU_REG_TSF_RUNTIME_VAL_LOW_read(); 1212 tsft_high = xpu_api->XPU_REG_TSF_RUNTIME_VAL_HIGH_read(); 1213 //printk("%s openwifi_get_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1214 return( ( (u64)tsft_low ) | ( ((u64)tsft_high)<<32 ) ); 1215 } 1216 1217 static void openwifi_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u64 tsf) 1218 { 1219 u32 tsft_high = ((tsf >> 32)&0xffffffff); 1220 u32 tsft_low = (tsf&0xffffffff); 1221 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1222 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1223 } 1224 1225 static void openwifi_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif) 1226 { 1227 xpu_api->XPU_REG_TSF_LOAD_VAL_write(0,0); 1228 printk("%s openwifi_reset_tsf\n", sdr_compatible_str); 1229 } 1230 1231 static int openwifi_set_rts_threshold(struct ieee80211_hw *hw, u32 value) 1232 { 1233 printk("%s openwifi_set_rts_threshold WARNING value %d\n", sdr_compatible_str,value); 1234 return(0); 1235 } 1236 1237 static void openwifi_beacon_work(struct work_struct *work) 1238 { 1239 struct openwifi_vif *vif_priv = 1240 container_of(work, struct openwifi_vif, beacon_work.work); 1241 struct ieee80211_vif *vif = 1242 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv); 1243 struct ieee80211_hw *dev = vif_priv->dev; 1244 struct ieee80211_mgmt *mgmt; 1245 struct sk_buff *skb; 1246 1247 /* don't overflow the tx ring */ 1248 if (ieee80211_queue_stopped(dev, 0)) 1249 goto resched; 1250 1251 /* grab a fresh beacon */ 1252 skb = ieee80211_beacon_get(dev, vif); 1253 if (!skb) 1254 goto resched; 1255 1256 /* 1257 * update beacon timestamp w/ TSF value 1258 * TODO: make hardware update beacon timestamp 1259 */ 1260 mgmt = (struct ieee80211_mgmt *)skb->data; 1261 mgmt->u.beacon.timestamp = cpu_to_le64(openwifi_get_tsf(dev, vif)); 1262 1263 /* TODO: use actual beacon queue */ 1264 skb_set_queue_mapping(skb, 0); 1265 openwifi_tx(dev, NULL, skb); 1266 1267 resched: 1268 /* 1269 * schedule next beacon 1270 * TODO: use hardware support for beacon timing 1271 */ 1272 schedule_delayed_work(&vif_priv->beacon_work, 1273 usecs_to_jiffies(1024 * vif->bss_conf.beacon_int)); 1274 } 1275 1276 static int openwifi_add_interface(struct ieee80211_hw *dev, 1277 struct ieee80211_vif *vif) 1278 { 1279 int i; 1280 struct openwifi_priv *priv = dev->priv; 1281 struct openwifi_vif *vif_priv; 1282 1283 switch (vif->type) { 1284 case NL80211_IFTYPE_AP: 1285 case NL80211_IFTYPE_STATION: 1286 case NL80211_IFTYPE_ADHOC: 1287 case NL80211_IFTYPE_MONITOR: 1288 case NL80211_IFTYPE_MESH_POINT: 1289 break; 1290 default: 1291 return -EOPNOTSUPP; 1292 } 1293 // let's support more than 1 interface 1294 for (i=0; i<MAX_NUM_VIF; i++) { 1295 if (priv->vif[i] == NULL) 1296 break; 1297 } 1298 1299 printk("%s openwifi_add_interface start. vif for loop result %d\n", sdr_compatible_str, i); 1300 1301 if (i==MAX_NUM_VIF) 1302 return -EBUSY; 1303 1304 priv->vif[i] = vif; 1305 1306 /* Initialize driver private area */ 1307 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1308 vif_priv->idx = i; 1309 1310 vif_priv->dev = dev; 1311 INIT_DELAYED_WORK(&vif_priv->beacon_work, openwifi_beacon_work); 1312 vif_priv->enable_beacon = false; 1313 1314 printk("%s openwifi_add_interface end with vif idx %d\n", sdr_compatible_str,vif_priv->idx); 1315 1316 return 0; 1317 } 1318 1319 static void openwifi_remove_interface(struct ieee80211_hw *dev, 1320 struct ieee80211_vif *vif) 1321 { 1322 struct openwifi_vif *vif_priv; 1323 struct openwifi_priv *priv = dev->priv; 1324 1325 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1326 priv->vif[vif_priv->idx] = NULL; 1327 printk("%s openwifi_remove_interface vif idx %d\n", sdr_compatible_str, vif_priv->idx); 1328 } 1329 1330 static int openwifi_config(struct ieee80211_hw *dev, u32 changed) 1331 { 1332 struct openwifi_priv *priv = dev->priv; 1333 struct ieee80211_conf *conf = &dev->conf; 1334 1335 if (changed & IEEE80211_CONF_CHANGE_CHANNEL) 1336 priv->rf->set_chan(dev, conf); 1337 else 1338 printk("%s openwifi_config changed flag %08x\n", sdr_compatible_str, changed); 1339 1340 return 0; 1341 } 1342 1343 static void openwifi_bss_info_changed(struct ieee80211_hw *dev, 1344 struct ieee80211_vif *vif, 1345 struct ieee80211_bss_conf *info, 1346 u32 changed) 1347 { 1348 struct openwifi_priv *priv = dev->priv; 1349 struct openwifi_vif *vif_priv; 1350 u32 bssid_low, bssid_high; 1351 1352 vif_priv = (struct openwifi_vif *)&vif->drv_priv; 1353 1354 //be careful: we don have valid chip, so registers addresses in priv->map->BSSID[0] are not valid! should not print it! 1355 //printk("%s openwifi_bss_info_changed map bssid %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,priv->map->BSSID[0],priv->map->BSSID[1],priv->map->BSSID[2],priv->map->BSSID[3],priv->map->BSSID[4],priv->map->BSSID[5]); 1356 if (changed & BSS_CHANGED_BSSID) { 1357 printk("%s openwifi_bss_info_changed BSS_CHANGED_BSSID %02x%02x%02x%02x%02x%02x\n",sdr_compatible_str,info->bssid[0],info->bssid[1],info->bssid[2],info->bssid[3],info->bssid[4],info->bssid[5]); 1358 // write new bssid to our HW, and do not change bssid filter 1359 //u32 bssid_filter_high = xpu_api->XPU_REG_BSSID_FILTER_HIGH_read(); 1360 bssid_low = ( *( (u32*)(info->bssid) ) ); 1361 bssid_high = ( *( (u16*)(info->bssid+4) ) ); 1362 1363 //bssid_filter_high = (bssid_filter_high&0x80000000); 1364 //bssid_high = (bssid_high|bssid_filter_high); 1365 xpu_api->XPU_REG_BSSID_FILTER_LOW_write(bssid_low); 1366 xpu_api->XPU_REG_BSSID_FILTER_HIGH_write(bssid_high); 1367 } 1368 1369 if (changed & BSS_CHANGED_BEACON_INT) { 1370 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_INT %x\n",sdr_compatible_str,info->beacon_int); 1371 } 1372 1373 if (changed & BSS_CHANGED_TXPOWER) 1374 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_TXPOWER %x\n",sdr_compatible_str,info->txpower); 1375 1376 if (changed & BSS_CHANGED_ERP_CTS_PROT) 1377 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_CTS_PROT %x\n",sdr_compatible_str,info->use_cts_prot); 1378 1379 if (changed & BSS_CHANGED_BASIC_RATES) 1380 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BASIC_RATES %x\n",sdr_compatible_str,info->basic_rates); 1381 1382 if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE)) { 1383 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_ERP_SLOT %d BSS_CHANGED_ERP_PREAMBLE %d short slot %d\n",sdr_compatible_str, 1384 changed&BSS_CHANGED_ERP_SLOT,changed&BSS_CHANGED_ERP_PREAMBLE,info->use_short_slot); 1385 if (info->use_short_slot && priv->use_short_slot==false) { 1386 priv->use_short_slot=true; 1387 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1388 } else if ((!info->use_short_slot) && priv->use_short_slot==true) { 1389 priv->use_short_slot=false; 1390 xpu_api->XPU_REG_BAND_CHANNEL_write( (priv->use_short_slot<<24)|(priv->band<<16) ); 1391 } 1392 } 1393 1394 if (changed & BSS_CHANGED_BEACON_ENABLED) { 1395 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED\n",sdr_compatible_str); 1396 vif_priv->enable_beacon = info->enable_beacon; 1397 } 1398 1399 if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) { 1400 cancel_delayed_work_sync(&vif_priv->beacon_work); 1401 if (vif_priv->enable_beacon) 1402 schedule_work(&vif_priv->beacon_work.work); 1403 printk("%s openwifi_bss_info_changed WARNING BSS_CHANGED_BEACON_ENABLED %d BSS_CHANGED_BEACON %d\n",sdr_compatible_str, 1404 changed&BSS_CHANGED_BEACON_ENABLED,changed&BSS_CHANGED_BEACON); 1405 } 1406 } 1407 // helper function 1408 u32 log2val(u32 val){ 1409 u32 ret_val = 0 ; 1410 while(val>1){ 1411 val = val >> 1 ; 1412 ret_val ++ ; 1413 } 1414 return ret_val ; 1415 } 1416 1417 static int openwifi_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue, 1418 const struct ieee80211_tx_queue_params *params) 1419 { 1420 u32 reg19_val, reg8_val, cw_min_exp, cw_max_exp; 1421 1422 printk("%s openwifi_conf_tx: WARNING [queue %d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d, aifs and txop ignored\n", 1423 sdr_compatible_str,queue,params->aifs,params->cw_min,params->cw_max,params->txop); 1424 1425 reg19_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1426 reg8_val=xpu_api->XPU_REG_LBT_TH_read(); 1427 cw_min_exp = (log2val(params->cw_min + 1) & 0x0F); 1428 cw_max_exp = (log2val(params->cw_max + 1) & 0x0F); 1429 switch(queue){ 1430 case 0: reg19_val = (reg19_val & 0xFFFFFF00) | cw_min_exp | (cw_max_exp << 4); break ; 1431 case 1: reg19_val = (reg19_val & 0xFFFF00FF) | ((cw_min_exp | (cw_max_exp << 4)) << 8); break ; 1432 case 2: reg19_val = (reg19_val & 0xFF00FFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 16); break ; 1433 case 3: reg8_val = (reg8_val & 0x00FFFFFF) | ((cw_min_exp | (cw_max_exp << 4)) << 24); break ; 1434 default: printk("%s openwifi_conf_tx: WARNING queue %d does not exist",sdr_compatible_str, queue); return(0); 1435 } 1436 reg19_val = reg19_val | 0x10000000 ; // enable dynamic contention window. 1437 xpu_api->XPU_REG_LBT_TH_write(reg8_val); 1438 xpu_api->XPU_REG_CSMA_CFG_write(reg19_val); 1439 //printk("reg19 val target val %08x, reg8 target val %08x", reg19_val, reg8_val); 1440 //reg19_val=xpu_api->XPU_REG_CSMA_CFG_read(); 1441 //reg8_val=xpu_api->XPU_REG_LBT_TH_read(); 1442 //printk("reg19 val read back %08x, reg8 read back %08x", reg19_val, reg8_val); 1443 return(0); 1444 } 1445 1446 static u64 openwifi_prepare_multicast(struct ieee80211_hw *dev, 1447 struct netdev_hw_addr_list *mc_list) 1448 { 1449 printk("%s openwifi_prepare_multicast\n", sdr_compatible_str); 1450 return netdev_hw_addr_list_count(mc_list); 1451 } 1452 1453 static void openwifi_configure_filter(struct ieee80211_hw *dev, 1454 unsigned int changed_flags, 1455 unsigned int *total_flags, 1456 u64 multicast) 1457 { 1458 u32 filter_flag; 1459 1460 (*total_flags) &= SDR_SUPPORTED_FILTERS; 1461 (*total_flags) |= FIF_ALLMULTI; //because we need to pass all multicast (no matter it is for us or not) to upper layer 1462 1463 filter_flag = (*total_flags); 1464 1465 filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO); 1466 //filter_flag = (filter_flag|UNICAST_FOR_US|BROADCAST_ALL_ONE|BROADCAST_ALL_ZERO|MONITOR_ALL); // all pkt will be delivered to arm 1467 1468 //if (priv->vif[0]->type == NL80211_IFTYPE_MONITOR) 1469 if ((filter_flag&0xf0) == 0xf0) //FIF_BCN_PRBRESP_PROMISC/FIF_CONTROL/FIF_OTHER_BSS/FIF_PSPOLL are set means monitor mode 1470 filter_flag = (filter_flag|MONITOR_ALL); 1471 else 1472 filter_flag = (filter_flag&(~MONITOR_ALL)); 1473 1474 if ( !(filter_flag&FIF_BCN_PRBRESP_PROMISC) ) 1475 filter_flag = (filter_flag|MY_BEACON); 1476 1477 filter_flag = (filter_flag|FIF_PSPOLL); 1478 1479 xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag|HIGH_PRIORITY_DISCARD_FLAG); 1480 //xpu_api->XPU_REG_FILTER_FLAG_write(filter_flag); //do not discard any pkt 1481 1482 printk("%s openwifi_configure_filter MON %d M_BCN %d BST0 %d BST1 %d UST %d PB_RQ %d PS_PL %d O_BSS %d CTL %d BCN_PRP %d PCP_FL %d FCS_FL %d ALL_MUT %d\n", sdr_compatible_str, 1483 (filter_flag>>13)&1,(filter_flag>>12)&1,(filter_flag>>11)&1,(filter_flag>>10)&1,(filter_flag>>9)&1,(filter_flag>>8)&1,(filter_flag>>7)&1,(filter_flag>>6)&1,(filter_flag>>5)&1,(filter_flag>>4)&1,(filter_flag>>3)&1,(filter_flag>>2)&1,(filter_flag>>1)&1); 1484 } 1485 1486 static int openwifi_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, void *data, int len) 1487 { 1488 struct openwifi_priv *priv = hw->priv; 1489 struct nlattr *tb[OPENWIFI_ATTR_MAX + 1]; 1490 struct sk_buff *skb; 1491 int err; 1492 u32 tmp=-1, reg_cat, reg_addr, reg_val, reg_addr_idx, tsft_high, tsft_low; 1493 1494 err = nla_parse(tb, OPENWIFI_ATTR_MAX, data, len, openwifi_testmode_policy, NULL); 1495 if (err) 1496 return err; 1497 1498 if (!tb[OPENWIFI_ATTR_CMD]) 1499 return -EINVAL; 1500 1501 switch (nla_get_u32(tb[OPENWIFI_ATTR_CMD])) { 1502 case OPENWIFI_CMD_SET_GAP: 1503 if (!tb[OPENWIFI_ATTR_GAP]) 1504 return -EINVAL; 1505 tmp = nla_get_u32(tb[OPENWIFI_ATTR_GAP]); 1506 printk("%s openwifi radio inter frame gap set to %d usec\n", sdr_compatible_str, tmp); 1507 xpu_api->XPU_REG_CSMA_CFG_write(tmp); // unit us 1508 return 0; 1509 case OPENWIFI_CMD_GET_GAP: 1510 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1511 if (!skb) 1512 return -ENOMEM; 1513 tmp = xpu_api->XPU_REG_CSMA_CFG_read(); 1514 if (nla_put_u32(skb, OPENWIFI_ATTR_GAP, tmp)) 1515 goto nla_put_failure; 1516 return cfg80211_testmode_reply(skb); 1517 case OPENWIFI_CMD_SET_SLICE_IDX: 1518 if (!tb[OPENWIFI_ATTR_SLICE_IDX]) 1519 return -EINVAL; 1520 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_IDX]); 1521 printk("%s set openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1522 if (tmp == MAX_NUM_HW_QUEUE) { 1523 printk("%s set openwifi slice_idx reset all queue counter.\n", sdr_compatible_str); 1524 xpu_api->XPU_REG_MULTI_RST_write(1<<7); //bit7 reset the counter for all queues at the same time 1525 xpu_api->XPU_REG_MULTI_RST_write(0<<7); 1526 } else { 1527 priv->slice_idx = tmp; 1528 } 1529 return 0; 1530 case OPENWIFI_CMD_GET_SLICE_IDX: 1531 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1532 if (!skb) 1533 return -ENOMEM; 1534 tmp = priv->slice_idx; 1535 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_IDX, tmp)) 1536 goto nla_put_failure; 1537 printk("%s get openwifi slice_idx in hex: %08x\n", sdr_compatible_str, tmp); 1538 return cfg80211_testmode_reply(skb); 1539 case OPENWIFI_CMD_SET_ADDR: 1540 if (!tb[OPENWIFI_ATTR_ADDR]) 1541 return -EINVAL; 1542 tmp = nla_get_u32(tb[OPENWIFI_ATTR_ADDR]); 1543 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1544 printk("%s set openwifi slice_target_mac_addr(low32) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1545 } else { 1546 printk("%s set openwifi slice_target_mac_addr(low32) in hex: %08x to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1547 priv->dest_mac_addr_queue_map[priv->slice_idx] = reverse32(tmp); 1548 } 1549 return 0; 1550 case OPENWIFI_CMD_GET_ADDR: 1551 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1552 if (!skb) 1553 return -ENOMEM; 1554 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1555 tmp = -1; 1556 } else { 1557 tmp = reverse32(priv->dest_mac_addr_queue_map[priv->slice_idx]); 1558 } 1559 if (nla_put_u32(skb, OPENWIFI_ATTR_ADDR, tmp)) 1560 goto nla_put_failure; 1561 printk("%s get openwifi slice_target_mac_addr(low32) in hex: %08x of slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1562 return cfg80211_testmode_reply(skb); 1563 1564 case OPENWIFI_CMD_SET_SLICE_TOTAL: 1565 if (!tb[OPENWIFI_ATTR_SLICE_TOTAL]) 1566 return -EINVAL; 1567 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL]); 1568 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1569 printk("%s set SLICE_TOTAL(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1570 } else { 1571 printk("%s set SLICE_TOTAL(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1572 xpu_api->XPU_REG_SLICE_COUNT_TOTAL_write((priv->slice_idx<<20)|tmp); 1573 } 1574 return 0; 1575 case OPENWIFI_CMD_GET_SLICE_TOTAL: 1576 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1577 if (!skb) 1578 return -ENOMEM; 1579 tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL_read()); 1580 printk("%s get SLICE_TOTAL(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1581 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL, tmp)) 1582 goto nla_put_failure; 1583 return cfg80211_testmode_reply(skb); 1584 1585 case OPENWIFI_CMD_SET_SLICE_START: 1586 if (!tb[OPENWIFI_ATTR_SLICE_START]) 1587 return -EINVAL; 1588 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START]); 1589 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1590 printk("%s set SLICE_START(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1591 } else { 1592 printk("%s set SLICE_START(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1593 xpu_api->XPU_REG_SLICE_COUNT_START_write((priv->slice_idx<<20)|tmp); 1594 } 1595 return 0; 1596 case OPENWIFI_CMD_GET_SLICE_START: 1597 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1598 if (!skb) 1599 return -ENOMEM; 1600 tmp = (xpu_api->XPU_REG_SLICE_COUNT_START_read()); 1601 printk("%s get SLICE_START(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1602 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START, tmp)) 1603 goto nla_put_failure; 1604 return cfg80211_testmode_reply(skb); 1605 1606 case OPENWIFI_CMD_SET_SLICE_END: 1607 if (!tb[OPENWIFI_ATTR_SLICE_END]) 1608 return -EINVAL; 1609 tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END]); 1610 if (priv->slice_idx>=MAX_NUM_HW_QUEUE) { 1611 printk("%s set SLICE_END(duration) WARNING: current slice idx %d is invalid!\n", sdr_compatible_str, priv->slice_idx); 1612 } else { 1613 printk("%s set SLICE_END(duration) %d usec to slice %d\n", sdr_compatible_str, tmp, priv->slice_idx); 1614 xpu_api->XPU_REG_SLICE_COUNT_END_write((priv->slice_idx<<20)|tmp); 1615 } 1616 return 0; 1617 case OPENWIFI_CMD_GET_SLICE_END: 1618 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1619 if (!skb) 1620 return -ENOMEM; 1621 tmp = (xpu_api->XPU_REG_SLICE_COUNT_END_read()); 1622 printk("%s get SLICE_END(duration) %d usec of slice %d\n", sdr_compatible_str, tmp&0xFFFFF, tmp>>20); 1623 if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END, tmp)) 1624 goto nla_put_failure; 1625 return cfg80211_testmode_reply(skb); 1626 1627 // case OPENWIFI_CMD_SET_SLICE_TOTAL1: 1628 // if (!tb[OPENWIFI_ATTR_SLICE_TOTAL1]) 1629 // return -EINVAL; 1630 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_TOTAL1]); 1631 // printk("%s set SLICE_TOTAL1(duration) to %d usec\n", sdr_compatible_str, tmp); 1632 // // xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_write(tmp); 1633 // return 0; 1634 // case OPENWIFI_CMD_GET_SLICE_TOTAL1: 1635 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1636 // if (!skb) 1637 // return -ENOMEM; 1638 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_TOTAL1_read()); 1639 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_TOTAL1, tmp)) 1640 // goto nla_put_failure; 1641 // return cfg80211_testmode_reply(skb); 1642 1643 // case OPENWIFI_CMD_SET_SLICE_START1: 1644 // if (!tb[OPENWIFI_ATTR_SLICE_START1]) 1645 // return -EINVAL; 1646 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_START1]); 1647 // printk("%s set SLICE_START1(duration) to %d usec\n", sdr_compatible_str, tmp); 1648 // // xpu_api->XPU_REG_SLICE_COUNT_START1_write(tmp); 1649 // return 0; 1650 // case OPENWIFI_CMD_GET_SLICE_START1: 1651 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1652 // if (!skb) 1653 // return -ENOMEM; 1654 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_START1_read()); 1655 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_START1, tmp)) 1656 // goto nla_put_failure; 1657 // return cfg80211_testmode_reply(skb); 1658 1659 // case OPENWIFI_CMD_SET_SLICE_END1: 1660 // if (!tb[OPENWIFI_ATTR_SLICE_END1]) 1661 // return -EINVAL; 1662 // tmp = nla_get_u32(tb[OPENWIFI_ATTR_SLICE_END1]); 1663 // printk("%s set SLICE_END1(duration) to %d usec\n", sdr_compatible_str, tmp); 1664 // // xpu_api->XPU_REG_SLICE_COUNT_END1_write(tmp); 1665 // return 0; 1666 // case OPENWIFI_CMD_GET_SLICE_END1: 1667 // skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1668 // if (!skb) 1669 // return -ENOMEM; 1670 // // tmp = (xpu_api->XPU_REG_SLICE_COUNT_END1_read()); 1671 // if (nla_put_u32(skb, OPENWIFI_ATTR_SLICE_END1, tmp)) 1672 // goto nla_put_failure; 1673 // return cfg80211_testmode_reply(skb); 1674 1675 case OPENWIFI_CMD_SET_RSSI_TH: 1676 if (!tb[OPENWIFI_ATTR_RSSI_TH]) 1677 return -EINVAL; 1678 tmp = nla_get_u32(tb[OPENWIFI_ATTR_RSSI_TH]); 1679 printk("%s set RSSI_TH to %d\n", sdr_compatible_str, tmp); 1680 tmp = (tmp | (xpu_api->XPU_REG_LBT_TH_read() & 0xFFFF0000)); 1681 xpu_api->XPU_REG_LBT_TH_write(tmp); 1682 return 0; 1683 case OPENWIFI_CMD_GET_RSSI_TH: 1684 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1685 if (!skb) 1686 return -ENOMEM; 1687 tmp = xpu_api->XPU_REG_LBT_TH_read(); 1688 if (nla_put_u32(skb, OPENWIFI_ATTR_RSSI_TH, tmp)) 1689 goto nla_put_failure; 1690 return cfg80211_testmode_reply(skb); 1691 1692 case OPENWIFI_CMD_SET_TSF: 1693 printk("openwifi_set_tsf_1"); 1694 if ( (!tb[OPENWIFI_ATTR_HIGH_TSF]) || (!tb[OPENWIFI_ATTR_LOW_TSF]) ) 1695 return -EINVAL; 1696 printk("openwifi_set_tsf_2"); 1697 tsft_high = nla_get_u32(tb[OPENWIFI_ATTR_HIGH_TSF]); 1698 tsft_low = nla_get_u32(tb[OPENWIFI_ATTR_LOW_TSF]); 1699 xpu_api->XPU_REG_TSF_LOAD_VAL_write(tsft_high,tsft_low); 1700 printk("%s openwifi_set_tsf: %08x%08x\n", sdr_compatible_str,tsft_high,tsft_low); 1701 return 0; 1702 1703 case REG_CMD_SET: 1704 if ( (!tb[REG_ATTR_ADDR]) || (!tb[REG_ATTR_VAL]) ) 1705 return -EINVAL; 1706 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1707 reg_val = nla_get_u32(tb[REG_ATTR_VAL]); 1708 reg_cat = ((reg_addr>>16)&0xFFFF); 1709 reg_addr = (reg_addr&0xFFFF); 1710 reg_addr_idx = (reg_addr>>2); 1711 printk("%s recv set cmd reg cat %d addr %08x val %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_val, reg_addr_idx); 1712 if (reg_cat==1) 1713 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1714 else if (reg_cat==2) 1715 rx_intf_api->reg_write(reg_addr,reg_val); 1716 else if (reg_cat==3) 1717 tx_intf_api->reg_write(reg_addr,reg_val); 1718 else if (reg_cat==4) 1719 openofdm_rx_api->reg_write(reg_addr,reg_val); 1720 else if (reg_cat==5) 1721 openofdm_tx_api->reg_write(reg_addr,reg_val); 1722 else if (reg_cat==6) 1723 xpu_api->reg_write(reg_addr,reg_val); 1724 else if (reg_cat==7) { 1725 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1726 priv->drv_rx_reg_val[reg_addr_idx]=reg_val; 1727 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1728 if (reg_val==0) 1729 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 1730 else 1731 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 1732 1733 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1734 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1735 } 1736 } else 1737 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1738 } 1739 else if (reg_cat==8) { 1740 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1741 priv->drv_tx_reg_val[reg_addr_idx]=reg_val; 1742 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1743 if (reg_val==0) { 1744 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 1745 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); 1746 } else { 1747 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; 1748 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); 1749 } 1750 1751 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1752 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1753 } 1754 } else 1755 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1756 } 1757 else if (reg_cat==9) { 1758 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1759 priv->drv_xpu_reg_val[reg_addr_idx]=reg_val; 1760 else 1761 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1762 } 1763 else 1764 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1765 1766 return 0; 1767 case REG_CMD_GET: 1768 skb = cfg80211_testmode_alloc_reply_skb(hw->wiphy, nla_total_size(sizeof(u32))); 1769 if (!skb) 1770 return -ENOMEM; 1771 reg_addr = nla_get_u32(tb[REG_ATTR_ADDR]); 1772 reg_cat = ((reg_addr>>16)&0xFFFF); 1773 reg_addr = (reg_addr&0xFFFF); 1774 reg_addr_idx = (reg_addr>>2); 1775 printk("%s recv get cmd reg cat %d addr %08x idx %d\n", sdr_compatible_str, reg_cat, reg_addr, reg_addr_idx); 1776 if (reg_cat==1) { 1777 printk("%s reg cat 1 (rf) is not supported yet!\n", sdr_compatible_str); 1778 tmp = 0xFFFFFFFF; 1779 } 1780 else if (reg_cat==2) 1781 tmp = rx_intf_api->reg_read(reg_addr); 1782 else if (reg_cat==3) 1783 tmp = tx_intf_api->reg_read(reg_addr); 1784 else if (reg_cat==4) 1785 tmp = openofdm_rx_api->reg_read(reg_addr); 1786 else if (reg_cat==5) 1787 tmp = openofdm_tx_api->reg_read(reg_addr); 1788 else if (reg_cat==6) 1789 tmp = xpu_api->reg_read(reg_addr); 1790 else if (reg_cat==7) { 1791 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1792 if (reg_addr_idx==DRV_RX_REG_IDX_FREQ_BW_CFG) { 1793 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1794 //priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1795 1796 if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT0) 1797 priv->drv_rx_reg_val[reg_addr_idx]=0; 1798 else if (priv->rx_intf_cfg == RX_INTF_BW_20MHZ_AT_0MHZ_ANT1) 1799 priv->drv_rx_reg_val[reg_addr_idx]=1; 1800 } 1801 tmp = priv->drv_rx_reg_val[reg_addr_idx]; 1802 } else 1803 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1804 } 1805 else if (reg_cat==8) { 1806 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) { 1807 if (reg_addr_idx==DRV_TX_REG_IDX_FREQ_BW_CFG) { 1808 //priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 1809 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 1810 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0) 1811 priv->drv_tx_reg_val[reg_addr_idx]=0; 1812 else if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) 1813 priv->drv_tx_reg_val[reg_addr_idx]=1; 1814 } 1815 tmp = priv->drv_tx_reg_val[reg_addr_idx]; 1816 } else 1817 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1818 } 1819 else if (reg_cat==9) { 1820 if (reg_addr_idx>=0 && reg_addr_idx<MAX_NUM_DRV_REG) 1821 tmp = priv->drv_xpu_reg_val[reg_addr_idx]; 1822 else 1823 printk("%s reg_addr_idx %d is out of range!\n", sdr_compatible_str, reg_addr_idx); 1824 } 1825 else 1826 printk("%s reg cat %d is not supported yet!\n", sdr_compatible_str, reg_cat); 1827 1828 if (nla_put_u32(skb, REG_ATTR_VAL, tmp)) 1829 goto nla_put_failure; 1830 return cfg80211_testmode_reply(skb); 1831 1832 default: 1833 return -EOPNOTSUPP; 1834 } 1835 1836 nla_put_failure: 1837 dev_kfree_skb(skb); 1838 return -ENOBUFS; 1839 } 1840 1841 static const struct ieee80211_ops openwifi_ops = { 1842 .tx = openwifi_tx, 1843 .start = openwifi_start, 1844 .stop = openwifi_stop, 1845 .add_interface = openwifi_add_interface, 1846 .remove_interface = openwifi_remove_interface, 1847 .config = openwifi_config, 1848 .bss_info_changed = openwifi_bss_info_changed, 1849 .conf_tx = openwifi_conf_tx, 1850 .prepare_multicast = openwifi_prepare_multicast, 1851 .configure_filter = openwifi_configure_filter, 1852 .rfkill_poll = openwifi_rfkill_poll, 1853 .get_tsf = openwifi_get_tsf, 1854 .set_tsf = openwifi_set_tsf, 1855 .reset_tsf = openwifi_reset_tsf, 1856 .set_rts_threshold = openwifi_set_rts_threshold, 1857 .testmode_cmd = openwifi_testmode_cmd, 1858 }; 1859 1860 static const struct of_device_id openwifi_dev_of_ids[] = { 1861 { .compatible = "sdr,sdr", }, 1862 {} 1863 }; 1864 MODULE_DEVICE_TABLE(of, openwifi_dev_of_ids); 1865 1866 static int custom_match_spi_dev(struct device *dev, void *data) 1867 { 1868 const char *name = data; 1869 1870 bool ret = sysfs_streq(name, dev->of_node->name); 1871 printk("%s custom_match_spi_dev %s %s %d\n", sdr_compatible_str,name, dev->of_node->name, ret); 1872 return ret; 1873 } 1874 1875 static int custom_match_platform_dev(struct device *dev, void *data) 1876 { 1877 struct platform_device *plat_dev = to_platform_device(dev); 1878 const char *name = data; 1879 char *name_in_sys_bus_platform_devices = strstr(plat_dev->name, name); 1880 bool match_flag = (name_in_sys_bus_platform_devices != NULL); 1881 1882 if (match_flag) { 1883 printk("%s custom_match_platform_dev %s\n", sdr_compatible_str,plat_dev->name); 1884 } 1885 return(match_flag); 1886 } 1887 1888 static int openwifi_dev_probe(struct platform_device *pdev) 1889 { 1890 struct ieee80211_hw *dev; 1891 struct openwifi_priv *priv; 1892 int err=1, rand_val; 1893 const char *chip_name, *fpga_model; 1894 u32 reg;//, reg1; 1895 1896 struct device_node *np = pdev->dev.of_node; 1897 1898 struct device *tmp_dev; 1899 struct platform_device *tmp_pdev; 1900 struct iio_dev *tmp_indio_dev; 1901 // struct gpio_leds_priv *tmp_led_priv; 1902 1903 printk("\n"); 1904 1905 if (np) { 1906 const struct of_device_id *match; 1907 1908 match = of_match_node(openwifi_dev_of_ids, np); 1909 if (match) { 1910 printk("%s openwifi_dev_probe: match!\n", sdr_compatible_str); 1911 err = 0; 1912 } 1913 } 1914 1915 if (err) 1916 return err; 1917 1918 dev = ieee80211_alloc_hw(sizeof(*priv), &openwifi_ops); 1919 if (!dev) { 1920 printk(KERN_ERR "%s openwifi_dev_probe: ieee80211 alloc failed\n",sdr_compatible_str); 1921 err = -ENOMEM; 1922 goto err_free_dev; 1923 } 1924 1925 priv = dev->priv; 1926 priv->pdev = pdev; 1927 1928 err = of_property_read_string(of_find_node_by_path("/"), "model", &fpga_model); 1929 if(err < 0) { 1930 printk("%s openwifi_dev_probe: WARNING unknown openwifi FPGA model %d\n",sdr_compatible_str, err); 1931 priv->fpga_type = SMALL_FPGA; 1932 } else { 1933 // LARGE FPGAs (i.e. ZCU102, Z7035, ZC706) 1934 if(strstr(fpga_model, "ZCU102") != NULL || strstr(fpga_model, "Z7035") != NULL || strstr(fpga_model, "ZC706") != NULL) 1935 priv->fpga_type = LARGE_FPGA; 1936 // SMALL FPGA: (i.e. ZED, ZC702, Z7020) 1937 else if(strstr(fpga_model, "ZED") != NULL || strstr(fpga_model, "ZC702") != NULL || strstr(fpga_model, "Z7020") != NULL) 1938 priv->fpga_type = SMALL_FPGA; 1939 } 1940 1941 // //-------------find ad9361-phy driver for lo/channel control--------------- 1942 priv->actual_rx_lo = 0; 1943 tmp_dev = bus_find_device( &spi_bus_type, NULL, "ad9361-phy", custom_match_spi_dev ); 1944 if (tmp_dev == NULL) { 1945 printk(KERN_ERR "%s find_dev ad9361-phy failed\n",sdr_compatible_str); 1946 err = -ENOMEM; 1947 goto err_free_dev; 1948 } 1949 printk("%s bus_find_device ad9361-phy: %s. driver_data pointer %p\n", sdr_compatible_str, ((struct spi_device*)tmp_dev)->modalias, (void*)(((struct spi_device*)tmp_dev)->dev.driver_data)); 1950 if (((struct spi_device*)tmp_dev)->dev.driver_data == NULL) { 1951 printk(KERN_ERR "%s find_dev ad9361-phy failed. dev.driver_data == NULL\n",sdr_compatible_str); 1952 err = -ENOMEM; 1953 goto err_free_dev; 1954 } 1955 1956 priv->ad9361_phy = ad9361_spi_to_phy((struct spi_device*)tmp_dev); 1957 if (!(priv->ad9361_phy)) { 1958 printk(KERN_ERR "%s ad9361_spi_to_phy failed\n",sdr_compatible_str); 1959 err = -ENOMEM; 1960 goto err_free_dev; 1961 } 1962 printk("%s ad9361_spi_to_phy ad9361-phy: %s\n", sdr_compatible_str, priv->ad9361_phy->spi->modalias); 1963 1964 priv->ctrl_out.en_mask=0xFF; 1965 priv->ctrl_out.index=0x16; 1966 err = ad9361_ctrl_outs_setup(priv->ad9361_phy, &(priv->ctrl_out)); 1967 if (err < 0) { 1968 printk("%s openwifi_dev_probe: WARNING ad9361_ctrl_outs_setup %d\n",sdr_compatible_str, err); 1969 } else { 1970 printk("%s openwifi_dev_probe: ad9361_ctrl_outs_setup en_mask 0x%02x index 0x%02x\n",sdr_compatible_str, priv->ctrl_out.en_mask, priv->ctrl_out.index); 1971 } 1972 1973 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_POINTER); 1974 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_POINTER 0x%02x\n",sdr_compatible_str, reg); 1975 reg = ad9361_spi_read(priv->ad9361_phy->spi, REG_CTRL_OUTPUT_ENABLE); 1976 printk("%s openwifi_dev_probe: ad9361_spi_read REG_CTRL_OUTPUT_ENABLE 0x%02x\n",sdr_compatible_str, reg); 1977 1978 // //-------------find driver: axi_ad9361 hdl ref design module, dac channel--------------- 1979 tmp_dev = bus_find_device( &platform_bus_type, NULL, "cf-ad9361-dds-core-lpc", custom_match_platform_dev ); 1980 if (!tmp_dev) { 1981 printk(KERN_ERR "%s bus_find_device platform_bus_type cf-ad9361-dds-core-lpc failed\n",sdr_compatible_str); 1982 err = -ENOMEM; 1983 goto err_free_dev; 1984 } 1985 1986 tmp_pdev = to_platform_device(tmp_dev); 1987 if (!tmp_pdev) { 1988 printk(KERN_ERR "%s to_platform_device failed\n",sdr_compatible_str); 1989 err = -ENOMEM; 1990 goto err_free_dev; 1991 } 1992 1993 tmp_indio_dev = platform_get_drvdata(tmp_pdev); 1994 if (!tmp_indio_dev) { 1995 printk(KERN_ERR "%s platform_get_drvdata failed\n",sdr_compatible_str); 1996 err = -ENOMEM; 1997 goto err_free_dev; 1998 } 1999 2000 priv->dds_st = iio_priv(tmp_indio_dev); 2001 if (!(priv->dds_st)) { 2002 printk(KERN_ERR "%s iio_priv failed\n",sdr_compatible_str); 2003 err = -ENOMEM; 2004 goto err_free_dev; 2005 } 2006 printk("%s openwifi_dev_probe: cf-ad9361-dds-core-lpc dds_st->version %08x chip_info->name %s\n",sdr_compatible_str,priv->dds_st->version,priv->dds_st->chip_info->name); 2007 cf_axi_dds_datasel(priv->dds_st, -1, DATA_SEL_DMA); 2008 printk("%s openwifi_dev_probe: cf_axi_dds_datasel DATA_SEL_DMA\n",sdr_compatible_str); 2009 2010 // //-------------find driver: axi_ad9361 hdl ref design module, adc channel--------------- 2011 // turn off radio by muting tx 2012 // ad9361_tx_mute(priv->ad9361_phy, 1); 2013 // reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2014 // reg1 = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2015 // if (reg == AD9361_RADIO_OFF_TX_ATT && reg1 == AD9361_RADIO_OFF_TX_ATT ) { 2016 // priv->rfkill_off = 0;// 0 off, 1 on 2017 // printk("%s openwifi_dev_probe: rfkill radio off\n",sdr_compatible_str); 2018 // } 2019 // else 2020 // printk("%s openwifi_dev_probe: WARNING rfkill radio off failed. tx att read %d %d require %d\n",sdr_compatible_str, reg, reg1, AD9361_RADIO_OFF_TX_ATT); 2021 2022 priv->rssi_correction = 43;//this will be set in real-time by _rf_set_channel() 2023 2024 //priv->rf_bw = 20000000; // Signal quality issue! NOT use for now. 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2025 priv->rf_bw = 40000000; // 20MHz or 40MHz. 40MHz need ddc/duc. 20MHz works in bypass mode 2026 2027 priv->xpu_cfg = XPU_NORMAL; 2028 2029 priv->openofdm_tx_cfg = OPENOFDM_TX_NORMAL; 2030 priv->openofdm_rx_cfg = OPENOFDM_RX_NORMAL; 2031 2032 printk("%s openwifi_dev_probe: priv->rf_bw == %dHz. bool for 20000000 %d, 40000000 %d\n",sdr_compatible_str, priv->rf_bw, (priv->rf_bw==20000000) , (priv->rf_bw==40000000) ); 2033 if (priv->rf_bw == 20000000) { 2034 priv->rx_intf_cfg = RX_INTF_BYPASS; 2035 priv->tx_intf_cfg = TX_INTF_BYPASS; 2036 //priv->rx_freq_offset_to_lo_MHz = 0; 2037 //priv->tx_freq_offset_to_lo_MHz = 0; 2038 } else if (priv->rf_bw == 40000000) { 2039 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_P_10MHZ; //work 2040 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1; //work 2041 2042 // // test ddc at central, duc at central+10M. It works. And also change rx BW from 40MHz to 20MHz in rf_init.sh. Rx sampling rate is still 40Msps 2043 priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT0; 2044 priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; // Let's use rx0 tx0 as default mode, because it works for both 9361 and 9364 2045 // // try another antenna option 2046 //priv->rx_intf_cfg = RX_INTF_BW_20MHZ_AT_0MHZ_ANT1; 2047 //priv->tx_intf_cfg = TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT0; 2048 2049 #if 0 2050 if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_N_10MHZ) { 2051 priv->rx_freq_offset_to_lo_MHz = -10; 2052 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_P_10MHZ) { 2053 priv->rx_freq_offset_to_lo_MHz = 10; 2054 } else if (priv->rx_intf_cfg == DDC_BW_20MHZ_AT_0MHZ) { 2055 priv->rx_freq_offset_to_lo_MHz = 0; 2056 } else { 2057 printk("%s openwifi_dev_probe: Warning! priv->rx_intf_cfg == %d\n",sdr_compatible_str,priv->rx_intf_cfg); 2058 } 2059 #endif 2060 } else { 2061 printk("%s openwifi_dev_probe: Warning! priv->rf_bw == %dHz (should be 20000000 or 40000000)\n",sdr_compatible_str, priv->rf_bw); 2062 } 2063 priv->rx_freq_offset_to_lo_MHz = rx_intf_fo_mapping[priv->rx_intf_cfg]; 2064 priv->tx_freq_offset_to_lo_MHz = tx_intf_fo_mapping[priv->tx_intf_cfg]; 2065 printk("%s openwifi_dev_probe: test_mode %d\n", sdr_compatible_str, test_mode); 2066 2067 //let's by default turn radio on when probing 2068 if (priv->tx_intf_cfg == TX_INTF_BW_20MHZ_AT_N_10MHZ_ANT1) { 2069 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, false, true, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2070 reg = ad9361_get_tx_atten(priv->ad9361_phy, 2); 2071 } else { 2072 ad9361_set_tx_atten(priv->ad9361_phy, AD9361_RADIO_ON_TX_ATT, true, false, true); // AD9361_RADIO_ON_TX_ATT 3000 means 3dB, 0 means 0dB 2073 reg = ad9361_get_tx_atten(priv->ad9361_phy, 1); 2074 } 2075 if (reg == AD9361_RADIO_ON_TX_ATT) { 2076 priv->rfkill_off = 1;// 0 off, 1 on 2077 printk("%s openwifi_dev_probe: rfkill radio on\n",sdr_compatible_str); 2078 } 2079 else 2080 printk("%s openwifi_dev_probe: WARNING rfkill radio on failed. tx att read %d require %d\n",sdr_compatible_str, reg, AD9361_RADIO_ON_TX_ATT); 2081 2082 memset(priv->drv_rx_reg_val,0,sizeof(priv->drv_rx_reg_val)); 2083 memset(priv->drv_tx_reg_val,0,sizeof(priv->drv_tx_reg_val)); 2084 memset(priv->drv_xpu_reg_val,0,sizeof(priv->drv_xpu_reg_val)); 2085 2086 // //set ad9361 in certain mode 2087 #if 0 2088 err = ad9361_set_trx_clock_chain_freq(priv->ad9361_phy,priv->rf_bw); 2089 printk("%s openwifi_dev_probe: ad9361_set_trx_clock_chain_freq %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2090 err = ad9361_update_rf_bandwidth(priv->ad9361_phy,priv->rf_bw,priv->rf_bw); 2091 printk("%s openwifi_dev_probe: ad9361_update_rf_bandwidth %dHz err %d\n",sdr_compatible_str, priv->rf_bw,err); 2092 2093 rx_intf_api->hw_init(priv->rx_intf_cfg,8,8); 2094 tx_intf_api->hw_init(priv->tx_intf_cfg,8,8,priv->fpga_type); 2095 openofdm_tx_api->hw_init(priv->openofdm_tx_cfg); 2096 openofdm_rx_api->hw_init(priv->openofdm_rx_cfg); 2097 printk("%s openwifi_dev_probe: rx_intf_cfg %d openofdm_rx_cfg %d tx_intf_cfg %d openofdm_tx_cfg %d\n",sdr_compatible_str, priv->rx_intf_cfg, priv->openofdm_rx_cfg, priv->tx_intf_cfg, priv->openofdm_tx_cfg); 2098 printk("%s openwifi_dev_probe: rx_freq_offset_to_lo_MHz %d tx_freq_offset_to_lo_MHz %d\n",sdr_compatible_str, priv->rx_freq_offset_to_lo_MHz, priv->tx_freq_offset_to_lo_MHz); 2099 #endif 2100 2101 dev->max_rates = 1; //maximum number of alternate rate retry stages the hw can handle. 2102 2103 SET_IEEE80211_DEV(dev, &pdev->dev); 2104 platform_set_drvdata(pdev, dev); 2105 2106 BUILD_BUG_ON(sizeof(priv->rates_2GHz) != sizeof(openwifi_2GHz_rates)); 2107 BUILD_BUG_ON(sizeof(priv->rates_5GHz) != sizeof(openwifi_5GHz_rates)); 2108 BUILD_BUG_ON(sizeof(priv->channels_2GHz) != sizeof(openwifi_2GHz_channels)); 2109 BUILD_BUG_ON(sizeof(priv->channels_5GHz) != sizeof(openwifi_5GHz_channels)); 2110 2111 memcpy(priv->rates_2GHz, openwifi_2GHz_rates, sizeof(openwifi_2GHz_rates)); 2112 memcpy(priv->rates_5GHz, openwifi_5GHz_rates, sizeof(openwifi_5GHz_rates)); 2113 memcpy(priv->channels_2GHz, openwifi_2GHz_channels, sizeof(openwifi_2GHz_channels)); 2114 memcpy(priv->channels_5GHz, openwifi_5GHz_channels, sizeof(openwifi_5GHz_channels)); 2115 2116 priv->band = BAND_5_8GHZ; //this can be changed by band _rf_set_channel() (2.4GHz ERP(OFDM)) (5GHz OFDM) 2117 priv->channel = 44; //currently useless. this can be changed by band _rf_set_channel() 2118 priv->use_short_slot = false; //this can be changed by openwifi_bss_info_changed: BSS_CHANGED_ERP_SLOT 2119 2120 priv->band_2GHz.band = NL80211_BAND_2GHZ; 2121 priv->band_2GHz.channels = priv->channels_2GHz; 2122 priv->band_2GHz.n_channels = ARRAY_SIZE(priv->channels_2GHz); 2123 priv->band_2GHz.bitrates = priv->rates_2GHz; 2124 priv->band_2GHz.n_bitrates = ARRAY_SIZE(priv->rates_2GHz); 2125 priv->band_2GHz.ht_cap.ht_supported = true; 2126 priv->band_2GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2127 memset(&priv->band_2GHz.ht_cap.mcs, 0, sizeof(priv->band_2GHz.ht_cap.mcs)); 2128 priv->band_2GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2129 priv->band_2GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2130 dev->wiphy->bands[NL80211_BAND_2GHZ] = &(priv->band_2GHz); 2131 2132 priv->band_5GHz.band = NL80211_BAND_5GHZ; 2133 priv->band_5GHz.channels = priv->channels_5GHz; 2134 priv->band_5GHz.n_channels = ARRAY_SIZE(priv->channels_5GHz); 2135 priv->band_5GHz.bitrates = priv->rates_5GHz; 2136 priv->band_5GHz.n_bitrates = ARRAY_SIZE(priv->rates_5GHz); 2137 priv->band_5GHz.ht_cap.ht_supported = true; 2138 priv->band_5GHz.ht_cap.cap = IEEE80211_HT_CAP_SGI_20; 2139 memset(&priv->band_5GHz.ht_cap.mcs, 0, sizeof(priv->band_5GHz.ht_cap.mcs)); 2140 priv->band_5GHz.ht_cap.mcs.rx_mask[0] = 0xff; 2141 priv->band_5GHz.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED; 2142 dev->wiphy->bands[NL80211_BAND_5GHZ] = &(priv->band_5GHz); 2143 2144 printk("%s openwifi_dev_probe: band_2GHz.n_channels %d n_bitrates %d band_5GHz.n_channels %d n_bitrates %d\n",sdr_compatible_str, 2145 priv->band_2GHz.n_channels,priv->band_2GHz.n_bitrates,priv->band_5GHz.n_channels,priv->band_5GHz.n_bitrates); 2146 2147 ieee80211_hw_set(dev, HOST_BROADCAST_PS_BUFFERING); 2148 ieee80211_hw_set(dev, RX_INCLUDES_FCS); 2149 ieee80211_hw_set(dev, BEACON_TX_STATUS); 2150 2151 dev->vif_data_size = sizeof(struct openwifi_vif); 2152 dev->wiphy->interface_modes = 2153 BIT(NL80211_IFTYPE_MONITOR)| 2154 BIT(NL80211_IFTYPE_P2P_GO) | 2155 BIT(NL80211_IFTYPE_P2P_CLIENT) | 2156 BIT(NL80211_IFTYPE_AP) | 2157 BIT(NL80211_IFTYPE_STATION) | 2158 BIT(NL80211_IFTYPE_ADHOC) | 2159 BIT(NL80211_IFTYPE_MESH_POINT) | 2160 BIT(NL80211_IFTYPE_OCB); 2161 dev->wiphy->iface_combinations = &openwifi_if_comb; 2162 dev->wiphy->n_iface_combinations = 1; 2163 2164 dev->wiphy->regulatory_flags = (REGULATORY_STRICT_REG|REGULATORY_CUSTOM_REG); // use our own config within strict regulation 2165 //dev->wiphy->regulatory_flags = REGULATORY_CUSTOM_REG; // use our own config 2166 wiphy_apply_custom_regulatory(dev->wiphy, &sdr_regd); 2167 2168 chip_name = "ZYNQ"; 2169 2170 /* we declare to MAC80211 all the queues except for beacon queue 2171 * that will be eventually handled by DRV. 2172 * TX rings are arranged in such a way that lower is the IDX, 2173 * higher is the priority, in order to achieve direct mapping 2174 * with mac80211, however the beacon queue is an exception and it 2175 * is mapped on the highst tx ring IDX. 2176 */ 2177 dev->queues = MAX_NUM_HW_QUEUE; 2178 //dev->queues = 1; 2179 2180 ieee80211_hw_set(dev, SIGNAL_DBM); 2181 2182 wiphy_ext_feature_set(dev->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST); 2183 2184 priv->rf = &ad9361_rf_ops; 2185 2186 memset(priv->dest_mac_addr_queue_map,0,sizeof(priv->dest_mac_addr_queue_map)); 2187 priv->slice_idx = 0xFFFFFFFF; 2188 2189 sg_init_table(&(priv->tx_sg), 1); 2190 2191 get_random_bytes(&rand_val, sizeof(rand_val)); 2192 rand_val%=250; 2193 priv->mac_addr[0]=0x66; priv->mac_addr[1]=0x55; priv->mac_addr[2]=0x44; priv->mac_addr[3]=0x33; priv->mac_addr[4]=0x22; 2194 priv->mac_addr[5]=rand_val+1; 2195 //priv->mac_addr[5]=0x11; 2196 if (!is_valid_ether_addr(priv->mac_addr)) { 2197 printk(KERN_WARNING "%s openwifi_dev_probe: WARNING Invalid hwaddr! Using randomly generated MAC addr\n",sdr_compatible_str); 2198 eth_random_addr(priv->mac_addr); 2199 } else { 2200 printk("%s openwifi_dev_probe: mac_addr %02x:%02x:%02x:%02x:%02x:%02x\n",sdr_compatible_str,priv->mac_addr[0],priv->mac_addr[1],priv->mac_addr[2],priv->mac_addr[3],priv->mac_addr[4],priv->mac_addr[5]); 2201 } 2202 SET_IEEE80211_PERM_ADDR(dev, priv->mac_addr); 2203 2204 spin_lock_init(&priv->lock); 2205 2206 err = ieee80211_register_hw(dev); 2207 if (err) { 2208 pr_err(KERN_ERR "%s openwifi_dev_probe: WARNING Cannot register device\n",sdr_compatible_str); 2209 goto err_free_dev; 2210 } else { 2211 printk("%s openwifi_dev_probe: ieee80211_register_hw %d\n",sdr_compatible_str, err); 2212 } 2213 2214 // // //--------------------hook leds (not complete yet)-------------------------------- 2215 // tmp_dev = bus_find_device( &platform_bus_type, NULL, "leds", custom_match_platform_dev ); //leds is the name in devicetree, not "compatible" field 2216 // if (!tmp_dev) { 2217 // printk(KERN_ERR "%s bus_find_device platform_bus_type leds-gpio failed\n",sdr_compatible_str); 2218 // err = -ENOMEM; 2219 // goto err_free_dev; 2220 // } 2221 2222 // tmp_pdev = to_platform_device(tmp_dev); 2223 // if (!tmp_pdev) { 2224 // printk(KERN_ERR "%s to_platform_device failed for leds-gpio\n",sdr_compatible_str); 2225 // err = -ENOMEM; 2226 // goto err_free_dev; 2227 // } 2228 2229 // tmp_led_priv = platform_get_drvdata(tmp_pdev); 2230 // if (!tmp_led_priv) { 2231 // printk(KERN_ERR "%s platform_get_drvdata failed for leds-gpio\n",sdr_compatible_str); 2232 // err = -ENOMEM; 2233 // goto err_free_dev; 2234 // } 2235 // printk("%s openwifi_dev_probe: leds-gpio detect %d leds!\n",sdr_compatible_str, tmp_led_priv->num_leds); 2236 // if (tmp_led_priv->num_leds!=4){ 2237 // printk(KERN_ERR "%s WARNING we expect 4 leds, but actual %d leds\n",sdr_compatible_str,tmp_led_priv->num_leds); 2238 // err = -ENOMEM; 2239 // goto err_free_dev; 2240 // } 2241 // gpiod_set_value(tmp_led_priv->leds[0].gpiod, 1);//light it 2242 // gpiod_set_value(tmp_led_priv->leds[3].gpiod, 0);//black it 2243 // priv->num_led = tmp_led_priv->num_leds; 2244 // priv->led[0] = &(tmp_led_priv->leds[0].cdev); 2245 // priv->led[1] = &(tmp_led_priv->leds[1].cdev); 2246 // priv->led[2] = &(tmp_led_priv->leds[2].cdev); 2247 // priv->led[3] = &(tmp_led_priv->leds[3].cdev); 2248 2249 // snprintf(priv->led_name[0], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::radio", wiphy_name(dev->wiphy)); 2250 // snprintf(priv->led_name[1], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::assoc", wiphy_name(dev->wiphy)); 2251 // snprintf(priv->led_name[2], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::tx", wiphy_name(dev->wiphy)); 2252 // snprintf(priv->led_name[3], OPENWIFI_LED_MAX_NAME_LEN, "openwifi-%s::rx", wiphy_name(dev->wiphy)); 2253 2254 wiphy_info(dev->wiphy, "hwaddr %pm, %s + %s\n", 2255 priv->mac_addr, chip_name, priv->rf->name); 2256 2257 openwifi_rfkill_init(dev); 2258 return 0; 2259 2260 err_free_dev: 2261 ieee80211_free_hw(dev); 2262 2263 return err; 2264 } 2265 2266 static int openwifi_dev_remove(struct platform_device *pdev) 2267 { 2268 struct ieee80211_hw *dev = platform_get_drvdata(pdev); 2269 2270 if (!dev) { 2271 pr_info("%s openwifi_dev_remove: dev %p\n", sdr_compatible_str, (void*)dev); 2272 return(-1); 2273 } 2274 2275 openwifi_rfkill_exit(dev); 2276 ieee80211_unregister_hw(dev); 2277 ieee80211_free_hw(dev); 2278 return(0); 2279 } 2280 2281 static struct platform_driver openwifi_dev_driver = { 2282 .driver = { 2283 .name = "sdr,sdr", 2284 .owner = THIS_MODULE, 2285 .of_match_table = openwifi_dev_of_ids, 2286 }, 2287 .probe = openwifi_dev_probe, 2288 .remove = openwifi_dev_remove, 2289 }; 2290 2291 module_platform_driver(openwifi_dev_driver); 2292