xref: /nrf52832-nimble/rt-thread/libcpu/unicore32/sep6200/context_gcc.S (revision 167494296f0543431a51b6b1b83e957045294e05)
1/*
2 * File      : context_gcc.S
3 * This file is part of RT-Thread RTOS
4 * COPYRIGHT (C) 2006 - 2013, RT-Thread Development Team
5 *
6 *  This program is free software; you can redistribute it and/or modify
7 *  it under the terms of the GNU General Public License as published by
8 *  the Free Software Foundation; either version 2 of the License, or
9 *  (at your option) any later version.
10 *
11 *  This program is distributed in the hope that it will be useful,
12 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
13 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14 *  GNU General Public License for more details.
15 *
16 *  You should have received a copy of the GNU General Public License along
17 *  with this program; if not, write to the Free Software Foundation, Inc.,
18 *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Change Logs:
21 * Date           Author       Notes
22 * 2013-7-14      Peng Fan     sep6200 implementation
23 */
24
25/**
26 * \addtogroup sep6200
27 */
28
29/*@{*/
30
31#define NOINT			0xc0
32
33/*
34 * rt_base_t rt_hw_interrupt_disable();
35 */
36.globl rt_hw_interrupt_disable
37.type rt_hw_interrupt_disable, %function
38rt_hw_interrupt_disable:
39  stw.w   r1, [sp-], #4
40	mov    	r0, asr
41	or    	r1, r0, #NOINT
42	mov.a 	asr, r1
43  ldw.w   r1, [sp]+, #4
44	mov	    pc, lr
45
46/*
47 * void rt_hw_interrupt_enable(rt_base_t level);
48 */
49.globl rt_hw_interrupt_enable
50.type rt_hw_interrupt_disable, %function
51rt_hw_interrupt_enable:
52	mov.a asr, r0
53	mov pc, lr
54
55/*
56 * void rt_hw_context_switch(rt_uint32 from, rt_uint32 to);
57 * r0 --> from
58 * r1 --> to
59 */
60.globl rt_hw_context_switch
61.type rt_hw_interrupt_disable, %function
62rt_hw_context_switch:
63	stm.w   (lr), [sp-]
64	stm.w	(r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr), [sp-]
65	stm.w	(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15),  [sp-]
66	mov	r4, asr
67	stm.w	(r4), [sp-]
68	mov 	r4, bsr
69	stm.w	(r4), [sp-]
70
71	stw	sp, [r0+]
72	ldw	sp, [r1+]
73
74	ldm.w	(r4), [sp]+
75	mov.a	bsr,r4
76	ldm.w	(r4), [sp]+
77	mov.a	asr, r4
78
79	ldm.w	(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+
80	ldm.w	(r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr, pc), [sp]+
81
82/*
83 * void rt_hw_context_switch_to(rt_uint32 to);
84 * r0 --> to
85 */
86.globl rt_hw_context_switch_to
87rt_hw_context_switch_to:
88	ldw	sp, [r0+]
89	ldm.w	(r4), [sp]+
90	mov.a	bsr, r4
91	ldm.w	(r4), [sp]+
92	mov.a	asr, r4
93	ldm.w	(r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15), [sp]+
94	ldm.w	(r16, r17, r18, r19, r20, r21, r22, r23, r24, r25, r26, r27, r28, lr, pc), [sp]+
95
96/*
97 * void rt_hw_context_switch_interrupt(rt_uint32 from, rt_uint32 to);
98 */
99.globl rt_thread_switch_interrupt_flag
100.globl rt_interrupt_from_thread
101.globl rt_interrupt_to_thread
102.globl rt_hw_context_switch_interrupt
103rt_hw_context_switch_interrupt:
104	ldw r2, =rt_thread_switch_interrupt_flag
105	ldw r3, [r2+]
106	cmpsub.a r3, #1
107	beq _reswitch
108	mov r3, #1
109	stw r3, [r2+]
110	ldw r2, =rt_interrupt_from_thread
111	stw r0, [r2+]
112_reswitch:
113	ldw r2, =rt_interrupt_to_thread
114	stw r1, [r2+]
115	mov pc, lr
116