1 /* 2 * Copyright (C) 2017 C-SKY Microsystems Co., Ltd. All rights reserved. 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 /****************************************************************************** 18 * @file csi_reg.h 19 * @brief CSI Header File for reg. 20 * @version V1.0 21 * @date 02. June 2017 22 ******************************************************************************/ 23 24 #ifndef _CSI_REG_H_ 25 #define _CSI_REG_H_ 26 27 #include<csi_gcc.h> 28 29 /** 30 \brief Enable IRQ Interrupts 31 \details Enables IRQ interrupts by setting the IE-bit in the PSR. 32 Can only be executed in Privileged modes. 33 */ 34 __ALWAYS_INLINE void __enable_irq(void) 35 { 36 __ASM volatile("psrset ie"); 37 } 38 39 40 41 /** 42 \brief Disable IRQ Interrupts 43 \details Disables IRQ interrupts by clearing the IE-bit in the PSR. 44 Can only be executed in Privileged modes. 45 */ 46 __ALWAYS_INLINE void __disable_irq(void) 47 { 48 __ASM volatile("psrclr ie"); 49 } 50 51 /** 52 \brief Get PSR 53 \details Returns the content of the PSR Register. 54 \return PSR Register value 55 */ 56 __ALWAYS_INLINE uint32_t __get_PSR(void) 57 { 58 uint32_t result; 59 60 __ASM volatile("mfcr %0, psr" : "=r"(result)); 61 return (result); 62 } 63 64 /** 65 \brief Set PSR 66 \details Writes the given value to the PSR Register. 67 \param [in] psr PSR Register value to set 68 */ 69 __ALWAYS_INLINE void __set_PSR(uint32_t psr) 70 { 71 __ASM volatile("mtcr %0, psr" : : "r"(psr)); 72 } 73 74 /** 75 \brief Get SP 76 \details Returns the content of the SP Register. 77 \return SP Register value 78 */ 79 __ALWAYS_INLINE uint32_t __get_SP(void) 80 { 81 uint32_t result; 82 83 __ASM volatile("mov %0, sp" : "=r"(result)); 84 return (result); 85 } 86 87 /** 88 \brief Set SP 89 \details Writes the given value to the SP Register. 90 \param [in] sp SP Register value to set 91 */ 92 __ALWAYS_INLINE void __set_SP(uint32_t sp) 93 { 94 __ASM volatile("mov sp, %0" : : "r"(sp): "sp"); 95 } 96 97 98 /** 99 \brief Get VBR Register 100 \details Returns the content of the VBR Register. 101 \return VBR Register value 102 */ 103 __ALWAYS_INLINE uint32_t __get_VBR(void) 104 { 105 uint32_t result; 106 107 __ASM volatile("mfcr %0, vbr" : "=r"(result)); 108 return (result); 109 } 110 111 /** 112 \brief Set VBR 113 \details Writes the given value to the VBR Register. 114 \param [in] vbr VBR Register value to set 115 */ 116 __ALWAYS_INLINE void __set_VBR(uint32_t vbr) 117 { 118 __ASM volatile("mtcr %0, vbr" : : "r"(vbr)); 119 } 120 121 /** 122 \brief Get EPC Register 123 \details Returns the content of the EPC Register. 124 \return EPC Register value 125 */ 126 __ALWAYS_INLINE uint32_t __get_EPC(void) 127 { 128 uint32_t result; 129 130 __ASM volatile("mfcr %0, epc" : "=r"(result)); 131 return (result); 132 } 133 134 /** 135 \brief Set EPC 136 \details Writes the given value to the EPC Register. 137 \param [in] epc EPC Register value to set 138 */ 139 __ALWAYS_INLINE void __set_EPC(uint32_t epc) 140 { 141 __ASM volatile("mtcr %0, epc" : : "r"(epc)); 142 } 143 144 /** 145 \brief Get EPSR 146 \details Returns the content of the EPSR Register. 147 \return EPSR Register value 148 */ 149 __ALWAYS_INLINE uint32_t __get_EPSR(void) 150 { 151 uint32_t result; 152 153 __ASM volatile("mfcr %0, epsr" : "=r"(result)); 154 return (result); 155 } 156 157 /** 158 \brief Set EPSR 159 \details Writes the given value to the EPSR Register. 160 \param [in] epsr EPSR Register value to set 161 */ 162 __ALWAYS_INLINE void __set_EPSR(uint32_t epsr) 163 { 164 __ASM volatile("mtcr %0, epsr" : : "r"(epsr)); 165 } 166 167 /** 168 \brief Get CPUID Register 169 \details Returns the content of the CPUID Register. 170 \return CPUID Register value 171 */ 172 __ALWAYS_INLINE uint32_t __get_CPUID(void) 173 { 174 uint32_t result; 175 176 __ASM volatile("mfcr %0, cr<13, 0>" : "=r"(result)); 177 return (result); 178 } 179 180 #if (__SOFTRESET_PRESENT == 1U) 181 /** 182 \brief Set SRCR 183 \details Assigns the given value to the SRCR. 184 \param [in] srcr SRCR value to set 185 */ 186 __ALWAYS_INLINE void __set_SRCR(uint32_t srcr) 187 { 188 __ASM volatile("mtcr %0, cr<31, 0>\n" : : "r"(srcr)); 189 } 190 #endif /* __SOFTRESET_PRESENT == 1U */ 191 192 #if (__MGU_PRESENT == 1U) 193 /** 194 \brief Get CCR 195 \details Returns the current value of the CCR. 196 \return CCR Register value 197 */ 198 __ALWAYS_INLINE uint32_t __get_CCR(void) 199 { 200 register uint32_t result; 201 202 __ASM volatile("mfcr %0, cr<18, 0>\n" : "=r"(result)); 203 return (result); 204 } 205 206 207 /** 208 \brief Set CCR 209 \details Assigns the given value to the CCR. 210 \param [in] ccr CCR value to set 211 */ 212 __ALWAYS_INLINE void __set_CCR(uint32_t ccr) 213 { 214 __ASM volatile("mtcr %0, cr<18, 0>\n" : : "r"(ccr)); 215 } 216 217 218 /** 219 \brief Get CAPR 220 \details Returns the current value of the CAPR. 221 \return CAPR Register value 222 */ 223 __ALWAYS_INLINE uint32_t __get_CAPR(void) 224 { 225 register uint32_t result; 226 227 __ASM volatile("mfcr %0, cr<19, 0>\n" : "=r"(result)); 228 return (result); 229 } 230 231 /** 232 \brief Set CAPR 233 \details Assigns the given value to the CAPR. 234 \param [in] capr CAPR value to set 235 */ 236 __ALWAYS_INLINE void __set_CAPR(uint32_t capr) 237 { 238 __ASM volatile("mtcr %0, cr<19, 0>\n" : : "r"(capr)); 239 } 240 241 242 /** 243 \brief Set PACR 244 \details Assigns the given value to the PACR. 245 246 \param [in] pacr PACR value to set 247 */ 248 __ALWAYS_INLINE void __set_PACR(uint32_t pacr) 249 { 250 __ASM volatile("mtcr %0, cr<20, 0>\n" : : "r"(pacr)); 251 } 252 253 254 /** 255 \brief Get PACR 256 \details Returns the current value of PACR. 257 \return PACR value 258 */ 259 __ALWAYS_INLINE uint32_t __get_PACR(void) 260 { 261 uint32_t result; 262 263 __ASM volatile("mfcr %0, cr<20, 0>" : "=r"(result)); 264 return (result); 265 } 266 267 /** 268 \brief Set PRSR 269 \details Assigns the given value to the PRSR. 270 271 \param [in] prsr PRSR value to set 272 */ 273 __ALWAYS_INLINE void __set_PRSR(uint32_t prsr) 274 { 275 __ASM volatile("mtcr %0, cr<21, 0>\n" : : "r"(prsr)); 276 } 277 278 /** 279 \brief Get PRSR 280 \details Returns the current value of PRSR. 281 \return PRSR value 282 */ 283 __ALWAYS_INLINE uint32_t __get_PRSR(void) 284 { 285 uint32_t result; 286 287 __ASM volatile("mfcr %0, cr<21, 0>" : "=r"(result)); 288 return (result); 289 } 290 #endif /* __MGU_PRESENT == 1U */ 291 292 /** 293 \brief Get user sp 294 \details Returns the current value of user r14. 295 \return UR14 value 296 */ 297 __ALWAYS_INLINE uint32_t __get_UR14(void) 298 { 299 uint32_t result; 300 301 __ASM volatile("mfcr %0, cr<14, 1>" : "=r"(result)); 302 return (result); 303 } 304 305 /** 306 \brief Enable interrupts and exceptions 307 \details Enables interrupts and exceptions by setting the IE-bit and EE-bit in the PSR. 308 Can only be executed in Privileged modes. 309 */ 310 __ALWAYS_INLINE void __enable_excp_irq(void) 311 { 312 __ASM volatile("psrset ee, ie"); 313 } 314 315 316 /** 317 \brief Disable interrupts and exceptions 318 \details Disables interrupts and exceptions by clearing the IE-bit and EE-bit in the PSR. 319 Can only be executed in Privileged modes. 320 */ 321 __ALWAYS_INLINE void __disable_excp_irq(void) 322 { 323 __ASM volatile("psrclr ee, ie"); 324 } 325 326 #if (__GSR_GCR_PRESENT == 1U) 327 /** 328 \brief Get GSR 329 \details Returns the content of the GSR Register. 330 \return GSR Register value 331 */ 332 __ALWAYS_INLINE uint32_t __get_GSR(void) 333 { 334 uint32_t result; 335 336 __ASM volatile("mfcr %0, cr<12, 0>" : "=r"(result)); 337 return (result); 338 } 339 340 /** 341 \brief Get GCR 342 \details Returns the content of the GCR Register. 343 \return GCR Register value 344 */ 345 __ALWAYS_INLINE uint32_t __get_GCR(void) 346 { 347 uint32_t result; 348 349 __ASM volatile("mfcr %0, cr<11, 0>" : "=r"(result)); 350 return (result); 351 } 352 353 /** 354 \brief Set GCR 355 \details Writes the given value to the GCR Register. 356 \param [in] gcr GCR Register value to set 357 */ 358 __ALWAYS_INLINE void __set_GCR(uint32_t gcr) 359 { 360 __ASM volatile("mtcr %0, cr<11, 0>" : : "r"(gcr)); 361 } 362 363 #endif /* (__GSR_GCR_PRESENT == 1U) */ 364 365 366 #endif /* _CSI_REG_H_ */ 367