1/*********************************************************************************** 2 * SEGGER Microcontroller GmbH * 3 * The Embedded Experts * 4 *********************************************************************************** 5 * * 6 * (c) 2014 - 2018 SEGGER Microcontroller GmbH * 7 * * 8 * www.segger.com Support: [email protected] * 9 * * 10 *********************************************************************************** 11 * * 12 * All rights reserved. * 13 * * 14 * Redistribution and use in source and binary forms, with or * 15 * without modification, are permitted provided that the following * 16 * conditions are met: * 17 * * 18 * - Redistributions of source code must retain the above copyright * 19 * notice, this list of conditions and the following disclaimer. * 20 * * 21 * - Neither the name of SEGGER Microcontroller GmbH * 22 * nor the names of its contributors may be used to endorse or * 23 * promote products derived from this software without specific * 24 * prior written permission. * 25 * * 26 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND * 27 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, * 28 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF * 29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * 30 * DISCLAIMED. * 31 * IN NO EVENT SHALL SEGGER Microcontroller GmbH BE LIABLE FOR * 32 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR * 33 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT * 34 * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; * 35 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF * 36 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE * 38 * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH * 39 * DAMAGE. * 40 * * 41 ***********************************************************************************/ 42 43/************************************************************************************ 44 * Preprocessor Definitions * 45 * ------------------------ * 46 * VECTORS_IN_RAM * 47 * * 48 * If defined, an area of RAM will large enough to store the vector table * 49 * will be reserved. * 50 * * 51 ************************************************************************************/ 52 53 .syntax unified 54 .code 16 55 56 .section .init, "ax" 57 .align 0 58 59/************************************************************************************ 60 * Default Exception Handlers * 61 ************************************************************************************/ 62 63 64 .thumb_func 65 .weak NMI_Handler 66NMI_Handler: 67 b . 68 69 .thumb_func 70 .weak HardFault_Handler 71HardFault_Handler: 72 b . 73 74 .thumb_func 75 .weak MemoryManagement_Handler 76MemoryManagement_Handler: 77 b . 78 79 .thumb_func 80 .weak BusFault_Handler 81BusFault_Handler: 82 b . 83 84 .thumb_func 85 .weak UsageFault_Handler 86UsageFault_Handler: 87 b . 88 89 .thumb_func 90 .weak SecureFault_Handler 91SecureFault_Handler: 92 b . 93 94 .thumb_func 95 .weak SVC_Handler 96SVC_Handler: 97 b . 98 99 .thumb_func 100 .weak DebugMon_Handler 101DebugMon_Handler: 102 b . 103 104 .thumb_func 105 .weak PendSV_Handler 106PendSV_Handler: 107 b . 108 109 .thumb_func 110 .weak SysTick_Handler 111SysTick_Handler: 112 b . 113 114 .thumb_func 115 .weak Dummy_Handler 116Dummy_Handler: 117 b . 118 119/************************************************************************************ 120 * Default Interrupt Handlers * 121 ************************************************************************************/ 122 123.weak SPU_IRQHandler 124.thumb_set SPU_IRQHandler, Dummy_Handler 125 126.weak CLOCK_POWER_IRQHandler 127.thumb_set CLOCK_POWER_IRQHandler, Dummy_Handler 128 129.weak UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler 130.thumb_set UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler, Dummy_Handler 131 132.weak UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler 133.thumb_set UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler, Dummy_Handler 134 135.weak UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler 136.thumb_set UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler, Dummy_Handler 137 138.weak UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler 139.thumb_set UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler, Dummy_Handler 140 141.weak GPIOTE0_IRQHandler 142.thumb_set GPIOTE0_IRQHandler, Dummy_Handler 143 144.weak SAADC_IRQHandler 145.thumb_set SAADC_IRQHandler, Dummy_Handler 146 147.weak TIMER0_IRQHandler 148.thumb_set TIMER0_IRQHandler, Dummy_Handler 149 150.weak TIMER1_IRQHandler 151.thumb_set TIMER1_IRQHandler, Dummy_Handler 152 153.weak TIMER2_IRQHandler 154.thumb_set TIMER2_IRQHandler, Dummy_Handler 155 156.weak RTC0_IRQHandler 157.thumb_set RTC0_IRQHandler, Dummy_Handler 158 159.weak RTC1_IRQHandler 160.thumb_set RTC1_IRQHandler, Dummy_Handler 161 162.weak WDT_IRQHandler 163.thumb_set WDT_IRQHandler, Dummy_Handler 164 165.weak EGU0_IRQHandler 166.thumb_set EGU0_IRQHandler, Dummy_Handler 167 168.weak EGU1_IRQHandler 169.thumb_set EGU1_IRQHandler, Dummy_Handler 170 171.weak EGU2_IRQHandler 172.thumb_set EGU2_IRQHandler, Dummy_Handler 173 174.weak EGU3_IRQHandler 175.thumb_set EGU3_IRQHandler, Dummy_Handler 176 177.weak EGU4_IRQHandler 178.thumb_set EGU4_IRQHandler, Dummy_Handler 179 180.weak EGU5_IRQHandler 181.thumb_set EGU5_IRQHandler, Dummy_Handler 182 183.weak PWM0_IRQHandler 184.thumb_set PWM0_IRQHandler, Dummy_Handler 185 186.weak PWM1_IRQHandler 187.thumb_set PWM1_IRQHandler, Dummy_Handler 188 189.weak PWM2_IRQHandler 190.thumb_set PWM2_IRQHandler, Dummy_Handler 191 192.weak PWM3_IRQHandler 193.thumb_set PWM3_IRQHandler, Dummy_Handler 194 195.weak PDM_IRQHandler 196.thumb_set PDM_IRQHandler, Dummy_Handler 197 198.weak I2S_IRQHandler 199.thumb_set I2S_IRQHandler, Dummy_Handler 200 201.weak IPC_IRQHandler 202.thumb_set IPC_IRQHandler, Dummy_Handler 203 204.weak FPU_IRQHandler 205.thumb_set FPU_IRQHandler, Dummy_Handler 206 207.weak GPIOTE1_IRQHandler 208.thumb_set GPIOTE1_IRQHandler, Dummy_Handler 209 210.weak KMU_IRQHandler 211.thumb_set KMU_IRQHandler, Dummy_Handler 212 213.weak CRYPTOCELL_IRQHandler 214.thumb_set CRYPTOCELL_IRQHandler, Dummy_Handler 215 216/************************************************************************************ 217 * Reset Handler Extensions * 218 ************************************************************************************/ 219 220 .extern Reset_Handler 221 .global nRFInitialize 222 223 .thumb_func 224nRFInitialize: 225 bx lr 226 227 228/************************************************************************************ 229 * Vector Table * 230 ************************************************************************************/ 231 232 .section .vectors, "ax" 233 .align 0 234 .global _vectors 235 .extern __stack_end__ 236 237_vectors: 238 .word __stack_end__ 239 .word Reset_Handler 240 .word NMI_Handler 241 .word HardFault_Handler 242 .word MemoryManagement_Handler 243 .word BusFault_Handler 244 .word UsageFault_Handler 245 .word SecureFault_Handler 246 .word 0 /*Reserved */ 247 .word 0 /*Reserved */ 248 .word 0 /*Reserved */ 249 .word SVC_Handler 250 .word DebugMon_Handler 251 .word 0 /*Reserved */ 252 .word PendSV_Handler 253 .word SysTick_Handler 254 255/* External Interrupts */ 256 .word 0 /*Reserved */ 257 .word 0 /*Reserved */ 258 .word 0 /*Reserved */ 259 .word SPU_IRQHandler 260 .word 0 /*Reserved */ 261 .word CLOCK_POWER_IRQHandler 262 .word 0 /*Reserved */ 263 .word 0 /*Reserved */ 264 .word UARTE0_SPIM0_SPIS0_TWIM0_TWIS0_IRQHandler 265 .word UARTE1_SPIM1_SPIS1_TWIM1_TWIS1_IRQHandler 266 .word UARTE2_SPIM2_SPIS2_TWIM2_TWIS2_IRQHandler 267 .word UARTE3_SPIM3_SPIS3_TWIM3_TWIS3_IRQHandler 268 .word 0 /*Reserved */ 269 .word GPIOTE0_IRQHandler 270 .word SAADC_IRQHandler 271 .word TIMER0_IRQHandler 272 .word TIMER1_IRQHandler 273 .word TIMER2_IRQHandler 274 .word 0 /*Reserved */ 275 .word 0 /*Reserved */ 276 .word RTC0_IRQHandler 277 .word RTC1_IRQHandler 278 .word 0 /*Reserved */ 279 .word 0 /*Reserved */ 280 .word WDT_IRQHandler 281 .word 0 /*Reserved */ 282 .word 0 /*Reserved */ 283 .word EGU0_IRQHandler 284 .word EGU1_IRQHandler 285 .word EGU2_IRQHandler 286 .word EGU3_IRQHandler 287 .word EGU4_IRQHandler 288 .word EGU5_IRQHandler 289 .word PWM0_IRQHandler 290 .word PWM1_IRQHandler 291 .word PWM2_IRQHandler 292 .word PWM3_IRQHandler 293 .word 0 /*Reserved */ 294 .word PDM_IRQHandler 295 .word 0 /*Reserved */ 296 .word I2S_IRQHandler 297 .word 0 /*Reserved */ 298 .word IPC_IRQHandler 299 .word 0 /*Reserved */ 300 .word FPU_IRQHandler 301 .word 0 /*Reserved */ 302 .word 0 /*Reserved */ 303 .word 0 /*Reserved */ 304 .word 0 /*Reserved */ 305 .word GPIOTE1_IRQHandler 306 .word 0 /*Reserved */ 307 .word 0 /*Reserved */ 308 .word 0 /*Reserved */ 309 .word 0 /*Reserved */ 310 .word 0 /*Reserved */ 311 .word 0 /*Reserved */ 312 .word 0 /*Reserved */ 313 .word KMU_IRQHandler 314 .word 0 /*Reserved */ 315 .word 0 /*Reserved */ 316 .word 0 /*Reserved */ 317 .word 0 /*Reserved */ 318 .word 0 /*Reserved */ 319 .word 0 /*Reserved */ 320 .word CRYPTOCELL_IRQHandler 321 .word 0 /*Reserved */ 322 .word 0 /*Reserved */ 323 .word 0 /*Reserved */ 324 .word 0 /*Reserved */ 325 .word 0 /*Reserved */ 326 .word 0 /*Reserved */ 327 .word 0 /*Reserved */ 328 .word 0 /*Reserved */ 329 .word 0 /*Reserved */ 330 .word 0 /*Reserved */ 331 .word 0 /*Reserved */ 332 .word 0 /*Reserved */ 333 .word 0 /*Reserved */ 334 .word 0 /*Reserved */ 335 .word 0 /*Reserved */ 336 .word 0 /*Reserved */ 337 .word 0 /*Reserved */ 338 .word 0 /*Reserved */ 339 .word 0 /*Reserved */ 340 .word 0 /*Reserved */ 341 .word 0 /*Reserved */ 342 .word 0 /*Reserved */ 343 .word 0 /*Reserved */ 344 .word 0 /*Reserved */ 345 .word 0 /*Reserved */ 346 .word 0 /*Reserved */ 347 .word 0 /*Reserved */ 348 .word 0 /*Reserved */ 349 .word 0 /*Reserved */ 350 .word 0 /*Reserved */ 351 .word 0 /*Reserved */ 352 .word 0 /*Reserved */ 353 .word 0 /*Reserved */ 354 .word 0 /*Reserved */ 355 .word 0 /*Reserved */ 356 .word 0 /*Reserved */ 357 .word 0 /*Reserved */ 358 .word 0 /*Reserved */ 359 .word 0 /*Reserved */ 360 .word 0 /*Reserved */ 361 .word 0 /*Reserved */ 362 .word 0 /*Reserved */ 363 .word 0 /*Reserved */ 364 .word 0 /*Reserved */ 365 .word 0 /*Reserved */ 366 .word 0 /*Reserved */ 367 .word 0 /*Reserved */ 368 .word 0 /*Reserved */ 369 .word 0 /*Reserved */ 370 .word 0 /*Reserved */ 371 .word 0 /*Reserved */ 372 .word 0 /*Reserved */ 373 .word 0 /*Reserved */ 374 .word 0 /*Reserved */ 375 .word 0 /*Reserved */ 376 .word 0 /*Reserved */ 377 .word 0 /*Reserved */ 378 .word 0 /*Reserved */ 379 .word 0 /*Reserved */ 380 .word 0 /*Reserved */ 381 .word 0 /*Reserved */ 382 .word 0 /*Reserved */ 383 .word 0 /*Reserved */ 384 .word 0 /*Reserved */ 385 .word 0 /*Reserved */ 386 .word 0 /*Reserved */ 387 .word 0 /*Reserved */ 388 .word 0 /*Reserved */ 389 .word 0 /*Reserved */ 390 .word 0 /*Reserved */ 391 .word 0 /*Reserved */ 392 .word 0 /*Reserved */ 393 .word 0 /*Reserved */ 394 .word 0 /*Reserved */ 395 .word 0 /*Reserved */ 396 .word 0 /*Reserved */ 397 .word 0 /*Reserved */ 398 .word 0 /*Reserved */ 399 .word 0 /*Reserved */ 400 .word 0 /*Reserved */ 401 .word 0 /*Reserved */ 402 .word 0 /*Reserved */ 403 .word 0 /*Reserved */ 404 .word 0 /*Reserved */ 405 .word 0 /*Reserved */ 406 .word 0 /*Reserved */ 407 .word 0 /*Reserved */ 408 .word 0 /*Reserved */ 409 .word 0 /*Reserved */ 410 .word 0 /*Reserved */ 411 .word 0 /*Reserved */ 412 .word 0 /*Reserved */ 413 .word 0 /*Reserved */ 414 .word 0 /*Reserved */ 415 .word 0 /*Reserved */ 416 .word 0 /*Reserved */ 417 .word 0 /*Reserved */ 418 .word 0 /*Reserved */ 419 .word 0 /*Reserved */ 420 .word 0 /*Reserved */ 421 .word 0 /*Reserved */ 422 .word 0 /*Reserved */ 423 .word 0 /*Reserved */ 424 .word 0 /*Reserved */ 425 .word 0 /*Reserved */ 426 .word 0 /*Reserved */ 427 .word 0 /*Reserved */ 428 .word 0 /*Reserved */ 429 .word 0 /*Reserved */ 430 .word 0 /*Reserved */ 431 .word 0 /*Reserved */ 432 .word 0 /*Reserved */ 433 .word 0 /*Reserved */ 434 .word 0 /*Reserved */ 435 .word 0 /*Reserved */ 436 .word 0 /*Reserved */ 437 .word 0 /*Reserved */ 438 .word 0 /*Reserved */ 439 .word 0 /*Reserved */ 440 .word 0 /*Reserved */ 441 .word 0 /*Reserved */ 442 .word 0 /*Reserved */ 443 .word 0 /*Reserved */ 444 .word 0 /*Reserved */ 445 .word 0 /*Reserved */ 446 .word 0 /*Reserved */ 447 .word 0 /*Reserved */ 448 .word 0 /*Reserved */ 449 .word 0 /*Reserved */ 450 .word 0 /*Reserved */ 451 .word 0 /*Reserved */ 452 .word 0 /*Reserved */ 453 .word 0 /*Reserved */ 454 .word 0 /*Reserved */ 455 .word 0 /*Reserved */ 456 .word 0 /*Reserved */ 457 .word 0 /*Reserved */ 458 .word 0 /*Reserved */ 459 .word 0 /*Reserved */ 460 .word 0 /*Reserved */ 461 .word 0 /*Reserved */ 462 .word 0 /*Reserved */ 463 .word 0 /*Reserved */ 464 .word 0 /*Reserved */ 465 .word 0 /*Reserved */ 466 .word 0 /*Reserved */ 467 .word 0 /*Reserved */ 468 .word 0 /*Reserved */ 469 .word 0 /*Reserved */ 470 .word 0 /*Reserved */ 471 .word 0 /*Reserved */ 472 .word 0 /*Reserved */ 473 .word 0 /*Reserved */ 474 .word 0 /*Reserved */ 475 .word 0 /*Reserved */ 476 .word 0 /*Reserved */ 477 .word 0 /*Reserved */ 478 .word 0 /*Reserved */ 479 .word 0 /*Reserved */ 480 .word 0 /*Reserved */ 481 .word 0 /*Reserved */ 482 .word 0 /*Reserved */ 483 .word 0 /*Reserved */ 484 .word 0 /*Reserved */ 485 .word 0 /*Reserved */ 486 .word 0 /*Reserved */ 487 .word 0 /*Reserved */ 488 .word 0 /*Reserved */ 489 .word 0 /*Reserved */ 490 .word 0 /*Reserved */ 491 .word 0 /*Reserved */ 492 .word 0 /*Reserved */ 493 .word 0 /*Reserved */ 494 .word 0 /*Reserved */ 495 .word 0 /*Reserved */ 496_vectors_end: 497 498#ifdef VECTORS_IN_RAM 499 .section .vectors_ram, "ax" 500 .align 0 501 .global _vectors_ram 502 503_vectors_ram: 504 .space _vectors_end - _vectors, 0 505#endif 506