1 /* 2 * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, this 9 * list of conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * 3. Neither the name of the copyright holder nor the names of its 16 * contributors may be used to endorse or promote products derived from this 17 * software without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 23 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #ifndef NRF_TWIS_H__ 33 #define NRF_TWIS_H__ 34 35 #include <nrfx.h> 36 37 #ifdef __cplusplus 38 extern "C" { 39 #endif 40 41 /** 42 * @defgroup nrf_twis_hal TWIS HAL 43 * @{ 44 * @ingroup nrf_twis 45 * @brief Hardware access layer for managing the Two Wire Interface Slave with EasyDMA 46 * (TWIS) peripheral. 47 */ 48 49 /** 50 * @brief TWIS tasks 51 */ 52 typedef enum 53 { 54 /*lint -save -e30*/ 55 NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */ 56 NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */ 57 NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */ 58 NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */ 59 NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */ 60 /*lint -restore*/ 61 } nrf_twis_task_t; 62 63 /** 64 * @brief TWIS events 65 */ 66 typedef enum 67 { 68 /*lint -save -e30*/ 69 NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */ 70 NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */ 71 NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */ 72 NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */ 73 NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */ 74 NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */ 75 /*lint -restore*/ 76 } nrf_twis_event_t; 77 78 /** 79 * @brief TWIS shortcuts 80 */ 81 typedef enum 82 { 83 NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */ 84 NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */ 85 } nrf_twis_short_mask_t; 86 87 /** 88 * @brief TWIS interrupts 89 */ 90 typedef enum 91 { 92 NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */ 93 NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */ 94 NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */ 95 NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */ 96 NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */ 97 NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */ 98 } nrf_twis_int_mask_t; 99 100 /** 101 * @brief TWIS error source 102 */ 103 typedef enum 104 { 105 NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */ 106 NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */ 107 NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */ 108 } nrf_twis_error_t; 109 110 /** 111 * @brief TWIS address matching configuration 112 */ 113 typedef enum 114 { 115 NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */ 116 NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */ 117 NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */ 118 } nrf_twis_config_addr_mask_t; 119 120 /** 121 * @brief Variable type to hold amount of data for EasyDMA 122 * 123 * Variable of the minimum size that can hold the amount of data to transfer. 124 * 125 * @note 126 * Defined to make it simple to change if EasyDMA would be updated to support more data in 127 * the future devices to. 128 */ 129 typedef uint8_t nrf_twis_amount_t; 130 131 /** 132 * @brief Smallest variable type to hold TWI address 133 * 134 * Variable of the minimum size that can hold single TWI address. 135 * 136 * @note 137 * Defined to make it simple to change if new TWI would support for example 138 * 10 bit addressing mode. 139 */ 140 typedef uint8_t nrf_twis_address_t; 141 142 143 /** 144 * @brief Function for activating a specific TWIS task. 145 * 146 * @param[in] p_reg Pointer to the peripheral registers structure. 147 * @param task Task. 148 */ 149 __STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task); 150 151 /** 152 * @brief Function for returning the address of a specific TWIS task register. 153 * 154 * @param[in] p_reg Pointer to the peripheral registers structure. 155 * @param task Task. 156 * 157 * @return Task address. 158 */ 159 __STATIC_INLINE uint32_t nrf_twis_task_address_get( 160 NRF_TWIS_Type const * const p_reg, 161 nrf_twis_task_t task); 162 163 /** 164 * @brief Function for clearing a specific event. 165 * 166 * @param[in] p_reg Pointer to the peripheral registers structure. 167 * @param event Event. 168 */ 169 __STATIC_INLINE void nrf_twis_event_clear( 170 NRF_TWIS_Type * const p_reg, 171 nrf_twis_event_t event); 172 /** 173 * @brief Function for returning the state of a specific event. 174 * 175 * @param[in] p_reg Pointer to the peripheral registers structure. 176 * @param event Event. 177 * 178 * @retval true If the event is set. 179 * @retval false If the event is not set. 180 */ 181 __STATIC_INLINE bool nrf_twis_event_check( 182 NRF_TWIS_Type const * const p_reg, 183 nrf_twis_event_t event); 184 185 186 /** 187 * @brief Function for getting and clearing the state of specific event 188 * 189 * This function checks the state of the event and clears it. 190 * @param[in,out] p_reg Pointer to the peripheral registers structure. 191 * @param event Event. 192 * 193 * @retval true If the event was set. 194 * @retval false If the event was not set. 195 */ 196 __STATIC_INLINE bool nrf_twis_event_get_and_clear( 197 NRF_TWIS_Type * const p_reg, 198 nrf_twis_event_t event); 199 200 201 /** 202 * @brief Function for returning the address of a specific TWIS event register. 203 * 204 * @param[in] p_reg Pointer to the peripheral registers structure. 205 * @param event Event. 206 * 207 * @return Address. 208 */ 209 __STATIC_INLINE uint32_t nrf_twis_event_address_get( 210 NRF_TWIS_Type const * const p_reg, 211 nrf_twis_event_t event); 212 213 /** 214 * @brief Function for setting a shortcut. 215 * 216 * @param[in] p_reg Pointer to the peripheral registers structure. 217 * @param short_mask Shortcuts mask. 218 */ 219 __STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); 220 221 /** 222 * @brief Function for clearing shortcuts. 223 * 224 * @param[in] p_reg Pointer to the peripheral registers structure. 225 * @param short_mask Shortcuts mask. 226 */ 227 __STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask); 228 229 /** 230 * @brief Get the shorts mask 231 * 232 * Function returns shorts register. 233 * @param[in] p_reg Pointer to the peripheral registers structure. 234 * @return Flags of currently enabled shortcuts 235 */ 236 __STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg); 237 238 /** 239 * @brief Function for enabling selected interrupts. 240 * 241 * @param[in] p_reg Pointer to the peripheral registers structure. 242 * @param int_mask Interrupts mask. 243 */ 244 __STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); 245 246 /** 247 * @brief Function for retrieving the state of selected interrupts. 248 * 249 * @param[in] p_reg Pointer to the peripheral registers structure. 250 * @param int_mask Interrupts mask. 251 * 252 * @retval true If any of selected interrupts is enabled. 253 * @retval false If none of selected interrupts is enabled. 254 */ 255 __STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask); 256 257 /** 258 * @brief Function for disabling selected interrupts. 259 * 260 * @param[in] p_reg Pointer to the peripheral registers structure. 261 * @param int_mask Interrupts mask. 262 */ 263 __STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask); 264 265 #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) 266 /** 267 * @brief Function for setting the subscribe configuration for a given 268 * TWIS task. 269 * 270 * @param[in] p_reg Pointer to the structure of registers of the peripheral. 271 * @param[in] task Task for which to set the configuration. 272 * @param[in] channel Channel through which to subscribe events. 273 */ 274 __STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg, 275 nrf_twis_task_t task, 276 uint8_t channel); 277 278 /** 279 * @brief Function for clearing the subscribe configuration for a given 280 * TWIS task. 281 * 282 * @param[in] p_reg Pointer to the structure of registers of the peripheral. 283 * @param[in] task Task for which to clear the configuration. 284 */ 285 __STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, 286 nrf_twis_task_t task); 287 288 /** 289 * @brief Function for setting the publish configuration for a given 290 * TWIS event. 291 * 292 * @param[in] p_reg Pointer to the structure of registers of the peripheral. 293 * @param[in] event Event for which to set the configuration. 294 * @param[in] channel Channel through which to publish the event. 295 */ 296 __STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg, 297 nrf_twis_event_t event, 298 uint8_t channel); 299 300 /** 301 * @brief Function for clearing the publish configuration for a given 302 * TWIS event. 303 * 304 * @param[in] p_reg Pointer to the structure of registers of the peripheral. 305 * @param[in] event Event for which to clear the configuration. 306 */ 307 __STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, 308 nrf_twis_event_t event); 309 #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__) 310 311 /** 312 * @brief Function for retrieving and clearing the TWIS error source. 313 * 314 * @attention Error sources are cleared after read. 315 * @param[in] p_reg Pointer to the peripheral registers structure. 316 * @return Error source mask with values from @ref nrf_twis_error_t. 317 */ 318 __STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg); 319 320 /** 321 * @brief Get information which of addresses matched 322 * 323 * Function returns index in the address table 324 * that points to the address that already matched. 325 * @param[in] p_reg Pointer to the peripheral registers structure. 326 * @return Index of matched address 327 */ 328 __STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg); 329 330 /** 331 * @brief Function for enabling TWIS. 332 * 333 * @param[in] p_reg Pointer to the peripheral registers structure. 334 */ 335 __STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg); 336 337 /** 338 * @brief Function for disabling TWIS. 339 * 340 * @param[in] p_reg Pointer to the peripheral registers structure. 341 */ 342 __STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg); 343 344 /** 345 * @brief Function for configuring TWIS pins. 346 * 347 * @param[in] p_reg Pointer to the peripheral registers structure. 348 * @param scl SCL pin number. 349 * @param sda SDA pin number. 350 */ 351 __STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda); 352 353 /** 354 * @brief Function for setting the receive buffer. 355 * 356 * @param[in] p_reg Pointer to the peripheral registers structure. 357 * @param p_buf Pointer to the buffer for received data. 358 * @param length Maximum number of data bytes to receive. 359 */ 360 __STATIC_INLINE void nrf_twis_rx_buffer_set( 361 NRF_TWIS_Type * const p_reg, 362 uint8_t * p_buf, 363 nrf_twis_amount_t length); 364 365 /** 366 * @brief Function that prepares TWIS for receiving 367 * 368 * This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task. 369 * @param[in] p_reg Pointer to the peripheral registers structure. 370 * @param p_buf Pointer to the buffer for received data. 371 * @param length Maximum number of data bytes to receive. 372 */ 373 __STATIC_INLINE void nrf_twis_rx_prepare( 374 NRF_TWIS_Type * const p_reg, 375 uint8_t * p_buf, 376 nrf_twis_amount_t length); 377 378 /** 379 * @brief Function for getting number of bytes received in the last transaction. 380 * 381 * @param[in] p_reg TWIS instance. 382 * @return Amount of bytes received. 383 * */ 384 __STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg); 385 386 /** 387 * @brief Function for setting the transmit buffer. 388 * 389 * @param[in] p_reg Pointer to the peripheral registers structure. 390 * @param p_buf Pointer to the buffer with data to send. 391 * @param length Maximum number of data bytes to transmit. 392 */ 393 __STATIC_INLINE void nrf_twis_tx_buffer_set( 394 NRF_TWIS_Type * const p_reg, 395 uint8_t const * p_buf, 396 nrf_twis_amount_t length); 397 398 /** 399 * @brief Function that prepares TWIS for transmitting 400 * 401 * This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task. 402 * @param[in] p_reg Pointer to the peripheral registers structure. 403 * @param p_buf Pointer to the buffer with data to send. 404 * @param length Maximum number of data bytes to transmit. 405 */ 406 __STATIC_INLINE void nrf_twis_tx_prepare( 407 NRF_TWIS_Type * const p_reg, 408 uint8_t const * p_buf, 409 nrf_twis_amount_t length); 410 411 /** 412 * @brief Function for getting number of bytes transmitted in the last transaction. 413 * 414 * @param[in] p_reg Pointer to the peripheral registers structure. 415 * @return Amount of bytes transmitted. 416 */ 417 __STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg); 418 419 /** 420 * @brief Function for setting slave address 421 * 422 * Function sets the selected address for this TWI interface. 423 * @param[in] p_reg Pointer to the peripheral registers structure. 424 * @param n Index of address to set 425 * @param addr Addres to set 426 * @sa nrf_twis_config_address_set 427 * @sa nrf_twis_config_address_get 428 */ 429 __STATIC_INLINE void nrf_twis_address_set( 430 NRF_TWIS_Type * const p_reg, 431 uint_fast8_t n, 432 nrf_twis_address_t addr); 433 434 /** 435 * @brief Function for retrieving configured slave address 436 * 437 * Function gets the selected address for this TWI interface. 438 * @param[in] p_reg Pointer to the peripheral registers structure. 439 * @param n Index of address to get 440 */ 441 __STATIC_INLINE nrf_twis_address_t nrf_twis_address_get( 442 NRF_TWIS_Type const * const p_reg, 443 uint_fast8_t n); 444 445 /** 446 * @brief Function for setting the device address configuration. 447 * 448 * @param[in] p_reg Pointer to the peripheral registers structure. 449 * @param addr_mask Mask of address indexes of what device should answer to. 450 * 451 * @sa nrf_twis_address_set 452 */ 453 __STATIC_INLINE void nrf_twis_config_address_set( 454 NRF_TWIS_Type * const p_reg, 455 nrf_twis_config_addr_mask_t addr_mask); 456 457 /** 458 * @brief Function for retrieving the device address configuration. 459 * 460 * @param[in] p_reg Pointer to the peripheral registers structure. 461 * 462 * @return Mask of address indexes of what device should answer to. 463 */ 464 __STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get( 465 NRF_TWIS_Type const * const p_reg); 466 467 /** 468 * @brief Function for setting the over-read character. 469 * 470 * @param[in] p_reg Pointer to the peripheral registers structure. 471 * @param[in] orc Over-read character. Character clocked out in case of 472 * over-read of the TXD buffer. 473 */ 474 __STATIC_INLINE void nrf_twis_orc_set( 475 NRF_TWIS_Type * const p_reg, 476 uint8_t orc); 477 478 /** 479 * @brief Function for setting the over-read character. 480 * 481 * @param[in] p_reg Pointer to the peripheral registers structure. 482 * 483 * @return Over-read character configured for selected instance. 484 */ 485 __STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg); 486 487 488 /** @} */ /* End of nrf_twis_hal */ 489 490 #ifndef SUPPRESS_INLINE_IMPLEMENTATION 491 492 /* ------------------------------------------------------------------------------------------------ 493 * Internal functions 494 */ 495 496 /** 497 * @internal 498 * @brief Internal function for getting task/event register address 499 * 500 * @param[in] p_reg Pointer to the peripheral registers structure. 501 * @oaram offset Offset of the register from the instance beginning 502 * 503 * @attention offset has to be modulo 4 value. In other case we can get hardware fault. 504 * @return Pointer to the register 505 */ 506 __STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset) 507 { 508 return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); 509 } 510 511 /** 512 * @internal 513 * @brief Internal function for getting task/event register address - constant version 514 * 515 * @param[in] p_reg Pointer to the peripheral registers structure. 516 * @oaram offset Offset of the register from the instance beginning 517 * 518 * @attention offset has to be modulo 4 value. In other case we can get hardware fault. 519 * @return Pointer to the register 520 */ 521 __STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset) 522 { 523 return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset); 524 } 525 526 527 /* ------------------------------------------------------------------------------------------------ 528 * Interface functions definitions 529 */ 530 531 532 void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task) 533 { 534 *(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL; 535 } 536 537 uint32_t nrf_twis_task_address_get( 538 NRF_TWIS_Type const * const p_reg, 539 nrf_twis_task_t task) 540 { 541 return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task); 542 } 543 544 void nrf_twis_event_clear( 545 NRF_TWIS_Type * const p_reg, 546 nrf_twis_event_t event) 547 { 548 *(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL; 549 #if __CORTEX_M == 0x04 550 volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)); 551 (void)dummy; 552 #endif 553 } 554 555 bool nrf_twis_event_check( 556 NRF_TWIS_Type const * const p_reg, 557 nrf_twis_event_t event) 558 { 559 return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); 560 } 561 562 bool nrf_twis_event_get_and_clear( 563 NRF_TWIS_Type * const p_reg, 564 nrf_twis_event_t event) 565 { 566 bool ret = nrf_twis_event_check(p_reg, event); 567 if (ret) 568 { 569 nrf_twis_event_clear(p_reg, event); 570 } 571 return ret; 572 } 573 574 uint32_t nrf_twis_event_address_get( 575 NRF_TWIS_Type const * const p_reg, 576 nrf_twis_event_t event) 577 { 578 return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event); 579 } 580 581 void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) 582 { 583 p_reg->SHORTS |= short_mask; 584 } 585 586 void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask) 587 { 588 if (~0U == short_mask) 589 { 590 /* Optimized version for "disable all" */ 591 p_reg->SHORTS = 0; 592 } 593 else 594 { 595 p_reg->SHORTS &= ~short_mask; 596 } 597 } 598 599 uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg) 600 { 601 return p_reg->SHORTS; 602 } 603 604 void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) 605 { 606 p_reg->INTENSET = int_mask; 607 } 608 609 bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask) 610 { 611 return (bool)(p_reg->INTENSET & int_mask); 612 } 613 614 void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask) 615 { 616 p_reg->INTENCLR = int_mask; 617 } 618 619 #if defined(DPPI_PRESENT) 620 __STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg, 621 nrf_twis_task_t task, 622 uint8_t channel) 623 { 624 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 625 ((uint32_t)channel | TWIS_SUBSCRIBE_STOP_EN_Msk); 626 } 627 628 __STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg, 629 nrf_twis_task_t task) 630 { 631 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0; 632 } 633 634 __STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg, 635 nrf_twis_event_t event, 636 uint8_t channel) 637 { 638 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 639 ((uint32_t)channel | TWIS_PUBLISH_STOPPED_EN_Msk); 640 } 641 642 __STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg, 643 nrf_twis_event_t event) 644 { 645 *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0; 646 } 647 #endif // defined(DPPI_PRESENT) 648 649 uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg) 650 { 651 uint32_t ret = p_reg->ERRORSRC; 652 p_reg->ERRORSRC = ret; 653 return ret; 654 } 655 656 uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg) 657 { 658 return (uint_fast8_t)p_reg->MATCH; 659 } 660 661 void nrf_twis_enable(NRF_TWIS_Type * const p_reg) 662 { 663 p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos); 664 } 665 666 void nrf_twis_disable(NRF_TWIS_Type * const p_reg) 667 { 668 p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos); 669 } 670 671 void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda) 672 { 673 p_reg->PSEL.SCL = scl; 674 p_reg->PSEL.SDA = sda; 675 } 676 677 void nrf_twis_rx_buffer_set( 678 NRF_TWIS_Type * const p_reg, 679 uint8_t * p_buf, 680 nrf_twis_amount_t length) 681 { 682 p_reg->RXD.PTR = (uint32_t)p_buf; 683 p_reg->RXD.MAXCNT = length; 684 } 685 686 __STATIC_INLINE void nrf_twis_rx_prepare( 687 NRF_TWIS_Type * const p_reg, 688 uint8_t * p_buf, 689 nrf_twis_amount_t length) 690 { 691 nrf_twis_rx_buffer_set(p_reg, p_buf, length); 692 nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX); 693 } 694 695 nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg) 696 { 697 return (nrf_twis_amount_t)p_reg->RXD.AMOUNT; 698 } 699 700 void nrf_twis_tx_buffer_set( 701 NRF_TWIS_Type * const p_reg, 702 uint8_t const * p_buf, 703 nrf_twis_amount_t length) 704 { 705 p_reg->TXD.PTR = (uint32_t)p_buf; 706 p_reg->TXD.MAXCNT = length; 707 } 708 709 __STATIC_INLINE void nrf_twis_tx_prepare( 710 NRF_TWIS_Type * const p_reg, 711 uint8_t const * p_buf, 712 nrf_twis_amount_t length) 713 { 714 nrf_twis_tx_buffer_set(p_reg, p_buf, length); 715 nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX); 716 } 717 718 nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg) 719 { 720 return (nrf_twis_amount_t)p_reg->TXD.AMOUNT; 721 } 722 723 void nrf_twis_address_set( 724 NRF_TWIS_Type * const p_reg, 725 uint_fast8_t n, 726 nrf_twis_address_t addr) 727 { 728 p_reg->ADDRESS[n] = addr; 729 } 730 731 nrf_twis_address_t nrf_twis_address_get( 732 NRF_TWIS_Type const * const p_reg, 733 uint_fast8_t n) 734 { 735 return (nrf_twis_address_t)p_reg->ADDRESS[n]; 736 } 737 void nrf_twis_config_address_set( 738 NRF_TWIS_Type * const p_reg, 739 nrf_twis_config_addr_mask_t addr_mask) 740 { 741 /* This is the only configuration in TWIS - just write it without masking */ 742 p_reg->CONFIG = addr_mask; 743 } 744 745 nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg) 746 { 747 return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk); 748 } 749 750 void nrf_twis_orc_set( 751 NRF_TWIS_Type * const p_reg, 752 uint8_t orc) 753 { 754 p_reg->ORC = orc; 755 } 756 757 uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg) 758 { 759 return (uint8_t)p_reg->ORC; 760 } 761 762 #endif /* SUPPRESS_INLINE_IMPLEMENTATION */ 763 764 765 #ifdef __cplusplus 766 } 767 #endif 768 769 #endif /* NRF_TWIS_H__ */ 770