xref: /btstack/port/stm32-wb55xx-nucleo-freertos/Src/main.c (revision 2fca4dad957cd7b88f4657ed51e89c12615dda72)
10561b2d8STREFOU Felix /*
20561b2d8STREFOU Felix  * Copyright (C) 2019 BlueKitchen GmbH
30561b2d8STREFOU Felix  *
40561b2d8STREFOU Felix  * Redistribution and use in source and binary forms, with or without
50561b2d8STREFOU Felix  * modification, are permitted provided that the following conditions
60561b2d8STREFOU Felix  * are met:
70561b2d8STREFOU Felix  *
80561b2d8STREFOU Felix  * 1. Redistributions of source code must retain the above copyright
90561b2d8STREFOU Felix  *    notice, this list of conditions and the following disclaimer.
100561b2d8STREFOU Felix  * 2. Redistributions in binary form must reproduce the above copyright
110561b2d8STREFOU Felix  *    notice, this list of conditions and the following disclaimer in the
120561b2d8STREFOU Felix  *    documentation and/or other materials provided with the distribution.
130561b2d8STREFOU Felix  * 3. Neither the name of the copyright holders nor the names of
140561b2d8STREFOU Felix  *    contributors may be used to endorse or promote products derived
150561b2d8STREFOU Felix  *    from this software without specific prior written permission.
160561b2d8STREFOU Felix  * 4. Any redistribution, use, or modification is done solely for
170561b2d8STREFOU Felix  *    personal benefit and not for any commercial purpose or for
180561b2d8STREFOU Felix  *    monetary gain.
190561b2d8STREFOU Felix  *
200561b2d8STREFOU Felix  * THIS SOFTWARE IS PROVIDED BY BLUEKITCHEN GMBH AND CONTRIBUTORS
210561b2d8STREFOU Felix  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
220561b2d8STREFOU Felix  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23*2fca4dadSMilanka Ringwald  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL BLUEKITCHEN
24*2fca4dadSMilanka Ringwald  * GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
250561b2d8STREFOU Felix  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
260561b2d8STREFOU Felix  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
270561b2d8STREFOU Felix  * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
280561b2d8STREFOU Felix  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
290561b2d8STREFOU Felix  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
300561b2d8STREFOU Felix  * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
310561b2d8STREFOU Felix  * SUCH DAMAGE.
320561b2d8STREFOU Felix  *
330561b2d8STREFOU Felix  * Please inquire about commercial licensing options at
340561b2d8STREFOU Felix  * [email protected]
350561b2d8STREFOU Felix  *
360561b2d8STREFOU Felix  */
370561b2d8STREFOU Felix 
380561b2d8STREFOU Felix /*
390561b2d8STREFOU Felix  *  Made for BlueKitchen by OneWave with <3
400561b2d8STREFOU Felix  *      Author: [email protected]
410561b2d8STREFOU Felix  */
420561b2d8STREFOU Felix 
430561b2d8STREFOU Felix #define BTSTACK_FILE__ "main.c"
440561b2d8STREFOU Felix 
450561b2d8STREFOU Felix #include <stdio.h>
460561b2d8STREFOU Felix 
470561b2d8STREFOU Felix #include "main.h"
480561b2d8STREFOU Felix #include "otp.h"
490561b2d8STREFOU Felix #include "app_conf.h"
500561b2d8STREFOU Felix 
510561b2d8STREFOU Felix #include "FreeRTOS.h"
520561b2d8STREFOU Felix #include "task.h"
530561b2d8STREFOU Felix 
540561b2d8STREFOU Felix UART_HandleTypeDef hTuart     = { 0 };
550561b2d8STREFOU Felix static RTC_HandleTypeDef hrtc = { 0 };
560561b2d8STREFOU Felix 
570561b2d8STREFOU Felix TaskHandle_t hbtstack_task;
580561b2d8STREFOU Felix 
590561b2d8STREFOU Felix static void SystemClock_Config(void);
600561b2d8STREFOU Felix static void PeriphClock_Config(void);
610561b2d8STREFOU Felix static void Tune_HSE( void );
620561b2d8STREFOU Felix static void Init_Exti( void );
630561b2d8STREFOU Felix static void Init_UART( void );
640561b2d8STREFOU Felix static void Init_RTC( void );
650561b2d8STREFOU Felix 
660561b2d8STREFOU Felix 
Error_Handler(void)670561b2d8STREFOU Felix static void Error_Handler(void)
680561b2d8STREFOU Felix {
690561b2d8STREFOU Felix     for(;;);
700561b2d8STREFOU Felix }
710561b2d8STREFOU Felix 
Reset_BackupDomain(void)720561b2d8STREFOU Felix static void Reset_BackupDomain( void )
730561b2d8STREFOU Felix {
740561b2d8STREFOU Felix     if ((LL_RCC_IsActiveFlag_PINRST() != 0) && (LL_RCC_IsActiveFlag_SFTRST() == 0))
750561b2d8STREFOU Felix     {
760561b2d8STREFOU Felix         HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
770561b2d8STREFOU Felix 
780561b2d8STREFOU Felix         /**
790561b2d8STREFOU Felix          *  Write twice the value to flush the APB-AHB bridge
800561b2d8STREFOU Felix          *  This bit shall be written in the register before writing the next one
810561b2d8STREFOU Felix          */
820561b2d8STREFOU Felix         HAL_PWR_EnableBkUpAccess();
830561b2d8STREFOU Felix 
840561b2d8STREFOU Felix         __HAL_RCC_BACKUPRESET_FORCE();
850561b2d8STREFOU Felix         __HAL_RCC_BACKUPRESET_RELEASE();
860561b2d8STREFOU Felix     }
870561b2d8STREFOU Felix 
880561b2d8STREFOU Felix     return;
890561b2d8STREFOU Felix }
900561b2d8STREFOU Felix 
910561b2d8STREFOU Felix 
920561b2d8STREFOU Felix /**
930561b2d8STREFOU Felix   * @brief  The application entry point.
940561b2d8STREFOU Felix   * @retval int
950561b2d8STREFOU Felix   */
960561b2d8STREFOU Felix void port_thread(void* args);
main(void)970561b2d8STREFOU Felix int main(void)
980561b2d8STREFOU Felix {
990561b2d8STREFOU Felix 	/* Reset of all peripherals, initializes the Systick. */
1000561b2d8STREFOU Felix     HAL_Init();
1010561b2d8STREFOU Felix 
1020561b2d8STREFOU Felix     Reset_BackupDomain();
1030561b2d8STREFOU Felix 
1040561b2d8STREFOU Felix     Tune_HSE();
1050561b2d8STREFOU Felix 
1060561b2d8STREFOU Felix     SystemClock_Config();
1070561b2d8STREFOU Felix     PeriphClock_Config();
1080561b2d8STREFOU Felix 
1090561b2d8STREFOU Felix     /* Init debug */
1100561b2d8STREFOU Felix     Init_UART();
1110561b2d8STREFOU Felix 
1120561b2d8STREFOU Felix     Init_Exti();
1130561b2d8STREFOU Felix 
1140561b2d8STREFOU Felix     Init_RTC();
1150561b2d8STREFOU Felix 
1160561b2d8STREFOU Felix     xTaskCreate(port_thread, "btstack_thread", 2048, NULL, 1, &hbtstack_task);
1170561b2d8STREFOU Felix 
1180561b2d8STREFOU Felix     vTaskStartScheduler();
1190561b2d8STREFOU Felix 
1200561b2d8STREFOU Felix     /* We should never get here as control is now taken by the scheduler */
1210561b2d8STREFOU Felix     for(;;);
1220561b2d8STREFOU Felix }
1230561b2d8STREFOU Felix 
1240561b2d8STREFOU Felix /**
1250561b2d8STREFOU Felix   * @brief System Clock Configuration
1260561b2d8STREFOU Felix   * @retval None
1270561b2d8STREFOU Felix   */
SystemClock_Config(void)1280561b2d8STREFOU Felix void SystemClock_Config(void)
1290561b2d8STREFOU Felix {
1300561b2d8STREFOU Felix   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
1310561b2d8STREFOU Felix   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
1320561b2d8STREFOU Felix   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
1330561b2d8STREFOU Felix 
1340561b2d8STREFOU Felix   /** Configure LSE Drive Capability
1350561b2d8STREFOU Felix   */
1360561b2d8STREFOU Felix   __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
1370561b2d8STREFOU Felix 
1380561b2d8STREFOU Felix   /** Configure the main internal regulator output voltage
1390561b2d8STREFOU Felix   */
1400561b2d8STREFOU Felix   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
1410561b2d8STREFOU Felix   /** Initializes the CPU, AHB and APB busses clocks
1420561b2d8STREFOU Felix   */
1430561b2d8STREFOU Felix   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI|RCC_OSCILLATORTYPE_LSI1
1440561b2d8STREFOU Felix                               |RCC_OSCILLATORTYPE_HSE;
1450561b2d8STREFOU Felix   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
1460561b2d8STREFOU Felix   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
1470561b2d8STREFOU Felix   RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
1480561b2d8STREFOU Felix   RCC_OscInitStruct.LSIState = RCC_LSI_ON;
1490561b2d8STREFOU Felix   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
1500561b2d8STREFOU Felix   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
1510561b2d8STREFOU Felix   {
1520561b2d8STREFOU Felix     Error_Handler();
1530561b2d8STREFOU Felix   }
1540561b2d8STREFOU Felix   /** Configure the SYSCLKSource, HCLK, PCLK1 and PCLK2 clocks dividers
1550561b2d8STREFOU Felix   */
1560561b2d8STREFOU Felix   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK4|RCC_CLOCKTYPE_HCLK2
1570561b2d8STREFOU Felix                               |RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
1580561b2d8STREFOU Felix                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
1590561b2d8STREFOU Felix   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
1600561b2d8STREFOU Felix   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
1610561b2d8STREFOU Felix   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
1620561b2d8STREFOU Felix   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
1630561b2d8STREFOU Felix   RCC_ClkInitStruct.AHBCLK2Divider = RCC_SYSCLK_DIV1;
1640561b2d8STREFOU Felix   RCC_ClkInitStruct.AHBCLK4Divider = RCC_SYSCLK_DIV1;
1650561b2d8STREFOU Felix 
1660561b2d8STREFOU Felix   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
1670561b2d8STREFOU Felix   {
1680561b2d8STREFOU Felix     Error_Handler();
1690561b2d8STREFOU Felix   }
1700561b2d8STREFOU Felix   /** Initializes the peripherals clocks
1710561b2d8STREFOU Felix   */
1720561b2d8STREFOU Felix   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SMPS|RCC_PERIPHCLK_RFWAKEUP
1730561b2d8STREFOU Felix                               |RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
1740561b2d8STREFOU Felix                               |RCC_PERIPHCLK_LPUART1;
1750561b2d8STREFOU Felix   PeriphClkInitStruct.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
1760561b2d8STREFOU Felix   PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
1770561b2d8STREFOU Felix   PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
1780561b2d8STREFOU Felix   PeriphClkInitStruct.RFWakeUpClockSelection = RCC_RFWKPCLKSOURCE_LSI;
1790561b2d8STREFOU Felix   PeriphClkInitStruct.SmpsClockSelection = RCC_SMPSCLKSOURCE_HSE;
1800561b2d8STREFOU Felix   PeriphClkInitStruct.SmpsDivSelection = RCC_SMPSCLKDIV_RANGE0;
1810561b2d8STREFOU Felix 
1820561b2d8STREFOU Felix   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
1830561b2d8STREFOU Felix   {
1840561b2d8STREFOU Felix     Error_Handler();
1850561b2d8STREFOU Felix   }
1860561b2d8STREFOU Felix }
1870561b2d8STREFOU Felix 
1880561b2d8STREFOU Felix /**
1890561b2d8STREFOU Felix   * @brief Peripheral Clock Configuration
1900561b2d8STREFOU Felix   * @retval None
1910561b2d8STREFOU Felix   */
PeriphClock_Config(void)1920561b2d8STREFOU Felix void PeriphClock_Config(void)
1930561b2d8STREFOU Felix {
1940561b2d8STREFOU Felix     /**
1950561b2d8STREFOU Felix      * Select LSE clock
1960561b2d8STREFOU Felix      * on wb series LSI is not enough accurate to maintain connection
1970561b2d8STREFOU Felix      */
1980561b2d8STREFOU Felix     LL_RCC_LSE_Enable();
1990561b2d8STREFOU Felix     while(!LL_RCC_LSE_IsReady());
2000561b2d8STREFOU Felix 
2010561b2d8STREFOU Felix     /**
2020561b2d8STREFOU Felix      * Select wakeup source of BLE RF
2030561b2d8STREFOU Felix      */
2040561b2d8STREFOU Felix     LL_RCC_SetRFWKPClockSource(LL_RCC_RFWKP_CLKSOURCE_LSE);
2050561b2d8STREFOU Felix 
2060561b2d8STREFOU Felix     /**
2070561b2d8STREFOU Felix      * Switch OFF LSI
2080561b2d8STREFOU Felix      */
2090561b2d8STREFOU Felix     LL_RCC_LSI1_Disable();
2100561b2d8STREFOU Felix 
2110561b2d8STREFOU Felix 
2120561b2d8STREFOU Felix     /**
2130561b2d8STREFOU Felix      * Set RNG on HSI48
2140561b2d8STREFOU Felix      */
2150561b2d8STREFOU Felix     LL_RCC_HSI48_Enable();
2160561b2d8STREFOU Felix     while(!LL_RCC_HSI48_IsReady());
2170561b2d8STREFOU Felix     LL_RCC_SetCLK48ClockSource(LL_RCC_CLK48_CLKSOURCE_HSI48);
2180561b2d8STREFOU Felix 
2190561b2d8STREFOU Felix     return;
2200561b2d8STREFOU Felix }
2210561b2d8STREFOU Felix 
Tune_HSE(void)2220561b2d8STREFOU Felix void Tune_HSE( void )
2230561b2d8STREFOU Felix {
2240561b2d8STREFOU Felix   OTP_ID0_t * p_otp;
2250561b2d8STREFOU Felix 
2260561b2d8STREFOU Felix   /**
2270561b2d8STREFOU Felix     * Read HSE_Tuning from OTP
2280561b2d8STREFOU Felix     */
2290561b2d8STREFOU Felix   p_otp = (OTP_ID0_t *) OTP_Read(0);
2300561b2d8STREFOU Felix   if (p_otp)
2310561b2d8STREFOU Felix   {
2320561b2d8STREFOU Felix     LL_RCC_HSE_SetCapacitorTuning(p_otp->hse_tuning);
2330561b2d8STREFOU Felix   }
2340561b2d8STREFOU Felix }
2350561b2d8STREFOU Felix 
Init_UART(void)2360561b2d8STREFOU Felix static void Init_UART( void )
2370561b2d8STREFOU Felix {
2380561b2d8STREFOU Felix     GPIO_InitTypeDef GPIO_InitStruct;
2390561b2d8STREFOU Felix 
2400561b2d8STREFOU Felix     /* Peripheral clock enable */
2410561b2d8STREFOU Felix     DEBUG_USART_CLK_ENABLE();
2420561b2d8STREFOU Felix     DEBUG_USART_PORT_CLK_ENABLE();
2430561b2d8STREFOU Felix 
2440561b2d8STREFOU Felix     /**USART GPIO Configuration */
2450561b2d8STREFOU Felix     GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
2460561b2d8STREFOU Felix     GPIO_InitStruct.Pull = GPIO_NOPULL;
2470561b2d8STREFOU Felix     GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
2480561b2d8STREFOU Felix     GPIO_InitStruct.Alternate = DEBUG_GPIO_AF;
2490561b2d8STREFOU Felix     /* DEBUG_USART_TX */
2500561b2d8STREFOU Felix     GPIO_InitStruct.Pin = DEBUG_USART_TX_Pin;
2510561b2d8STREFOU Felix     HAL_GPIO_Init(DEBUG_USART_TX_GPIO_Port, &GPIO_InitStruct);
2520561b2d8STREFOU Felix     /* DEBUG_USART_RX */
2530561b2d8STREFOU Felix     GPIO_InitStruct.Pin = DEBUG_USART_RX_Pin;
2540561b2d8STREFOU Felix     HAL_GPIO_Init(DEBUG_USART_RX_GPIO_Port, &GPIO_InitStruct);
2550561b2d8STREFOU Felix 
2560561b2d8STREFOU Felix     /* USART Configuration */
2570561b2d8STREFOU Felix     hTuart.Instance = DEBUG_USART;
2580561b2d8STREFOU Felix     hTuart.Init.BaudRate = 115200;
2590561b2d8STREFOU Felix     hTuart.Init.WordLength = UART_WORDLENGTH_8B;
2600561b2d8STREFOU Felix     hTuart.Init.StopBits = UART_STOPBITS_1;
2610561b2d8STREFOU Felix     hTuart.Init.Parity = UART_PARITY_NONE;
2620561b2d8STREFOU Felix     hTuart.Init.Mode = UART_MODE_TX_RX;
2630561b2d8STREFOU Felix     hTuart.Init.HwFlowCtl = UART_HWCONTROL_NONE;
2640561b2d8STREFOU Felix     hTuart.Init.OverSampling = UART_OVERSAMPLING_16;
2650561b2d8STREFOU Felix     hTuart.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE;
2660561b2d8STREFOU Felix     hTuart.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
2670561b2d8STREFOU Felix     if (HAL_UART_Init(&hTuart) != HAL_OK){
2680561b2d8STREFOU Felix         Error_Handler();
2690561b2d8STREFOU Felix     }
2700561b2d8STREFOU Felix     return;
2710561b2d8STREFOU Felix }
2720561b2d8STREFOU Felix 
Init_Exti(void)2730561b2d8STREFOU Felix static void Init_Exti( void )
2740561b2d8STREFOU Felix {
2750561b2d8STREFOU Felix   /**< Disable all wakeup interrupt on CPU1  except IPCC(36), HSEM(38) */
2760561b2d8STREFOU Felix   LL_EXTI_DisableIT_0_31(~0);
2770561b2d8STREFOU Felix   LL_EXTI_DisableIT_32_63( (~0) & (~(LL_EXTI_LINE_36 | LL_EXTI_LINE_38)) );
2780561b2d8STREFOU Felix 
2790561b2d8STREFOU Felix   HAL_NVIC_SetPriority(IPCC_C1_RX_IRQn,5,0);
2800561b2d8STREFOU Felix   HAL_NVIC_SetPriority(IPCC_C1_TX_IRQn,5,0);
2810561b2d8STREFOU Felix 
2820561b2d8STREFOU Felix   return;
2830561b2d8STREFOU Felix }
2840561b2d8STREFOU Felix 
Init_RTC(void)2850561b2d8STREFOU Felix static void Init_RTC( void )
2860561b2d8STREFOU Felix {
2870561b2d8STREFOU Felix   HAL_PWR_EnableBkUpAccess(); /**< Enable access to the RTC registers */
2880561b2d8STREFOU Felix 
2890561b2d8STREFOU Felix   /**
2900561b2d8STREFOU Felix    *  Write twice the value to flush the APB-AHB bridge
2910561b2d8STREFOU Felix    *  This bit shall be written in the register before writing the next one
2920561b2d8STREFOU Felix    */
2930561b2d8STREFOU Felix   HAL_PWR_EnableBkUpAccess();
2940561b2d8STREFOU Felix 
2950561b2d8STREFOU Felix   __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE); /**< Select LSI as RTC Input */
2960561b2d8STREFOU Felix 
2970561b2d8STREFOU Felix   __HAL_RCC_RTC_ENABLE(); /**< Enable RTC */
2980561b2d8STREFOU Felix 
2990561b2d8STREFOU Felix   hrtc.Instance = RTC; /**< Define instance */
3000561b2d8STREFOU Felix 
3010561b2d8STREFOU Felix   /**
3020561b2d8STREFOU Felix    * Set the Asynchronous prescaler
3030561b2d8STREFOU Felix    */
3040561b2d8STREFOU Felix   hrtc.Init.AsynchPrediv = CFG_RTC_ASYNCH_PRESCALER;
3050561b2d8STREFOU Felix   hrtc.Init.SynchPrediv = CFG_RTC_SYNCH_PRESCALER;
3060561b2d8STREFOU Felix   HAL_RTC_Init(&hrtc);
3070561b2d8STREFOU Felix 
3080561b2d8STREFOU Felix   MODIFY_REG(RTC->CR, RTC_CR_WUCKSEL, CFG_RTC_WUCKSEL_DIVIDER);
3090561b2d8STREFOU Felix 
3100561b2d8STREFOU Felix     /* RTC interrupt Init */
3110561b2d8STREFOU Felix     HAL_NVIC_SetPriority(RTC_WKUP_IRQn, 0, 0);
3120561b2d8STREFOU Felix     HAL_NVIC_EnableIRQ(RTC_WKUP_IRQn);
3130561b2d8STREFOU Felix 
3140561b2d8STREFOU Felix   return;
3150561b2d8STREFOU Felix }
3160561b2d8STREFOU Felix 
PreSleepProcessing(uint32_t ulExpectedIdleTime)3170561b2d8STREFOU Felix void PreSleepProcessing(uint32_t ulExpectedIdleTime)
3180561b2d8STREFOU Felix {
3190561b2d8STREFOU Felix   /* Called by the kernel before it places the MCU into a sleep mode because
3200561b2d8STREFOU Felix   configPRE_SLEEP_PROCESSING() is #defined to PreSleepProcessing().
3210561b2d8STREFOU Felix 
3220561b2d8STREFOU Felix   NOTE:  Additional actions can be taken here to get the power consumption
3230561b2d8STREFOU Felix   even lower.  For example, peripherals can be turned off here, and then back
3240561b2d8STREFOU Felix   on again in the post sleep processing function.  For maximum power saving
3250561b2d8STREFOU Felix   ensure all unused pins are in their lowest power state. */
3260561b2d8STREFOU Felix 
3270561b2d8STREFOU Felix   /*
3280561b2d8STREFOU Felix     (*ulExpectedIdleTime) is set to 0 to indicate that PreSleepProcessing contains
3290561b2d8STREFOU Felix     its own wait for interrupt or wait for event instruction and so the kernel vPortSuppressTicksAndSleep
3300561b2d8STREFOU Felix     function does not need to execute the wfi instruction
3310561b2d8STREFOU Felix   */
3320561b2d8STREFOU Felix   ulExpectedIdleTime = 0;
3330561b2d8STREFOU Felix 
3340561b2d8STREFOU Felix   /*Enter to sleep Mode using the HAL function HAL_PWR_EnterSLEEPMode with WFI instruction*/
3350561b2d8STREFOU Felix   HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
3360561b2d8STREFOU Felix }
3370561b2d8STREFOU Felix 
3380561b2d8STREFOU Felix 
PostSleepProcessing(uint32_t ulExpectedIdleTime)3390561b2d8STREFOU Felix void PostSleepProcessing(uint32_t ulExpectedIdleTime)
3400561b2d8STREFOU Felix {
3410561b2d8STREFOU Felix   /* Called by the kernel when the MCU exits a sleep mode because
3420561b2d8STREFOU Felix   configPOST_SLEEP_PROCESSING is #defined to PostSleepProcessing(). */
3430561b2d8STREFOU Felix 
3440561b2d8STREFOU Felix   /* Avoid compiler warnings about the unused parameter. */
3450561b2d8STREFOU Felix   (void) ulExpectedIdleTime;
3460561b2d8STREFOU Felix }
3470561b2d8STREFOU Felix 
vApplicationStackOverflowHook(TaskHandle_t xTask,signed char * pcTaskName)3480561b2d8STREFOU Felix void vApplicationStackOverflowHook(TaskHandle_t xTask,
3490561b2d8STREFOU Felix         signed char *pcTaskName)
3500561b2d8STREFOU Felix {
3510561b2d8STREFOU Felix     printf("stack overflow in task %s!\r\n", pcTaskName);
3520561b2d8STREFOU Felix     while (1);
3530561b2d8STREFOU Felix }