1*9880d681SAndroid Build Coastguard Worker; This should fold the "vcmpbfp." and "vcmpbfp" instructions into a single 2*9880d681SAndroid Build Coastguard Worker; "vcmpbfp.". 3*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=ppc32 -mcpu=g5 | grep vcmpbfp | count 1 4*9880d681SAndroid Build Coastguard Worker 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine void @test(<4 x float>* %x, <4 x float>* %y, i32* %P) { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker %tmp = load <4 x float>, <4 x float>* %x ; <<4 x float>> [#uses=1] 9*9880d681SAndroid Build Coastguard Worker %tmp2 = load <4 x float>, <4 x float>* %y ; <<4 x float>> [#uses=1] 10*9880d681SAndroid Build Coastguard Worker %tmp.upgrd.1 = call i32 @llvm.ppc.altivec.vcmpbfp.p( i32 1, <4 x float> %tmp, <4 x float> %tmp2 ) ; <i32> [#uses=1] 11*9880d681SAndroid Build Coastguard Worker %tmp4 = load <4 x float>, <4 x float>* %x ; <<4 x float>> [#uses=1] 12*9880d681SAndroid Build Coastguard Worker %tmp6 = load <4 x float>, <4 x float>* %y ; <<4 x float>> [#uses=1] 13*9880d681SAndroid Build Coastguard Worker %tmp.upgrd.2 = call <4 x i32> @llvm.ppc.altivec.vcmpbfp( <4 x float> %tmp4, <4 x float> %tmp6 ) ; <<4 x i32>> [#uses=1] 14*9880d681SAndroid Build Coastguard Worker %tmp7 = bitcast <4 x i32> %tmp.upgrd.2 to <4 x float> ; <<4 x float>> [#uses=1] 15*9880d681SAndroid Build Coastguard Worker store <4 x float> %tmp7, <4 x float>* %x 16*9880d681SAndroid Build Coastguard Worker store i32 %tmp.upgrd.1, i32* %P 17*9880d681SAndroid Build Coastguard Worker ret void 18*9880d681SAndroid Build Coastguard Worker} 19*9880d681SAndroid Build Coastguard Worker 20*9880d681SAndroid Build Coastguard Workerdeclare i32 @llvm.ppc.altivec.vcmpbfp.p(i32, <4 x float>, <4 x float>) 21*9880d681SAndroid Build Coastguard Worker 22*9880d681SAndroid Build Coastguard Workerdeclare <4 x i32> @llvm.ppc.altivec.vcmpbfp(<4 x float>, <4 x float>) 23