1*9880d681SAndroid Build Coastguard Worker; RUN: llc -O0 -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind 3*9880d681SAndroid Build Coastguard Workerdefine void @test() { 4*9880d681SAndroid Build Coastguard Workerentry: 5*9880d681SAndroid Build Coastguard Worker %__a.addr.i = alloca i32, align 4 6*9880d681SAndroid Build Coastguard Worker %__b.addr.i = alloca <4 x i32>*, align 8 7*9880d681SAndroid Build Coastguard Worker %i = alloca <4 x i32>, align 16 8*9880d681SAndroid Build Coastguard Worker %j = alloca <4 x i32>, align 16 9*9880d681SAndroid Build Coastguard Worker store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32>* %i, align 16 10*9880d681SAndroid Build Coastguard Worker store i32 0, i32* %__a.addr.i, align 4 11*9880d681SAndroid Build Coastguard Worker store <4 x i32>* %i, <4 x i32>** %__b.addr.i, align 8 12*9880d681SAndroid Build Coastguard Worker %0 = load i32, i32* %__a.addr.i, align 4 13*9880d681SAndroid Build Coastguard Worker %1 = load <4 x i32>*, <4 x i32>** %__b.addr.i, align 8 14*9880d681SAndroid Build Coastguard Worker %2 = bitcast <4 x i32>* %1 to i8* 15*9880d681SAndroid Build Coastguard Worker %3 = getelementptr i8, i8* %2, i32 %0 16*9880d681SAndroid Build Coastguard Worker %4 = call <4 x i32> @llvm.ppc.vsx.lxvw4x(i8* %3) 17*9880d681SAndroid Build Coastguard Worker; CHECK: lwa [[REG0:[0-9]+]], 18*9880d681SAndroid Build Coastguard Worker; CHECK: lxvd2x [[REG1:[0-9]+]], {{[0-9]+}}, [[REG0]] 19*9880d681SAndroid Build Coastguard Worker; CHECK: xxswapd [[REG1]], [[REG1]] 20*9880d681SAndroid Build Coastguard Worker store <4 x i32> %4, <4 x i32>* %j, align 16 21*9880d681SAndroid Build Coastguard Worker ret void 22*9880d681SAndroid Build Coastguard Worker} 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Worker; Function Attrs: nounwind readonly 25*9880d681SAndroid Build Coastguard Workerdeclare <4 x i32> @llvm.ppc.vsx.lxvw4x(i8*) 26