1*9880d681SAndroid Build Coastguard Worker; RUN: llc -mcpu=pwr7 < %s | FileCheck %s 2*9880d681SAndroid Build Coastguard Worker; RUN: llc -O1 -mcpu=pwr7 < %s | FileCheck %s 3*9880d681SAndroid Build Coastguard Workertarget datalayout = "E-m:e-i64:64-n32:64" 4*9880d681SAndroid Build Coastguard Workertarget triple = "powerpc64-unknown-linux-gnu" 5*9880d681SAndroid Build Coastguard Worker 6*9880d681SAndroid Build Coastguard Workerdefine zeroext i1 @testi1(i1 zeroext %b1, i1 zeroext %b2) #0 { 7*9880d681SAndroid Build Coastguard Workerentry: 8*9880d681SAndroid Build Coastguard Worker %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i1 %b1, i1 %b2) #0 9*9880d681SAndroid Build Coastguard Worker %1 = and i8 %0, 1 10*9880d681SAndroid Build Coastguard Worker %tobool3 = icmp ne i8 %1, 0 11*9880d681SAndroid Build Coastguard Worker ret i1 %tobool3 12*9880d681SAndroid Build Coastguard Worker 13*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @testi1 14*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: andi. {{[0-9]+}}, 3, 1 15*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: li [[REG1:[0-9]+]], 0 16*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: crmove [[REG2:[0-9]+]], 1 17*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: andi. {{[0-9]+}}, 4, 1 18*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1 19*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: li [[REG4:[0-9]+]], 1 20*9880d681SAndroid Build Coastguard Worker; CHECK: isel 3, [[REG4]], [[REG1]], [[REG3]] 21*9880d681SAndroid Build Coastguard Worker; CHECK: blr 22*9880d681SAndroid Build Coastguard Worker} 23*9880d681SAndroid Build Coastguard Worker 24*9880d681SAndroid Build Coastguard Workerdefine signext i32 @testi32(i32 signext %b1, i32 signext %b2) #0 { 25*9880d681SAndroid Build Coastguard Workerentry: 26*9880d681SAndroid Build Coastguard Worker %0 = tail call i32 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i32 %b1, i32 %b2) #0 27*9880d681SAndroid Build Coastguard Worker ret i32 %0 28*9880d681SAndroid Build Coastguard Worker 29*9880d681SAndroid Build Coastguard Worker; The ABI sign_extend should combine with the any_extend from the asm result, 30*9880d681SAndroid Build Coastguard Worker; and the result will be 0 or -1. This highlights the fact that only the first 31*9880d681SAndroid Build Coastguard Worker; bit is meaningful. 32*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @testi32 33*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: andi. {{[0-9]+}}, 3, 1 34*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: li [[REG1:[0-9]+]], 0 35*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: crmove [[REG2:[0-9]+]], 1 36*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: andi. {{[0-9]+}}, 4, 1 37*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1 38*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: li [[REG4:[0-9]+]], -1 39*9880d681SAndroid Build Coastguard Worker; CHECK: isel 3, [[REG4]], [[REG1]], [[REG3]] 40*9880d681SAndroid Build Coastguard Worker; CHECK: blr 41*9880d681SAndroid Build Coastguard Worker} 42*9880d681SAndroid Build Coastguard Worker 43*9880d681SAndroid Build Coastguard Workerdefine zeroext i8 @testi8(i8 zeroext %b1, i8 zeroext %b2) #0 { 44*9880d681SAndroid Build Coastguard Workerentry: 45*9880d681SAndroid Build Coastguard Worker %0 = tail call i8 asm "crand $0, $1, $2", "=^wc,^wc,^wc"(i8 %b1, i8 %b2) #0 46*9880d681SAndroid Build Coastguard Worker ret i8 %0 47*9880d681SAndroid Build Coastguard Worker 48*9880d681SAndroid Build Coastguard Worker; CHECK-LABEL: @testi8 49*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: andi. {{[0-9]+}}, 3, 1 50*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: li [[REG1:[0-9]+]], 0 51*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: crmove [[REG2:[0-9]+]], 1 52*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: andi. {{[0-9]+}}, 4, 1 53*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: crand [[REG3:[0-9]+]], [[REG2]], 1 54*9880d681SAndroid Build Coastguard Worker; CHECK-DAG: li [[REG4:[0-9]+]], 1 55*9880d681SAndroid Build Coastguard Worker; CHECK: isel 3, [[REG4]], [[REG1]], [[REG3]] 56*9880d681SAndroid Build Coastguard Worker; CHECK: blr 57*9880d681SAndroid Build Coastguard Worker} 58*9880d681SAndroid Build Coastguard Worker 59*9880d681SAndroid Build Coastguard Workerattributes #0 = { nounwind "target-features"="+crbits" } 60*9880d681SAndroid Build Coastguard Worker 61