xref: /aosp_15_r20/external/llvm/test/CodeGen/AMDGPU/selectcc-icmp-select-float.ll (revision 9880d6810fe72a1726cb53787c6711e909410d58)
1*9880d681SAndroid Build Coastguard Worker; RUN: llc < %s -march=r600 -mcpu=redwood | FileCheck %s
2*9880d681SAndroid Build Coastguard Worker
3*9880d681SAndroid Build Coastguard Worker; Note additional optimizations may cause this SGT to be replaced with a
4*9880d681SAndroid Build Coastguard Worker; CND* instruction.
5*9880d681SAndroid Build Coastguard Worker; CHECK: SETGT_INT * T{{[0-9]+\.[XYZW], T[0-9]+\.[XYZW]}}, literal.x,
6*9880d681SAndroid Build Coastguard Worker; CHECK-NEXT: -1
7*9880d681SAndroid Build Coastguard Worker; Test a selectcc with i32 LHS/RHS and float True/False
8*9880d681SAndroid Build Coastguard Worker
9*9880d681SAndroid Build Coastguard Workerdefine void @test(float addrspace(1)* %out, i32 addrspace(1)* %in) {
10*9880d681SAndroid Build Coastguard Workerentry:
11*9880d681SAndroid Build Coastguard Worker  %0 = load i32, i32 addrspace(1)* %in
12*9880d681SAndroid Build Coastguard Worker  %1 = icmp sge i32 %0, 0
13*9880d681SAndroid Build Coastguard Worker  %2 = select i1 %1, float 1.0, float 0.0
14*9880d681SAndroid Build Coastguard Worker  store float %2, float addrspace(1)* %out
15*9880d681SAndroid Build Coastguard Worker  ret void
16*9880d681SAndroid Build Coastguard Worker}
17