1*67e74705SXin Li // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=SOFT
2*67e74705SXin Li // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi hard -fallow-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=CHECK --check-prefix=HARD
3*67e74705SXin Li // RUN: %clang_cc1 -triple armv7a--none-eabi -target-abi aapcs -mfloat-abi soft -fnative-half-arguments-and-returns -emit-llvm -o - -O1 %s | FileCheck %s --check-prefix=NATIVE
4*67e74705SXin Li
5*67e74705SXin Li __fp16 g;
6*67e74705SXin Li
t1(__fp16 a)7*67e74705SXin Li void t1(__fp16 a) { g = a; }
8*67e74705SXin Li // SOFT: define void @t1(i32 [[PARAM:%.*]])
9*67e74705SXin Li // SOFT: [[TRUNC:%.*]] = trunc i32 [[PARAM]] to i16
10*67e74705SXin Li // HARD: define arm_aapcs_vfpcc void @t1(float [[PARAM:%.*]])
11*67e74705SXin Li // HARD: [[BITCAST:%.*]] = bitcast float [[PARAM]] to i32
12*67e74705SXin Li // HARD: [[TRUNC:%.*]] = trunc i32 [[BITCAST]] to i16
13*67e74705SXin Li // CHECK: store i16 [[TRUNC]], i16* bitcast (half* @g to i16*)
14*67e74705SXin Li // NATIVE: define void @t1(half [[PARAM:%.*]])
15*67e74705SXin Li // NATIVE: store half [[PARAM]], half* @g
16*67e74705SXin Li
t2()17*67e74705SXin Li __fp16 t2() { return g; }
18*67e74705SXin Li // SOFT: define i32 @t2()
19*67e74705SXin Li // HARD: define arm_aapcs_vfpcc float @t2()
20*67e74705SXin Li // NATIVE: define half @t2()
21*67e74705SXin Li // CHECK: [[LOAD:%.*]] = load i16, i16* bitcast (half* @g to i16*)
22*67e74705SXin Li // CHECK: [[ZEXT:%.*]] = zext i16 [[LOAD]] to i32
23*67e74705SXin Li // SOFT: ret i32 [[ZEXT]]
24*67e74705SXin Li // HARD: [[BITCAST:%.*]] = bitcast i32 [[ZEXT]] to float
25*67e74705SXin Li // HARD: ret float [[BITCAST]]
26*67e74705SXin Li // NATIVE: [[LOAD:%.*]] = load half, half* @g
27*67e74705SXin Li // NATIVE: ret half [[LOAD]]
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