1 /* 2 * Copyright (c) 2016-2021 Arm Limited. 3 * 4 * SPDX-License-Identifier: MIT 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in all 14 * copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22 * SOFTWARE. 23 */ 24 #include "src/cpu/kernels/CpuGemmInterleave4x4Kernel.h" 25 26 #include "arm_compute/core/ITensor.h" 27 #include "arm_compute/core/Validate.h" 28 #include "arm_compute/core/Window.h" 29 #include "arm_compute/core/utils/misc/ShapeCalculator.h" 30 #include "src/core/helpers/AutoConfiguration.h" 31 #include "src/core/helpers/WindowHelpers.h" 32 33 #include <arm_neon.h> 34 35 namespace arm_compute 36 { 37 namespace cpu 38 { 39 namespace kernels 40 { 41 using namespace arm_compute::misc::shape_calculator; 42 configure(const ITensorInfo * src,ITensorInfo * dst)43 void CpuGemmInterleave4x4Kernel::configure(const ITensorInfo *src, ITensorInfo *dst) 44 { 45 ARM_COMPUTE_ERROR_ON_NULLPTR(src, dst); 46 47 // dst auto inizialitation if not yet initialized 48 auto_init_if_empty(*dst, src->clone()->set_tensor_shape(compute_interleaved_shape(*src))); 49 50 // Perform validate step 51 ARM_COMPUTE_ERROR_THROW_ON(CpuGemmInterleave4x4Kernel::validate(src, dst)); 52 53 Window win = calculate_max_window(*src, Steps(1, 4)); 54 ICPPKernel::configure(win); 55 } 56 validate(const ITensorInfo * src,const ITensorInfo * dst)57 Status CpuGemmInterleave4x4Kernel::validate(const ITensorInfo *src, const ITensorInfo *dst) 58 { 59 ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, dst); 60 //Note: ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(src) is not needed here as this kernel doesn't use CPU FP16 instructions. 61 ARM_COMPUTE_RETURN_ERROR_ON(src->data_type() == DataType::UNKNOWN); 62 63 if(dst->total_size() != 0) 64 { 65 const TensorShape dst_shape = compute_interleaved_shape(*src); 66 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(dst->tensor_shape(), dst_shape); 67 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, dst); 68 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_QUANTIZATION_INFO(src, dst); 69 } 70 71 return Status{}; 72 } 73 run_op(ITensorPack & tensors,const Window & window,const ThreadInfo & info)74 void CpuGemmInterleave4x4Kernel::run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) 75 { 76 ARM_COMPUTE_UNUSED(info); 77 ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this); 78 ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window); 79 ARM_COMPUTE_ERROR_ON(tensors.empty()); 80 /* 81 * This kernel puts the values in a 4x4 block of Matrix A on the same row (Interleaved values) 82 * |a00 a01 a02 a03| 83 * |a10 a11 a12 a13| 84 * |a20 a21 a22 a23| = | a00 a10 a20 a30 || a01 a11 a21 a31 || a02 a12 a22 a32 || a03 a13 a23 a33 | 85 * |a30 a31 a32 a33| 86 * 87 * After this operation, the dst matrix will have the following shape: [ height * 4, ceil(width / 4.0f) ] 88 */ 89 const ITensor *src = tensors.get_const_tensor(TensorType::ACL_SRC); 90 ITensor *dst = tensors.get_tensor(TensorType::ACL_DST); 91 92 const size_t window_start_x = window.x().start(); 93 const size_t window_end_x = window.x().end(); 94 95 const size_t in_height = src->info()->dimension(1); 96 const size_t in_stride = src->info()->strides_in_bytes()[1]; 97 98 const size_t partial_y = in_height % 4; 99 100 const size_t element_size = src->info()->element_size(); 101 102 // Set window for the src tensor 103 Window win = window; 104 win.set(Window::DimX, Window::Dimension(0, 1, 1)); 105 106 // Set window for the dst tensor 107 Window win_out(window); 108 win_out.set(Window::DimX, Window::Dimension(0, 1, 1)); 109 win_out.scale(Window::DimY, 0.25f); 110 111 Iterator in(src, win); 112 Iterator out(dst, win_out); 113 114 execute_window_loop(win, [&](const Coordinates & id) 115 { 116 if(id.y() + 4 <= static_cast<int>(in_height)) 117 { 118 for(size_t x = window_start_x; x < window_end_x; ++x) 119 { 120 std::memcpy(out.ptr() + (x * 4 + 0) * element_size, (in.ptr() + 0 * in_stride) + x * element_size, element_size); 121 std::memcpy(out.ptr() + (x * 4 + 1) * element_size, (in.ptr() + 1 * in_stride) + x * element_size, element_size); 122 std::memcpy(out.ptr() + (x * 4 + 2) * element_size, (in.ptr() + 2 * in_stride) + x * element_size, element_size); 123 std::memcpy(out.ptr() + (x * 4 + 3) * element_size, (in.ptr() + 3 * in_stride) + x * element_size, element_size); 124 } 125 } 126 else 127 { 128 for(size_t x = window_start_x; x < window_end_x; ++x) 129 { 130 size_t y = 0; 131 for(; y < partial_y; ++y) 132 { 133 std::memcpy(out.ptr() + (x * 4 + y) * element_size, (in.ptr() + y * in_stride) + x * element_size, element_size); 134 } 135 for(; y < 4; ++y) 136 { 137 std::memset(out.ptr() + (x * 4 + y) * element_size, 0, element_size); 138 } 139 } 140 } 141 }, 142 in, out); 143 } 144 name() const145 const char *CpuGemmInterleave4x4Kernel::name() const 146 { 147 return "CpuGemmInterleave4x4Kernel"; 148 } 149 } // namespace kernels 150 } // namespace cpu 151 } // namespace arm_compute 152