104665835SMaxpicca-Lipackage xiangshan.cache.wpu 204665835SMaxpicca-Li 38891a219SYinan Xuimport org.chipsalliance.cde.config.Parameters 404665835SMaxpicca-Liimport chisel3._ 504665835SMaxpicca-Liimport chisel3.util.{Fill, log2Up} 604665835SMaxpicca-Liimport xiangshan._ 704665835SMaxpicca-Liimport xiangshan.cache.HasDCacheParameters 804665835SMaxpicca-Li 904665835SMaxpicca-Licase class VictimList(nSets: Int, width: Int = 2) { 1004665835SMaxpicca-Li val victim_vec = RegInit(VecInit(Seq.fill(nSets)(0.U(width.W)))) 1104665835SMaxpicca-Li 1204665835SMaxpicca-Li // replace to search 1304665835SMaxpicca-Li def replace(set: UInt) = { 1404665835SMaxpicca-Li when(victim_vec(set) =/= Fill(width, 1.U)) { 1504665835SMaxpicca-Li victim_vec(set) := victim_vec(set) + 1.U 1604665835SMaxpicca-Li } 1704665835SMaxpicca-Li } 1804665835SMaxpicca-Li 1904665835SMaxpicca-Li def whether_sa(set:UInt) = victim_vec(set)(width-1) 2004665835SMaxpicca-Li} 2104665835SMaxpicca-Li 2204665835SMaxpicca-Litrait WayConflictPredictParameters extends HasDCacheParameters { 2304665835SMaxpicca-Li val WCPSize = DCacheSets 2404665835SMaxpicca-Li val IdxBits = log2Up(WCPSize) 2504665835SMaxpicca-Li val CounterSize = 2 2604665835SMaxpicca-Li val PCOffBits = 2 2704665835SMaxpicca-Li def get_pc_idx(pc: UInt) = { pc(IdxBits+PCOffBits, PCOffBits)} 2804665835SMaxpicca-Li def get_addr_idx(addr: UInt) = { addr(IdxBits+DCacheSetOffset,DCacheSetOffset)} 2904665835SMaxpicca-Li} 3004665835SMaxpicca-Li 3104665835SMaxpicca-Liabstract class WayConflictPredictorBundle(implicit P: Parameters) extends XSBundle with WayConflictPredictParameters 3204665835SMaxpicca-Liabstract class WayConflictPredictorModule(implicit P: Parameters) extends XSModule with WayConflictPredictParameters 3304665835SMaxpicca-Li 3404665835SMaxpicca-Liclass WayConflictPredIO (implicit p: Parameters) extends WayConflictPredictorBundle { 3504665835SMaxpicca-Li val en = Input(Bool()) 3604665835SMaxpicca-Li val vaddr = Input(UInt(VAddrBits.W)) 3704665835SMaxpicca-Li val way_conflict = Output(Bool()) 3804665835SMaxpicca-Li} 3904665835SMaxpicca-Li 4004665835SMaxpicca-Liclass WayConflictUpdIO (implicit p: Parameters) extends WayConflictPredictorBundle { 4104665835SMaxpicca-Li val en = Input(Bool()) 4204665835SMaxpicca-Li val vaddr = Input(UInt(VAddrBits.W)) 4304665835SMaxpicca-Li val dm_hit = Input(Bool()) 4404665835SMaxpicca-Li val sa_hit = Input(Bool()) 4504665835SMaxpicca-Li} 4604665835SMaxpicca-Li 4704665835SMaxpicca-Liclass WayConflictPredictor (nPorts: Int) (implicit p: Parameters) extends WayConflictPredictorModule{ 4804665835SMaxpicca-Li val io = IO(new Bundle() { 4904665835SMaxpicca-Li val pred = Vec(nPorts, new WayConflictPredIO) 5004665835SMaxpicca-Li val update = Vec(nPorts, new WayConflictUpdIO) 5104665835SMaxpicca-Li }) 5204665835SMaxpicca-Li val PredTable = RegInit(VecInit(Seq.fill(WCPSize)(0.U(CounterSize.W)))) 5304665835SMaxpicca-Li 5404665835SMaxpicca-Li for (i <- 0 until nPorts){ 5504665835SMaxpicca-Li io.pred(i).way_conflict := io.pred(i).en & PredTable(get_addr_idx(io.pred(i).vaddr))(CounterSize-1) 56*4a0e27ecSYanqin Li val ptVal = PredTable(get_addr_idx(io.update(i).vaddr)) 57*4a0e27ecSYanqin Li when(io.update(i).en && io.update(i).sa_hit && ptVal =/= Fill(CounterSize, 1.U)) { 58*4a0e27ecSYanqin Li PredTable(get_addr_idx(io.update(i).vaddr)) := ptVal + 1.U 59*4a0e27ecSYanqin Li }.elsewhen(io.update(i).en && io.update(i).dm_hit && ptVal =/= Fill(CounterSize, 0.U)) { 60*4a0e27ecSYanqin Li PredTable(get_addr_idx(io.update(i).vaddr)) := ptVal - 1.U 6104665835SMaxpicca-Li } 6204665835SMaxpicca-Li } 6304665835SMaxpicca-Li 6404665835SMaxpicca-Li}