1*f7af4c74Schengguanghuipackage xiangshan.backend.fu.util 2*f7af4c74Schengguanghui 3*f7af4c74Schengguanghuiimport chisel3._ 4*f7af4c74Schengguanghuiimport org.chipsalliance.cde.config.Parameters 5*f7af4c74Schengguanghuiimport CSRConst.ModeM 6*f7af4c74Schengguanghui 7*f7af4c74Schengguanghuitrait DebugCSR { 8*f7af4c74Schengguanghui implicit val p: Parameters 9*f7af4c74Schengguanghui class DcsrStruct extends Bundle { 10*f7af4c74Schengguanghui val debugver = Output(UInt(4.W)) // [28:31] 11*f7af4c74Schengguanghui val pad1 = Output(UInt(10.W))// [27:18] 12*f7af4c74Schengguanghui val ebreakvs = Output(Bool()) // [17] reserved for Hypervisor debug 13*f7af4c74Schengguanghui val ebreakvu = Output(Bool()) // [16] reserved for Hypervisor debug 14*f7af4c74Schengguanghui val ebreakm = Output(Bool()) // [15] 15*f7af4c74Schengguanghui val pad0 = Output(Bool()) // [14] ebreakh has been removed 16*f7af4c74Schengguanghui val ebreaks = Output(Bool()) // [13] 17*f7af4c74Schengguanghui val ebreaku = Output(Bool()) // [12] 18*f7af4c74Schengguanghui val stepie = Output(Bool()) // [11] 19*f7af4c74Schengguanghui val stopcount = Output(Bool()) // [10] 20*f7af4c74Schengguanghui val stoptime = Output(Bool()) // [9] 21*f7af4c74Schengguanghui val cause = Output(UInt(3.W)) // [8:6] 22*f7af4c74Schengguanghui val v = Output(Bool()) // [5] 23*f7af4c74Schengguanghui val mprven = Output(Bool()) // [4] 24*f7af4c74Schengguanghui val nmip = Output(Bool()) // [3] 25*f7af4c74Schengguanghui val step = Output(Bool()) // [2] 26*f7af4c74Schengguanghui val prv = Output(UInt(2.W)) // [1:0] 27*f7af4c74Schengguanghui require(this.getWidth == 32) 28*f7af4c74Schengguanghui } 29*f7af4c74Schengguanghui 30*f7af4c74Schengguanghui object DcsrStruct extends DcsrStruct { 31*f7af4c74Schengguanghui def DEBUGVER_NONE = 0.U 32*f7af4c74Schengguanghui def DEBUGVER_SPEC = 4.U 33*f7af4c74Schengguanghui def DEBUGVER_CUSTOM = 15.U 34*f7af4c74Schengguanghui def CAUSE_EBREAK = 1.U 35*f7af4c74Schengguanghui def CAUSE_TRIGGER = 2.U 36*f7af4c74Schengguanghui def CAUSE_HALTREQ = 3.U 37*f7af4c74Schengguanghui def CAUSE_STEP = 4.U 38*f7af4c74Schengguanghui def CAUSE_RESETHALTREQ = 5.U 39*f7af4c74Schengguanghui private def debugver_offset = 28 40*f7af4c74Schengguanghui private def stopcount_offset = 10 41*f7af4c74Schengguanghui private def stoptime_offset = 9 42*f7af4c74Schengguanghui private def mprven_offset = 5 43*f7af4c74Schengguanghui private def prv_offset = 0 44*f7af4c74Schengguanghui def init: UInt = ( 45*f7af4c74Schengguanghui (DEBUGVER_SPEC.litValue << debugver_offset) | /* Debug implementation as it described in 0.13 draft */ 46*f7af4c74Schengguanghui (0L << stopcount_offset) | /* Stop count updating has not been supported */ 47*f7af4c74Schengguanghui (0L << stoptime_offset) | /* Stop time updating has not been supported */ 48*f7af4c74Schengguanghui (0L << mprven_offset) | /* Whether use mstatus.perven as mprven */ 49*f7af4c74Schengguanghui (ModeM.litValue << prv_offset) 50*f7af4c74Schengguanghui ).U 51*f7af4c74Schengguanghui } 52*f7af4c74Schengguanghui} 53*f7af4c74Schengguanghui 54