xref: /XiangShan/src/main/scala/xiangshan/backend/fu/Jump.scala (revision a9ecfa67572f9dc8d32a66b8924cfc8e21bbda0c) 
1package xiangshan.backend.fu
2
3import chisel3._
4import chisel3.util._
5import xiangshan._
6import utils._
7import xiangshan.backend._
8import xiangshan.backend.fu.FunctionUnit._
9import xiangshan.backend.decode.isa._
10
11class RedirectOut extends XSBundle {
12  val redirectValid = Bool()
13  val redirect = new Redirect
14  val brUpdate = new BranchUpdateInfo
15}
16
17class Jump extends FunctionUnit(jmpCfg, extOut = new RedirectOut) {
18
19  val (iovalid, src1, offset, func, pc, uop) = (
20    io.in.valid,
21    io.in.bits.src(0),
22    io.in.bits.uop.ctrl.imm,
23    io.in.bits.uop.ctrl.fuOpType,
24    SignExt(io.in.bits.uop.cf.pc, AddrBits),
25    io.in.bits.uop
26  )
27
28  val redirectHit = uop.roqIdx.needFlush(io.redirectIn)
29  val valid = iovalid && !redirectHit
30
31  val isRVC = uop.cf.brUpdate.pd.isRVC
32  val pcDelaySlot = Mux(isRVC, pc + 2.U, pc + 4.U)
33  val target = src1 + offset // NOTE: src1 is (pc/rf(rs1)), src2 is (offset)
34
35  val redirectOut = io.out.bits.ext.get.redirect
36  val brUpdate = io.out.bits.ext.get.brUpdate
37
38  io.out.bits.ext.get.redirectValid := valid
39  redirectOut.pc := uop.cf.pc
40  redirectOut.target := target
41  redirectOut.brTag := uop.brTag
42  redirectOut.isException := false.B
43  redirectOut.isFlushPipe := false.B
44  redirectOut.isMisPred := DontCare // check this in brq
45  redirectOut.isReplay := false.B
46  redirectOut.roqIdx := uop.roqIdx
47
48  brUpdate := uop.cf.brUpdate
49  brUpdate.pc := uop.cf.pc
50  brUpdate.target := target
51  brUpdate.brTarget := target // DontCare
52  brUpdate.taken := true.B
53  // io.out.bits.brUpdate.fetchIdx := uop.cf.brUpdate.fetchOffset >> 1.U  //TODO: consider RVC
54
55  // Output
56  val res = pcDelaySlot
57
58  io.in.ready := io.out.ready
59  io.out.valid := valid // TODO: CSR/MOU/FMV may need change it
60  io.out.bits.uop <> io.in.bits.uop
61  io.out.bits.data := res
62
63  // NOTE: the debug info is for one-cycle exec, if FMV needs multi-cycle, may needs change it
64  XSDebug(io.in.valid, "In(%d %d) Out(%d %d) Redirect:(%d %d %d %d) brTag:%x\n",
65    io.in.valid,
66    io.in.ready,
67    io.out.valid,
68    io.out.ready,
69    io.redirectIn.valid,
70    io.redirectIn.bits.isException,
71    io.redirectIn.bits.isFlushPipe,
72    redirectHit,
73    io.redirectIn.bits.brTag.value
74  )
75  XSDebug(io.in.valid, "src1:%x offset:%x func:%b type:JUMP pc:%x res:%x\n", src1, offset, func, pc, res)
76}
77