xref: /XiangShan/src/main/scala/utils/DataDontCareNode.scala (revision 16cf0dd4845f18bdad61fa67b52e30d57b0c60bb) 
1package utils
2
3import chisel3._
4import chipsalliance.rocketchip.config.Parameters
5import chisel3.util.DecoupledIO
6import freechips.rocketchip.diplomacy.{LazyModule, LazyModuleImp}
7import freechips.rocketchip.tilelink.{TLBundle, TLClientNode, TLIdentityNode, TLMasterParameters, TLMasterPortParameters}
8
9class DataDontCareNode(a: Boolean = false, b: Boolean = false, c: Boolean = false, d: Boolean = false)(implicit p: Parameters) extends LazyModule  {
10
11  val node = TLIdentityNode()
12
13  val n = TLClientNode(Seq(TLMasterPortParameters.v1(
14    Seq(
15      TLMasterParameters.v1("DataDontCareNode")
16    )
17  )))
18
19  lazy val module = new LazyModuleImp(this) with HasTLDump{
20    val (out, _) = node.out(0)
21    val (in, _) = node.in(0)
22
23    if (a) {
24      out.a.bits.data := DontCare
25    }
26    if (b) {
27      in.b.bits.data := DontCare
28    }
29    if (c) {
30      out.c.bits.data := DontCare
31    }
32    if (d) {
33      in.d.bits.data := DontCare
34    }
35  }
36}
37
38object DataDontCareNode {
39  def apply(a: Boolean = false, b: Boolean = false, c: Boolean = false, d: Boolean = false)(implicit p: Parameters): TLIdentityNode = {
40    val dataDontCareNode = LazyModule(new DataDontCareNode(a, b, c, d))
41    dataDontCareNode.node
42  }
43}
44