1package device 2 3import freechips.rocketchip.diplomacy.{AddressSet, LazyModule, LazyModuleImp, SimpleDevice} 4import chipsalliance.rocketchip.config.Parameters 5import chisel3._ 6import chisel3.util._ 7import xiangshan._ 8import utils._ 9import freechips.rocketchip.regmapper.RegFieldGroup 10import freechips.rocketchip.tilelink.TLRegisterNode 11import xiangshan.backend.fu.{MMPMAMethod, PMAConst, PMPChecker, PMPReqBundle, PMPRespBundle} 12 13class TLPMAIO(implicit val p: Parameters) extends Bundle with PMAConst { 14 val req = Vec(mmpma.num, Flipped(Valid(new PMPReqBundle(mmpma.lgMaxSize)))) 15 val resp = Vec(mmpma.num, new PMPRespBundle()) 16} 17 18class TLPMA(implicit p: Parameters) extends LazyModule with PMAConst with MMPMAMethod{ 19 val node = TLRegisterNode( 20 address = Seq(AddressSet(mmpma.address/*pmaParam.address*/, mmpma.mask)), 21 device = new SimpleDevice("mmpma", Nil), 22 concurrency = 1, 23 beatBytes = 8 24 ) 25 26 lazy val module = new LazyModuleImp(this) { 27 28 val io = IO(new TLPMAIO) 29 val req = io.req 30 val resp = io.resp 31 32 val (cfg_map, addr_map, pma) = gen_mmpma_mapping(NumPMA) 33 node.regmap( 34 0x0000 -> RegFieldGroup( 35 "MMPMA_Config_Register", desc = Some("MMPMA configuation register"), 36 regs = cfg_map 37 ), 38 // still blank space here, fix it 39 0x0100 -> RegFieldGroup( 40 "MMPMA_Address_Register", desc = Some("MMPMA Address register"), 41 regs = addr_map 42 ) 43 ) 44 45 val pma_check = VecInit(Seq.fill(mmpma.num)( 46 Module(new PMPChecker( 47 mmpma.lgMaxSize/*pmaParam.lgMaxSize*/, 48 mmpma.sameCycle/* pmaParam.sameCycle*/, 49 false)).io 50 )) 51 pma_check.map(_.check_env.apply(mmpma.lgMaxSize.U, pma/*placeHolder*/, pma)) 52 for (i <- 0 until mmpma.num) { 53 pma_check(i).req_apply(req(i).valid, req(i).bits.addr) 54 resp(i) := pma_check(i).resp 55 } 56 } 57 58} 59