1TOP = TopMain 2FPGATOP = FPGANOOP 3BUILD_DIR = ./build 4TOP_V = $(BUILD_DIR)/$(TOP).v 5SCALA_FILE = $(shell find ./src/main/scala -name '*.scala') 6TEST_FILE = $(shell find ./src/test/scala -name '*.scala') 7MEM_GEN = ./scripts/vlsi_mem_gen 8 9SIMTOP = top.TestMain 10IMAGE ?= temp 11 12# co-simulation with DRAMsim3 13ifeq ($(WITH_DRAMSIM3),1) 14ifndef DRAMSIM3_HOME 15$(error DRAMSIM3_HOME is not set) 16endif 17override SIM_ARGS += --with-dramsim3 18endif 19 20# remote machine with more cores to speedup c++ build 21REMOTE ?= localhost 22 23.DEFAULT_GOAL = verilog 24 25help: 26 mill XiangShan.test.runMain top.$(TOP) --help 27 28$(TOP_V): $(SCALA_FILE) 29 mkdir -p $(@D) 30 mill XiangShan.test.runMain $(SIMTOP) -X verilog -td $(@D) --full-stacktrace --output-file $(@F) --disable-all --fpga-platform --remove-assert $(SIM_ARGS) 31 # mill XiangShan.runMain top.$(TOP) -X verilog -td $(@D) --output-file $(@F) --infer-rw $(FPGATOP) --repl-seq-mem -c:$(FPGATOP):-o:$(@D)/$(@F).conf 32 # $(MEM_GEN) $(@D)/$(@F).conf >> $@ 33 # sed -i -e 's/_\(aw\|ar\|w\|r\|b\)_\(\|bits_\)/_\1/g' $@ 34 # @git log -n 1 >> .__head__ 35 # @git diff >> .__diff__ 36 # @sed -i 's/^/\/\// ' .__head__ 37 # @sed -i 's/^/\/\//' .__diff__ 38 # @cat .__head__ .__diff__ $@ > .__out__ 39 # @mv .__out__ $@ 40 # @rm .__head__ .__diff__ 41 42deploy: build/top.zip 43 44 45build/top.zip: $(TOP_V) 46 @zip -r $@ $< $<.conf build/*.anno.json 47 48.PHONY: deploy build/top.zip 49 50verilog: $(TOP_V) 51 52SIM_TOP = XSSimTop 53SIM_TOP_V = $(BUILD_DIR)/$(SIM_TOP).v 54$(SIM_TOP_V): $(SCALA_FILE) $(TEST_FILE) 55 mkdir -p $(@D) 56 date -R 57 mill XiangShan.test.runMain $(SIMTOP) -X verilog -td $(@D) --full-stacktrace --output-file $(@F) $(SIM_ARGS) 58 sed -i '/module XSSimTop/,/endmodule/d' $(SIM_TOP_V) 59 sed -i -e 's/$$fatal/$$finish/g' $(SIM_TOP_V) 60 date -R 61 62EMU_TOP = XSSimSoC 63EMU_CSRC_DIR = $(abspath ./src/test/csrc) 64EMU_VSRC_DIR = $(abspath ./src/test/vsrc) 65EMU_CXXFILES = $(shell find $(EMU_CSRC_DIR) -name "*.cpp") 66EMU_VFILES = $(shell find $(EMU_VSRC_DIR) -name "*.v" -or -name "*.sv") 67 68EMU_CXXFLAGS += -std=c++11 -static -Wall -I$(EMU_CSRC_DIR) 69EMU_CXXFLAGS += -DVERILATOR -Wno-maybe-uninitialized 70EMU_LDFLAGS += -lpthread -lSDL2 -ldl -lz 71 72VEXTRA_FLAGS = -I$(abspath $(BUILD_DIR)) --x-assign unique -O3 -CFLAGS "$(EMU_CXXFLAGS)" -LDFLAGS "$(EMU_LDFLAGS)" 73 74# Verilator trace support 75EMU_TRACE ?= 76ifeq ($(EMU_TRACE),1) 77VEXTRA_FLAGS += --trace 78endif 79 80# Verilator multi-thread support 81EMU_THREADS ?= 1 82ifneq ($(EMU_THREADS),1) 83VEXTRA_FLAGS += --threads $(EMU_THREADS) --threads-dpi none 84endif 85 86# Verilator savable 87EMU_SNAPSHOT ?= 88ifeq ($(EMU_SNAPSHOT),1) 89VEXTRA_FLAGS += --savable 90EMU_CXXFLAGS += -DVM_SAVABLE 91endif 92 93# Verilator coverage 94EMU_COVERAGE ?= 95ifeq ($(EMU_COVERAGE),1) 96VEXTRA_FLAGS += --coverage-line --coverage-toggle 97endif 98 99# co-simulation with DRAMsim3 100ifeq ($(WITH_DRAMSIM3),1) 101EMU_CXXFLAGS += -I$(DRAMSIM3_HOME)/src 102EMU_CXXFLAGS += -DWITH_DRAMSIM3 -DDRAMSIM3_CONFIG=\\\"$(DRAMSIM3_HOME)/configs/XiangShan.ini\\\" -DDRAMSIM3_OUTDIR=\\\"$(BUILD_DIR)\\\" 103EMU_LDFLAGS += $(DRAMSIM3_HOME)/build/libdramsim3.a 104endif 105 106# --trace 107VERILATOR_FLAGS = --top-module $(EMU_TOP) \ 108 +define+VERILATOR=1 \ 109 +define+PRINTF_COND=1 \ 110 +define+RANDOMIZE_REG_INIT \ 111 +define+RANDOMIZE_MEM_INIT \ 112 $(VEXTRA_FLAGS) \ 113 --assert \ 114 --stats-vars \ 115 --output-split 5000 \ 116 --output-split-cfuncs 5000 117 118EMU_MK := $(BUILD_DIR)/emu-compile/V$(EMU_TOP).mk 119EMU_DEPS := $(EMU_VFILES) $(EMU_CXXFILES) 120EMU_HEADERS := $(shell find $(EMU_CSRC_DIR) -name "*.h") 121EMU := $(BUILD_DIR)/emu 122 123$(EMU_MK): $(SIM_TOP_V) | $(EMU_DEPS) 124 @mkdir -p $(@D) 125 date -R 126 verilator --cc --exe $(VERILATOR_FLAGS) \ 127 -o $(abspath $(EMU)) -Mdir $(@D) $^ $(EMU_DEPS) 128 date -R 129 130ifndef NEMU_HOME 131$(error NEMU_HOME is not set) 132endif 133REF_SO := $(NEMU_HOME)/build/riscv64-nemu-interpreter-so 134$(REF_SO): 135 $(MAKE) -C $(NEMU_HOME) ISA=riscv64 SHARE=1 136 137$(EMU): $(EMU_MK) $(EMU_DEPS) $(EMU_HEADERS) $(REF_SO) 138 date -R 139ifeq ($(REMOTE),localhost) 140 CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(abspath $(dir $(EMU_MK))) -f $(abspath $(EMU_MK)) 141else 142 ssh -tt $(REMOTE) 'CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) -j128 VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(abspath $(dir $(EMU_MK))) -f $(abspath $(EMU_MK))' 143endif 144 date -R 145 146SEED ?= $(shell shuf -i 1-10000 -n 1) 147 148VME_SOURCE ?= $(shell pwd) 149VME_MODULE ?= 150 151# log will only be printed when (B<=GTimer<=E) && (L < loglevel) 152# use 'emu -h' to see more details 153B ?= 0 154E ?= -1 155SNAPSHOT ?= 156 157# enable this runtime option if you want to generate a vcd file 158# use 'emu -h' to see more details 159#WAVEFORM = --dump-wave 160 161ifeq ($(SNAPSHOT),) 162SNAPSHOT_OPTION = 163else 164SNAPSHOT_OPTION = --load-snapshot=$(SNAPSHOT) 165endif 166 167ifndef NOOP_HOME 168$(error NOOP_HOME is not set) 169endif 170EMU_FLAGS = -s $(SEED) -b $(B) -e $(E) $(SNAPSHOT_OPTION) $(WAVEFORM) 171 172emu: $(EMU) 173 ls build 174 $(EMU) -i $(IMAGE) $(EMU_FLAGS) 175 176coverage: 177 verilator_coverage --annotate build/logs/annotated --annotate-min 1 build/logs/coverage.dat 178 python3 scripts/coverage/coverage.py build/logs/annotated/XSSimTop.v build/XSSimTop_annotated.v 179 python3 scripts/coverage/statistics.py build/XSSimTop_annotated.v >build/coverage.log 180 181# extract verilog module from sim_top.v 182# usage: make vme VME_MODULE=Roq 183vme: $(SIM_TOP_V) 184 mill XiangShan.runMain utils.ExtractVerilogModules -m $(VME_MODULE) 185 186# usage: make phy_evaluate VME_MODULE=Roq REMOTE=100 187phy_evaluate: vme 188 scp -r ./build/extracted/* $(REMOTE):~/phy_evaluation/remote_run/rtl 189 ssh -tt $(REMOTE) 'cd ~/phy_evaluation/remote_run && $(MAKE) evaluate DESIGN_NAME=$(VME_MODULE)' 190 scp -r $(REMOTE):~/phy_evaluation/remote_run/rpts ./build 191 192# usage: make phy_evaluate_atc VME_MODULE=Roq REMOTE=100 193phy_evaluate_atc: vme 194 scp -r ./build/extracted/* $(REMOTE):~/phy_evaluation/remote_run/rtl 195 ssh -tt $(REMOTE) 'cd ~/phy_evaluation/remote_run && $(MAKE) evaluate_atc DESIGN_NAME=$(VME_MODULE)' 196 scp -r $(REMOTE):~/phy_evaluation/remote_run/rpts ./build 197 198cache: 199 $(MAKE) emu IMAGE=Makefile 200 201clean: 202 git submodule foreach git clean -fdx 203 git clean -fd 204 rm -rf ./build 205 206init: 207 git submodule update --init 208 209bump: 210 git submodule foreach "git fetch origin&&git checkout master&&git reset --hard origin/master" 211 212bsp: 213 mill -i mill.contrib.BSP/install 214.PHONY: verilog emu clean help init bump bsp $(REF_SO) 215