xref: /XiangShan/Makefile (revision 3802dba502b91d813c1e563035b876c4e6288166)
1TOP = TopMain
2FPGATOP = FPGANOOP
3BUILD_DIR = ./build
4TOP_V = $(BUILD_DIR)/$(TOP).v
5SCALA_FILE = $(shell find ./src/main/scala -name '*.scala')
6TEST_FILE = $(shell find ./src/test/scala -name '*.scala')
7MEM_GEN = ./scripts/vlsi_mem_gen
8
9SIMTOP = top.TestMain
10IMAGE ?= temp
11
12# co-simulation with DRAMsim3
13ifeq ($(WITH_DRAMSIM3),1)
14ifndef DRAMSIM3_HOME
15$(error DRAMSIM3_HOME is not set)
16endif
17override SIM_ARGS += --with-dramsim3
18endif
19
20# remote machine with more cores to speedup c++ build
21REMOTE ?= localhost
22
23.DEFAULT_GOAL = verilog
24
25help:
26	mill XiangShan.test.runMain top.$(TOP) --help
27
28$(TOP_V): $(SCALA_FILE)
29	mkdir -p $(@D)
30	mill XiangShan.test.runMain $(SIMTOP) -td $(@D) --full-stacktrace --output-file $(@F) --disable-all --fpga-platform --remove-assert --infer-rw --repl-seq-mem -c:$(SIMTOP):-o:$(@D)/$(@F).conf $(SIM_ARGS)
31	$(MEM_GEN) $(@D)/$(@F).conf --tsmc28 --output_file $(@D)/tsmc28_sram.v > $(@D)/tsmc28_sram.v.conf
32	# sed -i -e 's/_\(aw\|ar\|w\|r\|b\)_\(\|bits_\)/_\1/g' $@
33	@git log -n 1 >> .__head__
34	@git diff >> .__diff__
35	@sed -i 's/^/\/\// ' .__head__
36	@sed -i 's/^/\/\//' .__diff__
37	@cat .__head__ .__diff__ $@ > .__out__
38	@mv .__out__ $@
39	@rm .__head__ .__diff__
40
41deploy: build/top.zip
42
43
44build/top.zip: $(TOP_V)
45	@zip -r $@ $< $<.conf build/*.anno.json
46
47.PHONY: deploy build/top.zip
48
49verilog: $(TOP_V)
50
51SIM_TOP   = XSSimTop
52SIM_TOP_V = $(BUILD_DIR)/$(SIM_TOP).v
53$(SIM_TOP_V): $(SCALA_FILE) $(TEST_FILE)
54	mkdir -p $(@D)
55	date -R
56	mill XiangShan.test.runMain $(SIMTOP) -X verilog -td $(@D) --full-stacktrace --output-file $(@F) $(SIM_ARGS)
57	sed -i '/module XSSimTop/,/endmodule/d' $(SIM_TOP_V)
58	sed -i -e 's/$$fatal/xs_assert(`__LINE__)/g' $(SIM_TOP_V)
59	date -R
60
61EMU_TOP      = XSSimSoC
62EMU_CSRC_DIR = $(abspath ./src/test/csrc)
63EMU_VSRC_DIR = $(abspath ./src/test/vsrc)
64EMU_CXXFILES = $(shell find $(EMU_CSRC_DIR) -name "*.cpp")
65EMU_VFILES   = $(shell find $(EMU_VSRC_DIR) -name "*.v" -or -name "*.sv")
66
67EMU_CXXFLAGS += -std=c++11 -static -Wall -I$(EMU_CSRC_DIR)
68EMU_CXXFLAGS += -DVERILATOR -Wno-maybe-uninitialized
69EMU_LDFLAGS  += -lpthread -lSDL2 -ldl -lz
70
71VEXTRA_FLAGS  = -I$(abspath $(BUILD_DIR)) --x-assign unique -O3 -CFLAGS "$(EMU_CXXFLAGS)" -LDFLAGS "$(EMU_LDFLAGS)"
72
73# Verilator trace support
74EMU_TRACE ?=
75ifeq ($(EMU_TRACE),1)
76VEXTRA_FLAGS += --trace
77endif
78
79# Verilator multi-thread support
80EMU_THREADS  ?= 1
81ifneq ($(EMU_THREADS),1)
82VEXTRA_FLAGS += --threads $(EMU_THREADS) --threads-dpi all
83endif
84
85# Verilator savable
86EMU_SNAPSHOT ?=
87ifeq ($(EMU_SNAPSHOT),1)
88VEXTRA_FLAGS += --savable
89EMU_CXXFLAGS += -DVM_SAVABLE
90endif
91
92# Verilator coverage
93EMU_COVERAGE ?=
94ifeq ($(EMU_COVERAGE),1)
95VEXTRA_FLAGS += --coverage-line --coverage-toggle
96endif
97
98# co-simulation with DRAMsim3
99ifeq ($(WITH_DRAMSIM3),1)
100EMU_CXXFLAGS += -I$(DRAMSIM3_HOME)/src
101EMU_CXXFLAGS += -DWITH_DRAMSIM3 -DDRAMSIM3_CONFIG=\\\"$(DRAMSIM3_HOME)/configs/XiangShan.ini\\\" -DDRAMSIM3_OUTDIR=\\\"$(BUILD_DIR)\\\"
102EMU_LDFLAGS  += $(DRAMSIM3_HOME)/build/libdramsim3.a
103endif
104
105# --trace
106VERILATOR_FLAGS = --top-module $(EMU_TOP) \
107  +define+VERILATOR=1 \
108  +define+PRINTF_COND=1 \
109  +define+RANDOMIZE_REG_INIT \
110  +define+RANDOMIZE_MEM_INIT \
111  $(VEXTRA_FLAGS) \
112  --assert \
113  --stats-vars \
114  --output-split 5000 \
115  --output-split-cfuncs 5000
116
117EMU_MK := $(BUILD_DIR)/emu-compile/V$(EMU_TOP).mk
118EMU_DEPS := $(EMU_VFILES) $(EMU_CXXFILES)
119EMU_HEADERS := $(shell find $(EMU_CSRC_DIR) -name "*.h")
120EMU := $(BUILD_DIR)/emu
121
122$(EMU_MK): $(SIM_TOP_V) | $(EMU_DEPS)
123	@mkdir -p $(@D)
124	date -R
125	verilator --cc --exe $(VERILATOR_FLAGS) \
126		-o $(abspath $(EMU)) -Mdir $(@D) $^ $(EMU_DEPS)
127	date -R
128
129ifndef NEMU_HOME
130$(error NEMU_HOME is not set)
131endif
132REF_SO := $(NEMU_HOME)/build/riscv64-nemu-interpreter-so
133$(REF_SO):
134	$(MAKE) -C $(NEMU_HOME) ISA=riscv64 SHARE=1
135
136LOCK = /var/emu/emu.lock
137LOCK_BIN = $(abspath $(BUILD_DIR)/lock-emu)
138
139$(LOCK_BIN): ./scripts/utils/lock-emu.c
140	gcc $^ -o $@
141
142$(EMU): $(EMU_MK) $(EMU_DEPS) $(EMU_HEADERS) $(REF_SO) $(LOCK_BIN)
143	date -R
144ifeq ($(REMOTE),localhost)
145	CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(abspath $(dir $(EMU_MK))) -f $(abspath $(EMU_MK))
146else
147	@echo "try to get emu.lock ..."
148	ssh -tt $(REMOTE) '$(LOCK_BIN) $(LOCK)'
149	@echo "get lock"
150	ssh -tt $(REMOTE) 'CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) -j230 VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(abspath $(dir $(EMU_MK))) -f $(abspath $(EMU_MK))'
151	@echo "release lock ..."
152	ssh -tt $(REMOTE) 'rm -f $(LOCK)'
153endif
154	date -R
155
156SEED ?= $(shell shuf -i 1-10000 -n 1)
157
158VME_SOURCE ?= $(shell pwd)/build/$(TOP).v
159VME_MODULES ?=
160
161# log will only be printed when (B<=GTimer<=E) && (L < loglevel)
162# use 'emu -h' to see more details
163B ?= 0
164E ?= -1
165SNAPSHOT ?=
166
167# enable this runtime option if you want to generate a vcd file
168# use 'emu -h' to see more details
169#WAVEFORM = --dump-wave
170
171ifeq ($(SNAPSHOT),)
172SNAPSHOT_OPTION =
173else
174SNAPSHOT_OPTION = --load-snapshot=$(SNAPSHOT)
175endif
176
177ifndef NOOP_HOME
178$(error NOOP_HOME is not set)
179endif
180EMU_FLAGS = -s $(SEED) -b $(B) -e $(E) $(SNAPSHOT_OPTION) $(WAVEFORM)
181
182emu: $(EMU)
183	ls build
184	$(EMU) -i $(IMAGE) $(EMU_FLAGS)
185
186coverage:
187	verilator_coverage --annotate build/logs/annotated --annotate-min 1 build/logs/coverage.dat
188	python3 scripts/coverage/coverage.py build/logs/annotated/XSSimTop.v build/XSSimTop_annotated.v
189	python3 scripts/coverage/statistics.py build/XSSimTop_annotated.v >build/coverage.log
190
191#-----------------------timing scripts-------------------------
192# run "make vme/tap help=1" to get help info
193
194# extract verilog module from TopMain.v
195# usage: make vme VME_MODULES=Roq
196TIMING_SCRIPT_PATH = ./timingScripts
197vme: $(TOP_V)
198	make -C $(TIMING_SCRIPT_PATH) vme
199
200# get and sort timing analysis with total delay(start+end) and max delay(start or end)
201# and print it out
202tap:
203	make -C $(TIMING_SCRIPT_PATH) tap
204
205# usage: make phy_evaluate VME_MODULE=Roq REMOTE=100
206phy_evaluate: vme
207	scp -r ./build/extracted/* $(REMOTE):~/phy_evaluation/remote_run/rtl
208	ssh -tt $(REMOTE) 'cd ~/phy_evaluation/remote_run && $(MAKE) evaluate DESIGN_NAME=$(VME_MODULE)'
209	scp -r  $(REMOTE):~/phy_evaluation/remote_run/rpts ./build
210
211# usage: make phy_evaluate_atc VME_MODULE=Roq REMOTE=100
212phy_evaluate_atc: vme
213	scp -r ./build/extracted/* $(REMOTE):~/phy_evaluation/remote_run/rtl
214	ssh -tt $(REMOTE) 'cd ~/phy_evaluation/remote_run && $(MAKE) evaluate_atc DESIGN_NAME=$(VME_MODULE)'
215	scp -r  $(REMOTE):~/phy_evaluation/remote_run/rpts ./build
216
217cache:
218	$(MAKE) emu IMAGE=Makefile
219
220release-lock:
221	ssh -tt $(REMOTE) 'rm -f $(LOCK)'
222
223clean:
224	git submodule foreach git clean -fdx
225	git clean -fd
226	rm -rf ./build
227
228init:
229	git submodule update --init
230
231bump:
232	git submodule foreach "git fetch origin&&git checkout master&&git reset --hard origin/master"
233
234bsp:
235	mill -i mill.contrib.BSP/install
236.PHONY: verilog emu clean help init bump bsp $(REF_SO)
237