1TOP = TopMain 2FPGATOP = FPGANOOP 3BUILD_DIR = ./build 4TOP_V = $(BUILD_DIR)/$(TOP).v 5SCALA_FILE = $(shell find ./src/main/scala -name '*.scala') 6TEST_FILE = $(shell find ./src/test/scala -name '*.scala') 7MEM_GEN = ./scripts/vlsi_mem_gen 8 9SIMTOP = top.TestMain 10IMAGE ?= temp 11 12# co-simulation with DRAMsim3 13ifeq ($(WITH_DRAMSIM3),1) 14ifndef DRAMSIM3_HOME 15$(error DRAMSIM3_HOME is not set) 16endif 17override SIM_ARGS += --with-dramsim3 18endif 19 20# remote machine with more cores to speedup c++ build 21REMOTE ?= localhost 22 23.DEFAULT_GOAL = verilog 24 25help: 26 mill XiangShan.test.runMain top.$(TOP) --help 27 28$(TOP_V): $(SCALA_FILE) 29 mkdir -p $(@D) 30 mill XiangShan.test.runMain $(SIMTOP) -X verilog -td $(@D) --full-stacktrace --output-file $(@F) --disable-all --fpga-platform --remove-assert $(SIM_ARGS) 31 # mill XiangShan.runMain top.$(TOP) -X verilog -td $(@D) --output-file $(@F) --infer-rw $(FPGATOP) --repl-seq-mem -c:$(FPGATOP):-o:$(@D)/$(@F).conf 32 # $(MEM_GEN) $(@D)/$(@F).conf >> $@ 33 # sed -i -e 's/_\(aw\|ar\|w\|r\|b\)_\(\|bits_\)/_\1/g' $@ 34 # @git log -n 1 >> .__head__ 35 # @git diff >> .__diff__ 36 # @sed -i 's/^/\/\// ' .__head__ 37 # @sed -i 's/^/\/\//' .__diff__ 38 # @cat .__head__ .__diff__ $@ > .__out__ 39 # @mv .__out__ $@ 40 # @rm .__head__ .__diff__ 41 42deploy: build/top.zip 43 44 45build/top.zip: $(TOP_V) 46 @zip -r $@ $< $<.conf build/*.anno.json 47 48.PHONY: deploy build/top.zip 49 50verilog: $(TOP_V) 51 52SIM_TOP = XSSimTop 53SIM_TOP_V = $(BUILD_DIR)/$(SIM_TOP).v 54$(SIM_TOP_V): $(SCALA_FILE) $(TEST_FILE) 55 mkdir -p $(@D) 56 date -R 57 mill XiangShan.test.runMain $(SIMTOP) -X verilog -td $(@D) --full-stacktrace --output-file $(@F) $(SIM_ARGS) 58 sed -i '/module XSSimTop/,/endmodule/d' $(SIM_TOP_V) 59 sed -i -e 's/$$fatal/xs_assert(`__LINE__)/g' $(SIM_TOP_V) 60 date -R 61 62EMU_TOP = XSSimSoC 63EMU_CSRC_DIR = $(abspath ./src/test/csrc) 64EMU_VSRC_DIR = $(abspath ./src/test/vsrc) 65EMU_CXXFILES = $(shell find $(EMU_CSRC_DIR) -name "*.cpp") 66EMU_VFILES = $(shell find $(EMU_VSRC_DIR) -name "*.v" -or -name "*.sv") 67 68EMU_CXXFLAGS += -std=c++11 -static -Wall -I$(EMU_CSRC_DIR) 69EMU_CXXFLAGS += -DVERILATOR -Wno-maybe-uninitialized 70EMU_LDFLAGS += -lpthread -lSDL2 -ldl -lz 71 72VEXTRA_FLAGS = -I$(abspath $(BUILD_DIR)) --x-assign unique -O3 -CFLAGS "$(EMU_CXXFLAGS)" -LDFLAGS "$(EMU_LDFLAGS)" 73 74# Verilator trace support 75EMU_TRACE ?= 76ifeq ($(EMU_TRACE),1) 77VEXTRA_FLAGS += --trace 78endif 79 80# Verilator multi-thread support 81EMU_THREADS ?= 1 82ifneq ($(EMU_THREADS),1) 83VEXTRA_FLAGS += --threads $(EMU_THREADS) --threads-dpi all 84endif 85 86# Verilator savable 87EMU_SNAPSHOT ?= 88ifeq ($(EMU_SNAPSHOT),1) 89VEXTRA_FLAGS += --savable 90EMU_CXXFLAGS += -DVM_SAVABLE 91endif 92 93# Verilator coverage 94EMU_COVERAGE ?= 95ifeq ($(EMU_COVERAGE),1) 96VEXTRA_FLAGS += --coverage-line --coverage-toggle 97endif 98 99# co-simulation with DRAMsim3 100ifeq ($(WITH_DRAMSIM3),1) 101EMU_CXXFLAGS += -I$(DRAMSIM3_HOME)/src 102EMU_CXXFLAGS += -DWITH_DRAMSIM3 -DDRAMSIM3_CONFIG=\\\"$(DRAMSIM3_HOME)/configs/XiangShan.ini\\\" -DDRAMSIM3_OUTDIR=\\\"$(BUILD_DIR)\\\" 103EMU_LDFLAGS += $(DRAMSIM3_HOME)/build/libdramsim3.a 104endif 105 106# --trace 107VERILATOR_FLAGS = --top-module $(EMU_TOP) \ 108 +define+VERILATOR=1 \ 109 +define+PRINTF_COND=1 \ 110 +define+RANDOMIZE_REG_INIT \ 111 +define+RANDOMIZE_MEM_INIT \ 112 $(VEXTRA_FLAGS) \ 113 --assert \ 114 --stats-vars \ 115 --output-split 5000 \ 116 --output-split-cfuncs 5000 117 118EMU_MK := $(BUILD_DIR)/emu-compile/V$(EMU_TOP).mk 119EMU_DEPS := $(EMU_VFILES) $(EMU_CXXFILES) 120EMU_HEADERS := $(shell find $(EMU_CSRC_DIR) -name "*.h") 121EMU := $(BUILD_DIR)/emu 122 123$(EMU_MK): $(SIM_TOP_V) | $(EMU_DEPS) 124 @mkdir -p $(@D) 125 date -R 126 verilator --cc --exe $(VERILATOR_FLAGS) \ 127 -o $(abspath $(EMU)) -Mdir $(@D) $^ $(EMU_DEPS) 128 date -R 129 130ifndef NEMU_HOME 131$(error NEMU_HOME is not set) 132endif 133REF_SO := $(NEMU_HOME)/build/riscv64-nemu-interpreter-so 134$(REF_SO): 135 $(MAKE) -C $(NEMU_HOME) ISA=riscv64 SHARE=1 136 137LOCK = /var/emu/emu.lock 138LOCK_BIN = $(abspath $(BUILD_DIR)/lock-emu) 139 140$(LOCK_BIN): ./scripts/utils/lock-emu.c 141 gcc $^ -o $@ 142 143$(EMU): $(EMU_MK) $(EMU_DEPS) $(EMU_HEADERS) $(REF_SO) $(LOCK_BIN) 144 date -R 145ifeq ($(REMOTE),localhost) 146 CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(abspath $(dir $(EMU_MK))) -f $(abspath $(EMU_MK)) 147else 148 @echo "try to get emu.lock ..." 149 ssh -tt $(REMOTE) '$(LOCK_BIN) $(LOCK)' 150 @echo "get lock" 151 ssh -tt $(REMOTE) 'CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) -j230 VM_PARALLEL_BUILDS=1 OPT_FAST="-O3" -C $(abspath $(dir $(EMU_MK))) -f $(abspath $(EMU_MK))' 152 @echo "release lock ..." 153 ssh -tt $(REMOTE) 'rm -f $(LOCK)' 154endif 155 date -R 156 157SEED ?= $(shell shuf -i 1-10000 -n 1) 158 159VME_SOURCE ?= $(shell pwd)/build/$(TOP).v 160VME_MODULES ?= 161 162# log will only be printed when (B<=GTimer<=E) && (L < loglevel) 163# use 'emu -h' to see more details 164B ?= 0 165E ?= -1 166SNAPSHOT ?= 167 168# enable this runtime option if you want to generate a vcd file 169# use 'emu -h' to see more details 170#WAVEFORM = --dump-wave 171 172ifeq ($(SNAPSHOT),) 173SNAPSHOT_OPTION = 174else 175SNAPSHOT_OPTION = --load-snapshot=$(SNAPSHOT) 176endif 177 178ifndef NOOP_HOME 179$(error NOOP_HOME is not set) 180endif 181EMU_FLAGS = -s $(SEED) -b $(B) -e $(E) $(SNAPSHOT_OPTION) $(WAVEFORM) 182 183emu: $(EMU) 184 ls build 185 $(EMU) -i $(IMAGE) $(EMU_FLAGS) 186 187coverage: 188 verilator_coverage --annotate build/logs/annotated --annotate-min 1 build/logs/coverage.dat 189 python3 scripts/coverage/coverage.py build/logs/annotated/XSSimTop.v build/XSSimTop_annotated.v 190 python3 scripts/coverage/statistics.py build/XSSimTop_annotated.v >build/coverage.log 191 192#-----------------------timing scripts------------------------- 193# run "make vme/tap help=1" to get help info 194 195# extract verilog module from TopMain.v 196# usage: make vme VME_MODULES=Roq 197TIMING_SCRIPT_PATH = ./timingScripts 198vme: $(TOP_V) 199 make -C $(TIMING_SCRIPT_PATH) vme 200 201# get and sort timing analysis with total delay(start+end) and max delay(start or end) 202# and print it out 203tap: 204 make -C $(TIMING_SCRIPT_PATH) tap 205 206# usage: make phy_evaluate VME_MODULE=Roq REMOTE=100 207phy_evaluate: vme 208 scp -r ./build/extracted/* $(REMOTE):~/phy_evaluation/remote_run/rtl 209 ssh -tt $(REMOTE) 'cd ~/phy_evaluation/remote_run && $(MAKE) evaluate DESIGN_NAME=$(VME_MODULE)' 210 scp -r $(REMOTE):~/phy_evaluation/remote_run/rpts ./build 211 212# usage: make phy_evaluate_atc VME_MODULE=Roq REMOTE=100 213phy_evaluate_atc: vme 214 scp -r ./build/extracted/* $(REMOTE):~/phy_evaluation/remote_run/rtl 215 ssh -tt $(REMOTE) 'cd ~/phy_evaluation/remote_run && $(MAKE) evaluate_atc DESIGN_NAME=$(VME_MODULE)' 216 scp -r $(REMOTE):~/phy_evaluation/remote_run/rpts ./build 217 218cache: 219 $(MAKE) emu IMAGE=Makefile 220 221release-lock: 222 ssh -tt $(REMOTE) 'rm -f $(LOCK)' 223 224clean: 225 git submodule foreach git clean -fdx 226 git clean -fd 227 rm -rf ./build 228 229init: 230 git submodule update --init 231 232bump: 233 git submodule foreach "git fetch origin&&git checkout master&&git reset --hard origin/master" 234 235bsp: 236 mill -i mill.contrib.BSP/install 237.PHONY: verilog emu clean help init bump bsp $(REF_SO) 238