xref: /XiangShan/Makefile (revision 709152c801c3bcc8b2b8c20f1017a3001e05eb3c)
184e9d6ebSZihao YuTOP = TopMain
21cd939dcSZihao YuFPGATOP = FPGANOOP
384e9d6ebSZihao YuBUILD_DIR = ./build
484e9d6ebSZihao YuTOP_V = $(BUILD_DIR)/$(TOP).v
584e9d6ebSZihao YuSCALA_FILE = $(shell find ./src/main/scala -name '*.scala')
61a772c7eSZihao YuTEST_FILE = $(shell find ./src/test/scala -name '*.scala')
7885733f1SZihao YuMEM_GEN = ./scripts/vlsi_mem_gen
884e9d6ebSZihao Yu
90991dc5eSZihao YuSIMTOP = top.TestMain
10e8ab4e39SZihao YuIMAGE ?= temp
1107379a26SZihao Yu
120016469dSZihao Yu.DEFAULT_GOAL = verilog
130016469dSZihao Yu
14d22ebddaSZihao Yuhelp:
152905e463SZihao Yu	mill chiselModule.test.runMain top.$(TOP) --help
16d22ebddaSZihao Yu
1784e9d6ebSZihao Yu$(TOP_V): $(SCALA_FILE)
1884e9d6ebSZihao Yu	mkdir -p $(@D)
192905e463SZihao Yu	mill chiselModule.runMain top.$(TOP) -td $(@D) --output-file $(@F) --infer-rw $(FPGATOP) --repl-seq-mem -c:$(FPGATOP):-o:$(@D)/$(@F).conf
20885733f1SZihao Yu	$(MEM_GEN) $(@D)/$(@F).conf >> $@
2106977425SZihao Yu	sed -i -e 's/_\(aw\|ar\|w\|r\|b\)_\(\|bits_\)/_\1/g' $@
2284e9d6ebSZihao Yu
23*709152c8SWang Huizhedeploy: build/top.zip
24*709152c8SWang Huizhe
25*709152c8SWang Huizhe
26*709152c8SWang Huizhebuild/top.zip: $(TOP_V)
27*709152c8SWang Huizhe	@git log -n 1 >> .__head__
28*709152c8SWang Huizhe	@git diff >> .__diff__
29*709152c8SWang Huizhe	@sed -i 's/^/\/\// ' .__head__
30*709152c8SWang Huizhe	@sed -i 's/^/\/\//' .__diff__
31*709152c8SWang Huizhe	@cat .__head__ .__diff__ $< > .__out__
32*709152c8SWang Huizhe	@mv .__out__ $<
33*709152c8SWang Huizhe	@rm .__head__ .__diff__
34*709152c8SWang Huizhe	@zip -r $@ $< $<.conf build/*.anno.json
35*709152c8SWang Huizhe
36*709152c8SWang Huizhe.PHONY: deploy build/top.zip
37*709152c8SWang Huizhe
380016469dSZihao Yuverilog: $(TOP_V)
390016469dSZihao Yu
4019dedbf6SZihao YuSIM_TOP = NOOPSimTop
4119dedbf6SZihao YuSIM_TOP_V = $(BUILD_DIR)/$(SIM_TOP).v
421a772c7eSZihao Yu$(SIM_TOP_V): $(SCALA_FILE) $(TEST_FILE)
4319dedbf6SZihao Yu	mkdir -p $(@D)
449ae8972bSZihao Yu	mill chiselModule.test.runMain $(SIMTOP) -td $(@D) --output-file $(@F)
4519dedbf6SZihao Yu
4619dedbf6SZihao Yu
4719dedbf6SZihao YuEMU_CSRC_DIR = $(abspath ./src/test/csrc)
4819dedbf6SZihao YuEMU_VSRC_DIR = $(abspath ./src/test/vsrc)
4919dedbf6SZihao YuEMU_CXXFILES = $(shell find $(EMU_CSRC_DIR) -name "*.cpp")
5019dedbf6SZihao YuEMU_VFILES = $(shell find $(EMU_VSRC_DIR) -name "*.v" -or -name "*.sv")
5119dedbf6SZihao Yu
5219dedbf6SZihao YuEMU_CXXFLAGS  = -O3 -std=c++11 -static -g -Wall -I$(EMU_CSRC_DIR)
5319dedbf6SZihao YuEMU_CXXFLAGS += -DVERILATOR -Wno-maybe-uninitialized
54155966d2SZihao YuEMU_LDFLAGS   = -lpthread -lSDL2 -ldl
5519dedbf6SZihao Yu
5619dedbf6SZihao YuVERILATOR_FLAGS = --top-module $(SIM_TOP) \
57c357e0e1SZihao Yu  +define+VERILATOR=1 \
5819dedbf6SZihao Yu  +define+PRINTF_COND=1 \
5919dedbf6SZihao Yu  +define+RANDOMIZE_REG_INIT \
60a7fc95b2SZihao Yu  --assert \
61a7fc95b2SZihao Yu  --output-split 5000 \
62a7fc95b2SZihao Yu  --output-split-cfuncs 5000 \
63b65ec060SZihao Yu  -I$(abspath $(BUILD_DIR)) \
6419dedbf6SZihao Yu  --x-assign unique -O3 -CFLAGS "$(EMU_CXXFLAGS)" \
6519dedbf6SZihao Yu  -LDFLAGS "$(EMU_LDFLAGS)"
6619dedbf6SZihao Yu
6719dedbf6SZihao YuEMU_MK := $(BUILD_DIR)/emu-compile/V$(SIM_TOP).mk
6819dedbf6SZihao YuEMU_DEPS := $(EMU_VFILES) $(EMU_CXXFILES)
6919dedbf6SZihao YuEMU_HEADERS := $(shell find $(EMU_CSRC_DIR) -name "*.h")
7019dedbf6SZihao YuEMU := $(BUILD_DIR)/emu
7119dedbf6SZihao Yu
7219dedbf6SZihao Yu$(EMU_MK): $(SIM_TOP_V) | $(EMU_DEPS)
7319dedbf6SZihao Yu	@mkdir -p $(@D)
7419dedbf6SZihao Yu	verilator --cc --exe $(VERILATOR_FLAGS) \
759ae8972bSZihao Yu		-o $(abspath $(EMU)) -Mdir $(@D) $^ $(EMU_DEPS)
7619dedbf6SZihao Yu
77aa38aa4dSWilliam WangREF_SO := $(NEMU_HOME)/build/riscv64-nemu-so
785211b1c1SZihao Yu$(REF_SO):
79aa38aa4dSWilliam Wang	$(MAKE) -C $(NEMU_HOME) ISA=riscv64 SHARE=1
805211b1c1SZihao Yu
815211b1c1SZihao Yu$(EMU): $(EMU_MK) $(EMU_DEPS) $(EMU_HEADERS) $(REF_SO)
825211b1c1SZihao Yu	CPPFLAGS=-DREF_SO=\\\"$(REF_SO)\\\" $(MAKE) -C $(dir $(EMU_MK)) -f $(abspath $(EMU_MK))
8319dedbf6SZihao Yu
8499b50133SZihao Yuifdef mainargs
850381ae5aSZihao YuMAINARGS = -m $(mainargs)
8699b50133SZihao Yuendif
8799b50133SZihao Yu
8819dedbf6SZihao Yuemu: $(EMU)
8999b50133SZihao Yu	@$(EMU) -i $(IMAGE) $(MAINARGS)
9019dedbf6SZihao Yu
919a36b64cSZihao Yucache:
92bc5a4cf6SZihao Yu	$(MAKE) emu IMAGE=Makefile
939a36b64cSZihao Yu
9484e9d6ebSZihao Yuclean:
95ce52d698SZihao Yu	rm -rf $(BUILD_DIR)
960016469dSZihao Yu
97e4679866SZihao Yu.PHONY: verilog emu clean help $(REF_SO)
98