Searched refs:PCI_L1SS_CTL1_L1_2_MASK (Results 1 – 2 of 2) sorted by relevance
171 PCI_L1SS_CTL1_L1_2_MASK, 0); in pci_restore_aspm_l1ss_state()173 PCI_L1SS_CTL1_L1_2_MASK, 0); in pci_restore_aspm_l1ss_state()180 pl_l1_2_enable = pl_ctl1 & PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()181 pl_ctl1 &= ~PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()182 cl_l1_2_enable = cl_ctl1 & PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()183 cl_ctl1 &= ~PCI_L1SS_CTL1_L1_2_MASK; in pci_restore_aspm_l1ss_state()694 pl1_2_enables = pctl1 & PCI_L1SS_CTL1_L1_2_MASK; in aspm_calc_l12_info()695 cl1_2_enables = cctl1 & PCI_L1SS_CTL1_L1_2_MASK; in aspm_calc_l12_info()700 PCI_L1SS_CTL1_L1_2_MASK, 0); in aspm_calc_l12_info()703 PCI_L1SS_CTL1_L1_2_MASK, 0); in aspm_calc_l12_info()
1122 #define PCI_L1SS_CTL1_L1_2_MASK 0x00000005 macro