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Searched refs:GPTCKDIVCR (Results 1 – 3 of 3) sorted by relevance

/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/fsp/src/bsp/mcu/all/
H A Dbsp_clocks.c1346 R_SYSTEM->GPTCKDIVCR = BSP_CFG_GPTCLK_DIV; in bsp_clock_init()
/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/fsp/src/r_gpt/
H A Dr_gpt.c1065 uint32_t divider = R_SYSTEM->GPTCKDIVCR; in R_GPT_PwmOutputDelayInitialize()
/btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include/
H A Drenesas.h21809 …__IOM uint8_t GPTCKDIVCR; /*!< (@ 0x0000006F) GPT Clock Division Control Register … member