| /aosp_15_r20/art/compiler/utils/x86/ |
| H A D | managed_register_x86_test.cc | 93 X86ManagedRegister reg = X86ManagedRegister::FromX87Register(ST0); in TEST()
99 EXPECT_EQ(ST0, reg.AsX87Register()); in TEST()
217 EXPECT_TRUE(!reg_eax.Equals(X86ManagedRegister::FromX87Register(ST0))); in TEST()
228 EXPECT_TRUE(!reg_xmm0.Equals(X86ManagedRegister::FromX87Register(ST0))); in TEST()
233 X86ManagedRegister reg_st0 = X86ManagedRegister::FromX87Register(ST0); in TEST()
239 EXPECT_TRUE(reg_st0.Equals(X86ManagedRegister::FromX87Register(ST0))); in TEST()
250 EXPECT_TRUE(!reg_pair.Equals(X86ManagedRegister::FromX87Register(ST0))); in TEST()
263 EXPECT_TRUE(!reg.Overlaps(X86ManagedRegister::FromX87Register(ST0))); in TEST()
274 EXPECT_TRUE(!reg.Overlaps(X86ManagedRegister::FromX87Register(ST0))); in TEST()
285 EXPECT_TRUE(!reg.Overlaps(X86ManagedRegister::FromX87Register(ST0))); in TEST()
[all …]
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| H A D | constants_x86.h | 44 ST0 = 0, enumerator
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| H A D | jni_macro_assembler_x86.cc | 323 CHECK_EQ(src.AsX87Register(), ST0); in Move()
327 CHECK_EQ(src.AsX87Register(), ST0); in Move()
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| /aosp_15_r20/art/compiler/utils/x86_64/ |
| H A D | managed_register_x86_64_test.cc | 92 X86_64ManagedRegister reg = X86_64ManagedRegister::FromX87Register(ST0); in TEST()
98 EXPECT_EQ(ST0, reg.AsX87Register()); in TEST()
216 EXPECT_TRUE(!reg_eax.Equals(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
227 EXPECT_TRUE(!reg_xmm0.Equals(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
232 X86_64ManagedRegister reg_st0 = X86_64ManagedRegister::FromX87Register(ST0); in TEST()
238 EXPECT_TRUE(reg_st0.Equals(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
249 EXPECT_TRUE(!reg_pair.Equals(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
262 EXPECT_TRUE(!reg.Overlaps(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
273 EXPECT_TRUE(!reg.Overlaps(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
284 EXPECT_TRUE(!reg.Overlaps(X86_64ManagedRegister::FromX87Register(ST0))); in TEST()
[all …]
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| H A D | constants_x86_64.h | 74 ST0 = 0, enumerator
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| H A D | jni_macro_assembler_x86_64.cc | 388 CHECK_EQ(src.AsX87Register(), ST0); in Move()
392 CHECK_EQ(src.AsX87Register(), ST0); in Move()
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| /aosp_15_r20/prebuilts/go/linux-x86/src/cmd/compile/internal/test/ |
| D | switch_test.go | 176 type ST0 struct { struct
179 func (ST0) si0() { argument
247 ST0{},
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| /aosp_15_r20/external/llvm/test/CodeGen/X86/ |
| H A D | inline-asm-fpstack.ll | 349 …es:frndint> [sideeffect] [attdialect], $0:[regdef], %ST0<imp-def,tied5>, $1:[reguse tiedto:$0], %S…
351 ; %FP0<def> = COPY %ST0
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| H A D | ipra-reg-usage.ll | 6 …P4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5 MM6 MM7 R11 ST0 ST1 ST2 ST3 ST4 ST5…
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 205 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
880 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0); in popStackAfter()
1168 MachineOperand::CreateReg(X86::ST0, /*isDef*/ true, /*isImp*/ true)); in handleZeroArgFP()
1216 MachineOperand::CreateReg(X86::ST0, /*isDef*/ false, /*isImp*/ true)); in handleOneArgFP()
1713 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
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| H A D | X86Instr3DNow.td | 78 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7] in
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 205 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
852 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0); in popStackAfter()
1111 MachineOperand::CreateReg(X86::ST0, /*isDef*/ true, /*isImp*/ true)); in handleZeroArgFP()
1157 MachineOperand::CreateReg(X86::ST0, /*isDef*/ false, /*isImp*/ true)); in handleOneArgFP()
1647 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
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| H A D | X86Instr3DNow.td | 78 ST0, ST1, ST2, ST3, ST4, ST5, ST6, ST7] in
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| H A D | X86RegisterInfo.cpp | 573 Reserved.set(X86::ST0 + n); in getReservedRegs()
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| /aosp_15_r20/external/python/cpython2/Lib/test/ |
| D | allsans.pem | 10 ST0/px0zmKsYgmH8KkhfH7MNfeX9rLCpPJuXA/eo2G03tzGEPqqwQhxsb2ygv2Qs
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| /aosp_15_r20/external/llvm/lib/Target/X86/ |
| H A D | X86FloatingPoint.cpp | 197 return StackTop - 1 - getSlot(RegNo) + X86::ST0; in getSTReg()
483 MBB->addLiveIn(X86::ST0+i-1); in setupBlockStack()
805 I = BuildMI(*MBB, ++I, dl, TII->get(X86::ST_FPrr)).addReg(X86::ST0); in popStackAfter()
1583 Op.setReg(X86::ST0 + FPReg); in handleSpecialFP()
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| H A D | X86RegisterInfo.td | 151 // MMX Registers. These are actually aliased to ST0 .. ST7
242 def ST0 : X86Reg<"st(0)", 0>, DwarfRegNum<[33, 12, 11]>;
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| H A D | X86RegisterInfo.cpp | 478 Reserved.set(X86::ST0 + n); in getReservedRegs()
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| /aosp_15_r20/art/compiler/jni/quick/x86/ |
| H A D | calling_convention_x86.cc | 108 return X86ManagedRegister::FromX87Register(ST0); in ReturnRegisterForShorty()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86MCTargetDesc.cpp | 207 {codeview::RegisterId::ST0, X86::ST0}, in initLLVMToSEHAndCVRegMapping()
216 {codeview::RegisterId::ST0, X86::FP0}, in initLLVMToSEHAndCVRegMapping()
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| /aosp_15_r20/external/llvm/lib/Target/Hexagon/ |
| H A D | HexagonScheduleV4.td | 152 // ST0
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| H A D | X86GenRegisterInfo.inc | 155 ST0 = 135,
1271 { X86::ST0 },
2396 X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7,
2748 { 33U, X86::ST0 },
2801 { 12U, X86::ST0 },
2846 { 11U, X86::ST0 },
2915 { 33U, X86::ST0 },
2968 { 12U, X86::ST0 },
3013 { 11U, X86::ST0 },
3091 { X86::ST0, 33U },
[all …]
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| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| H A D | X86IntelInstPrinter.cpp | 441 if (Reg == X86::ST0) in printSTiRegOperand()
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| H A D | X86ATTInstPrinter.cpp | 484 if (Reg == X86::ST0) in printSTiRegOperand()
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| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/X86/ |
| H A D | X86GenRegisterInfo.inc | 156 ST0 = 136,
1344 { X86::ST0 },
2527 X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7,
2889 { 33U, X86::ST0 },
2946 { 12U, X86::ST0 },
2992 { 11U, X86::ST0 },
3061 { 33U, X86::ST0 },
3118 { 12U, X86::ST0 },
3164 { 11U, X86::ST0 },
3247 { X86::ST0, 33U },
[all …]
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