| /aosp_15_r20/external/llvm/test/MC/AArch64/ |
| H A D | arm64-spsel-sysreg.s | 4 msr SPSel, #0
5 msr SPSel, x0
8 mrs x0, SPSel
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| H A D | arm64-system-encoding.s | 136 msr SPSel, x3
216 ; CHECK: msr SPSel, x3 ; encoding: [0x03,0x42,0x18,0xd5]
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| H A D | basic-a64-instructions.s | 3819 msr SPSel, x12
4367 mrs x9, SPSel
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| /aosp_15_r20/external/coreboot/payloads/libpayload/arch/arm64/ |
| H A D | exception_asm.S | 110 msr SPSel, #0
118 msr SPSel, #1
168 msr SPSel, #1
170 msr SPSel, #0
|
| /aosp_15_r20/external/coreboot/src/arch/arm64/ |
| H A D | transition_asm.S | 113 msr SPSel, #SPSR_USE_L
149 msr SPSel, #SPSR_USE_H
151 msr SPSel, #SPSR_USE_L
|
| /aosp_15_r20/external/coreboot/src/mainboard/emulation/qemu-sbsa/ |
| H A D | bootblock_custom.S | 20 msr SPSel, #0 /* use SP_EL0 */
|
| /aosp_15_r20/external/coreboot/src/soc/cavium/cn81xx/ |
| H A D | cpu_secondary.S | 10 msr SPSel, #0
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| /aosp_15_r20/external/llvm/test/MC/Disassembler/AArch64/ |
| H A D | arm64-system.txt | 51 # CHECK: msr SPSel, #0
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| H A D | basic-a64-instructions.txt | 3134 # CHECK: msr {{SPSel|SPSEL}}, #0
3292 # CHECK: msr {{SPSel|SPSEL}}, x12
3584 # CHECK: mrs x9, {{SPSel|SPSEL}}
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| /aosp_15_r20/external/coreboot/src/arch/arm64/armv8/ |
| H A D | cpu.S | 113 msr SPSel, #0
|
| /aosp_15_r20/prebuilts/go/linux-x86/src/cmd/vendor/golang.org/x/arch/arm64/arm64asm/ |
| D | inst.go | 789 SPSel Pstatefield = iota const
798 case SPSel:
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| D | decode.go | 667 return SPSel
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| /aosp_15_r20/external/OpenCSD/decoder/tests/snapshots/a57_single_step/ |
| H A D | device1.ini | 400 SPSel=0x00000001 key
|
| /aosp_15_r20/external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/ |
| H A D | device1.ini | 400 SPSel=0x00000001 key
|
| /aosp_15_r20/out/soong/.intermediates/external/llvm/lib/Target/AArch64/llvm-gen-aarch64/gen/ |
| D | AArch64GenSystemOperands.inc | 561 SPSel = 5,
577 { "SPSel", 0x5, {} },
851 SPSel = 49680,
1498 { "SPSel", 0xC210, true, true, {} },
|
| /aosp_15_r20/prebuilts/go/linux-x86/src/cmd/asm/internal/asm/testdata/ |
| D | arm64.s | 1218 MSR $1, SPSel // bf4100d5
1740 MRS SPSel, R29 // 1d4238d5
1741 MSR R1, SPSel // 014218d5
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| D | arm64enc.s | 267 MSR $1, SPSel // bf4100d5
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| H A D | AArch64GenSystemOperands.inc | 138 SPSel = 5,
425 SPSel = 49680,
1948 { "SPSel", 0x5, {} }, // 0
2489 { "SPSel", 0xC210, true, true, {} }, // 235
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/configs/common/lib/Target/AArch64/ |
| H A D | AArch64GenSystemOperands.inc | 156 SPSel = 5,
486 SPSel = 49680,
3011 { "SPSel", 0x5, {} }, // 4
4418 { "SPSel", "SPSel", 0xC210, true, true, {} }, // 898
|
| /aosp_15_r20/external/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 186 def : PState<"SPSel", 0b00101>;
570 def : RWSysReg<"SPSel", 0b11, 0b000, 0b0100, 0b0010, 0b000>;
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 331 def : PState<"SPSel", 0b00101>;
844 def : RWSysReg<"SPSel", 0b11, 0b000, 0b0100, 0b0010, 0b000>;
|
| /aosp_15_r20/external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/ |
| H A D | AArch64SystemOperands.td | 424 def : PStateImm0_15<"SPSel", 0b000, 0b101>;
966 def : RWSysReg<"SPSel", 0b11, 0b000, 0b0100, 0b0010, 0b000>;
|