Searched refs:R_0285BC_PA_CL_UCP0_X (Results 1 – 2 of 2) sorted by relevance
2023 #define R_0285BC_PA_CL_UCP0_X 0x000285BC macro
1017 radeon_set_context_reg_seq(cs, R_0285BC_PA_CL_UCP0_X, 6*4); in evergreen_emit_clip_state()