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Searched refs:BIT5 (Results 1 – 25 of 146) sorted by relevance

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/aosp_15_r20/external/ethtool/
H A Dpcnet32.c12 #define BIT5 0x0020 macro
82 if(temp & BIT5) printf("RXON "); in pcnet32_dump_regs()
101 if(temp & BIT5) printf("LAPPEN "); in pcnet32_dump_regs()
120 if(temp & BIT5) printf("RCVCCO "); in pcnet32_dump_regs()
140 if(temp & BIT5) printf("MPPLBA "); in pcnet32_dump_regs()
162 if(temp & BIT5) printf("MCCINT "); in pcnet32_dump_regs()
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Guid/
H A DCper.h166 #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5
250 #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5
383 #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5
436 #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5
487 #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5
562 #define EFI_MS_CHECK_OVERFLOW_VALID BIT5
797 #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5
873 #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5
951 #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5
1035 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/Guid/
H A DCper.h160 #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5
244 #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5
375 #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5
428 #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5
479 #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5
554 #define EFI_MS_CHECK_OVERFLOW_VALID BIT5
789 #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5
865 #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5
943 #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5
1027 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Guid/
H A DCper.h166 #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5
250 #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5
384 #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5
437 #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5
488 #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5
563 #define EFI_MS_CHECK_OVERFLOW_VALID BIT5
798 #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5
874 #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5
952 #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5
1036 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/Guid/
H A DCper.h166 #define EFI_ERROR_SECTION_FLAGS_LATENT_ERROR BIT5
250 #define EFI_GENERIC_ERROR_PROC_LEVEL_VALID BIT5
384 #define EFI_CACHE_CHECK_PRECISE_IP_VALID BIT5
437 #define EFI_TLB_CHECK_PRECISE_IP_VALID BIT5
488 #define EFI_BUS_CHECK_PRECISE_IP_VALID BIT5
563 #define EFI_MS_CHECK_OVERFLOW_VALID BIT5
798 #define EFI_PLATFORM_MEMORY_MODULE_VALID BIT5
874 #define EFI_PLATFORM_MEMORY2_MODULE_VALID BIT5
952 #define EFI_PCIE_ERROR_BRIDGE_CRL_STS_VALID BIT5
1036 #define EFI_PCI_PCIX_BUS_ERROR_COMMAND_VALID BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202005/MdePkg/Include/IndustryStandard/
H A DSpdm.h106 #define SPDM_GET_CAPABILITIES_RESPONSE_FLAGS_MEAS_FRESH_CAP BIT5
134 #define SPDM_ALGORITHMS_BASE_ASYM_ALGO_TPM_ALG_RSASSA_4096 BIT5
147 #define SPDM_ALGORITHMS_BASE_HASH_ALGO_TPM_ALG_SHA3_512 BIT5
176 #define SPDM_ALGORITHMS_MEASUREMENT_HASH_ALGO_TPM_ALG_SHA3_384 BIT5
H A DTpmTis.h114 #define TIS_PC_ACC_ACTIVE BIT5
155 #define TIS_PC_STS_GO BIT5
H A DPci22.h579 #define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
593 #define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT BIT5 ///< 0x0020
613 #define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
H A DTpmPtp.h163 #define PTP_FIFO_ACC_ACTIVE BIT5
200 #define PTP_FIFO_STS_GO BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/IndustryStandard/
H A DSpdm.h106 #define SPDM_GET_CAPABILITIES_RESPONSE_FLAGS_MEAS_FRESH_CAP BIT5
134 #define SPDM_ALGORITHMS_BASE_ASYM_ALGO_TPM_ALG_RSASSA_4096 BIT5
147 #define SPDM_ALGORITHMS_BASE_HASH_ALGO_TPM_ALG_SHA3_512 BIT5
176 #define SPDM_ALGORITHMS_MEASUREMENT_HASH_ALGO_TPM_ALG_SHA3_384 BIT5
H A DTpmTis.h114 #define TIS_PC_ACC_ACTIVE BIT5
155 #define TIS_PC_STS_GO BIT5
H A DPci22.h579 #define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
593 #define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT BIT5 ///< 0x0020
613 #define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
H A DTpmPtp.h163 #define PTP_FIFO_ACC_ACTIVE BIT5
200 #define PTP_FIFO_STS_GO BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/IndustryStandard/
H A DSpdm.h105 #define SPDM_GET_CAPABILITIES_RESPONSE_FLAGS_MEAS_FRESH_CAP BIT5
133 #define SPDM_ALGORITHMS_BASE_ASYM_ALGO_TPM_ALG_RSASSA_4096 BIT5
146 #define SPDM_ALGORITHMS_BASE_HASH_ALGO_TPM_ALG_SHA3_512 BIT5
175 #define SPDM_ALGORITHMS_MEASUREMENT_HASH_ALGO_TPM_ALG_SHA3_384 BIT5
H A DTpmTis.h114 #define TIS_PC_ACC_ACTIVE BIT5
155 #define TIS_PC_STS_GO BIT5
H A DPci22.h596 #define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
610 #define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT BIT5 ///< 0x0020
630 #define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
H A DTpmPtp.h162 #define PTP_FIFO_ACC_ACTIVE BIT5
199 #define PTP_FIFO_STS_GO BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/amd/pi/00730F01/Proc/CPU/
H A DcpuRegisters.h71 #undef BIT5
147 #define BIT5 0x0000000000000020ull macro
339 #define LINK_INIT_BIOS_RST_DET_0 BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/amd/pi/00670F00/Proc/CPU/
H A DcpuRegisters.h73 #undef BIT5
149 #define BIT5 0x0000000000000020ull macro
366 #define LINK_INIT_BIOS_RST_DET_0 BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/UDK2017/MdePkg/Include/IndustryStandard/
H A DTpmTis.h120 #define TIS_PC_ACC_ACTIVE BIT5
157 #define TIS_PC_STS_GO BIT5
H A DPci22.h585 #define EFI_PCI_COMMAND_VGA_PALETTE_SNOOP BIT5 ///< 0x0020
599 #define EFI_PCI_BRIDGE_CONTROL_MASTER_ABORT BIT5 ///< 0x0020
619 #define EFI_PCI_STATUS_66MZ_CAPABLE BIT5 ///< 0x0020
H A DTpmPtp.h169 #define PTP_FIFO_ACC_ACTIVE BIT5
206 #define PTP_FIFO_STS_GO BIT5
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202302/MdePkg/Include/Register/Amd/
H A DGhcb.h78 #define IOIO_DATA_16 BIT5
80 #define IOIO_DATA_MASK (BIT6 | BIT5 | BIT4)
/aosp_15_r20/external/coreboot/src/vendorcode/intel/edk2/edk2-stable202111/MdePkg/Include/Register/Amd/
H A DGhcb.h78 #define IOIO_DATA_16 BIT5
80 #define IOIO_DATA_MASK (BIT6 | BIT5 | BIT4)
/aosp_15_r20/external/coreboot/src/vendorcode/amd/pi/00670F00/
H A DAMD.h289 #ifndef BIT5
290 #define BIT5 0x0000000000000020ull macro

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