Searched refs:miss_req_conflict_check (Results 1 – 2 of 2) sorted by relevance
323 val miss_req_conflict_check = Vec(LoadPipelineWidth + 2, Flipped(Valid(UInt()))) constant381 val miss_req_conflict = io.miss_req_conflict_check.map{ r =>385 blk := io.miss_req_conflict_check(i).valid && miss_req_conflict(i)
1485 wb.io.miss_req_conflict_check(w) := ldu(w).io.wbq_conflict_check1489 wb.io.miss_req_conflict_check(3) := mainPipe.io.wbq_conflict_check1492 wb.io.miss_req_conflict_check(4).valid := missReqArb.io.out.valid1493 wb.io.miss_req_conflict_check(4).bits := missReqArb.io.out.bits.addr