Searched refs:combinedData (Results 1 – 2 of 2) sorted by relevance
| /XiangShan/src/main/scala/xiangshan/mem/vector/ |
| H A D | VSegmentUnit.scala | 258 val combinedData = RegInit(0.U(XLEN.W)) constant
622 "b1001".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(55, 0))(63, 0),
623 "b1010".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(47, 0))(63, 0),
624 "b1011".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(39, 0))(63, 0),
625 "b1100".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(31, 0))(63, 0),
626 "b1101".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(23, 0))(63, 0),
627 "b1110".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(15, 0))(63, 0),
628 "b1111".U -> Cat(io.rdcache.resp.bits.data_delayed, combinedData(7, 0))(63, 0)
632 combinedData := misalignLowData
634 combinedData := misalignCombinedData
[all …]
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| /XiangShan/src/main/scala/xiangshan/mem/lsqueue/ |
| H A D | LoadMisalignBuffer.scala | 527 val combinedData = RegInit(0.U(XLEN.W)) constant
544 …combinedData := Mux(req.isvec, rdataVecHelper(req.alignedType, (catResult.asUInt)(XLEN - 1, 0)), r…
556 io.writeBack.bits.data := newRdataHelper(data_select, combinedData)
572 io.vecWriteBack.bits.vecdata.get := combinedData
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