1 /** 2 ****************************************************************************** 3 * @file stm32f4xx_hal_adc_ex.h 4 * @author MCD Application Team 5 * @brief Header file of ADC HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2017 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef __STM32F4xx_ADC_EX_H 22 #define __STM32F4xx_ADC_EX_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32f4xx_hal_def.h" 30 31 /** @addtogroup STM32F4xx_HAL_Driver 32 * @{ 33 */ 34 35 /** @addtogroup ADCEx 36 * @{ 37 */ 38 39 /* Exported types ------------------------------------------------------------*/ 40 /** @defgroup ADCEx_Exported_Types ADC Exported Types 41 * @{ 42 */ 43 44 /** 45 * @brief ADC Configuration injected Channel structure definition 46 * @note Parameters of this structure are shared within 2 scopes: 47 * - Scope channel: InjectedChannel, InjectedRank, InjectedSamplingTime, InjectedOffset 48 * - Scope injected group (affects all channels of injected group): InjectedNbrOfConversion, InjectedDiscontinuousConvMode, 49 * AutoInjectedConv, ExternalTrigInjecConvEdge, ExternalTrigInjecConv. 50 * @note The setting of these parameters with function HAL_ADCEx_InjectedConfigChannel() is conditioned to ADC state. 51 * ADC state can be either: 52 * - For all parameters: ADC disabled 53 * - For all except parameters 'InjectedDiscontinuousConvMode' and 'AutoInjectedConv': ADC enabled without conversion on going on injected group. 54 * - For parameters 'ExternalTrigInjecConv' and 'ExternalTrigInjecConvEdge': ADC enabled, even with conversion on going on injected group. 55 */ 56 typedef struct 57 { 58 uint32_t InjectedChannel; /*!< Selection of ADC channel to configure 59 This parameter can be a value of @ref ADC_channels 60 Note: Depending on devices, some channels may not be available on package pins. Refer to device datasheet for channels availability. */ 61 uint32_t InjectedRank; /*!< Rank in the injected group sequencer 62 This parameter must be a value of @ref ADCEx_injected_rank 63 Note: In case of need to disable a channel or change order of conversion sequencer, rank containing a previous channel setting can be overwritten by the new channel setting (or parameter number of conversions can be adjusted) */ 64 uint32_t InjectedSamplingTime; /*!< Sampling time value to be set for the selected channel. 65 Unit: ADC clock cycles 66 Conversion time is the addition of sampling time and processing time (12 ADC clock cycles at ADC resolution 12 bits, 11 cycles at 10 bits, 9 cycles at 8 bits, 7 cycles at 6 bits). 67 This parameter can be a value of @ref ADC_sampling_times 68 Caution: This parameter updates the parameter property of the channel, that can be used into regular and/or injected groups. 69 If this same channel has been previously configured in the other group (regular/injected), it will be updated to last setting. 70 Note: In case of usage of internal measurement channels (VrefInt/Vbat/TempSensor), 71 sampling time constraints must be respected (sampling time can be adjusted in function of ADC clock frequency and sampling time setting) 72 Refer to device datasheet for timings values, parameters TS_vrefint, TS_temp (values rough order: 4us min). */ 73 uint32_t InjectedOffset; /*!< Defines the offset to be subtracted from the raw converted data (for channels set on injected group only). 74 Offset value must be a positive number. 75 Depending of ADC resolution selected (12, 10, 8 or 6 bits), 76 this parameter must be a number between Min_Data = 0x000 and Max_Data = 0xFFF, 0x3FF, 0xFF or 0x3F respectively. */ 77 uint32_t InjectedNbrOfConversion; /*!< Specifies the number of ranks that will be converted within the injected group sequencer. 78 To use the injected group sequencer and convert several ranks, parameter 'ScanConvMode' must be enabled. 79 This parameter must be a number between Min_Data = 1 and Max_Data = 4. 80 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 81 configure a channel on injected group can impact the configuration of other channels previously set. */ 82 FunctionalState InjectedDiscontinuousConvMode; /*!< Specifies whether the conversions sequence of injected group is performed in Complete-sequence/Discontinuous-sequence (main sequence subdivided in successive parts). 83 Discontinuous mode is used only if sequencer is enabled (parameter 'ScanConvMode'). If sequencer is disabled, this parameter is discarded. 84 Discontinuous mode can be enabled only if continuous mode is disabled. If continuous mode is enabled, this parameter setting is discarded. 85 This parameter can be set to ENABLE or DISABLE. 86 Note: For injected group, number of discontinuous ranks increment is fixed to one-by-one. 87 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 88 configure a channel on injected group can impact the configuration of other channels previously set. */ 89 FunctionalState AutoInjectedConv; /*!< Enables or disables the selected ADC automatic injected group conversion after regular one 90 This parameter can be set to ENABLE or DISABLE. 91 Note: To use Automatic injected conversion, discontinuous mode must be disabled ('DiscontinuousConvMode' and 'InjectedDiscontinuousConvMode' set to DISABLE) 92 Note: To use Automatic injected conversion, injected group external triggers must be disabled ('ExternalTrigInjecConv' set to ADC_SOFTWARE_START) 93 Note: In case of DMA used with regular group: if DMA configured in normal mode (single shot) JAUTO will be stopped upon DMA transfer complete. 94 To maintain JAUTO always enabled, DMA must be configured in circular mode. 95 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 96 configure a channel on injected group can impact the configuration of other channels previously set. */ 97 uint32_t ExternalTrigInjecConv; /*!< Selects the external event used to trigger the conversion start of injected group. 98 If set to ADC_INJECTED_SOFTWARE_START, external triggers are disabled. 99 If set to external trigger source, triggering is on event rising edge. 100 This parameter can be a value of @ref ADCEx_External_trigger_Source_Injected 101 Note: This parameter must be modified when ADC is disabled (before ADC start conversion or after ADC stop conversion). 102 If ADC is enabled, this parameter setting is bypassed without error reporting (as it can be the expected behaviour in case of another parameter update on the fly) 103 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 104 configure a channel on injected group can impact the configuration of other channels previously set. */ 105 uint32_t ExternalTrigInjecConvEdge; /*!< Selects the external trigger edge of injected group. 106 This parameter can be a value of @ref ADCEx_External_trigger_edge_Injected. 107 If trigger is set to ADC_INJECTED_SOFTWARE_START, this parameter is discarded. 108 Caution: this setting impacts the entire injected group. Therefore, call of HAL_ADCEx_InjectedConfigChannel() to 109 configure a channel on injected group can impact the configuration of other channels previously set. */ 110 }ADC_InjectionConfTypeDef; 111 112 /** 113 * @brief ADC Configuration multi-mode structure definition 114 */ 115 typedef struct 116 { 117 uint32_t Mode; /*!< Configures the ADC to operate in independent or multi mode. 118 This parameter can be a value of @ref ADCEx_Common_mode */ 119 uint32_t DMAAccessMode; /*!< Configures the Direct memory access mode for multi ADC mode. 120 This parameter can be a value of @ref ADCEx_Direct_memory_access_mode_for_multi_mode */ 121 uint32_t TwoSamplingDelay; /*!< Configures the Delay between 2 sampling phases. 122 This parameter can be a value of @ref ADC_delay_between_2_sampling_phases */ 123 }ADC_MultiModeTypeDef; 124 125 /** 126 * @} 127 */ 128 129 /* Exported constants --------------------------------------------------------*/ 130 /** @defgroup ADCEx_Exported_Constants ADC Exported Constants 131 * @{ 132 */ 133 134 /** @defgroup ADCEx_Common_mode ADC Common Mode 135 * @{ 136 */ 137 #define ADC_MODE_INDEPENDENT 0x00000000U 138 #define ADC_DUALMODE_REGSIMULT_INJECSIMULT ((uint32_t)ADC_CCR_MULTI_0) 139 #define ADC_DUALMODE_REGSIMULT_ALTERTRIG ((uint32_t)ADC_CCR_MULTI_1) 140 #define ADC_DUALMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) 141 #define ADC_DUALMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) 142 #define ADC_DUALMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) 143 #define ADC_DUALMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) 144 #define ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_0)) 145 #define ADC_TRIPLEMODE_REGSIMULT_AlterTrig ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_1)) 146 #define ADC_TRIPLEMODE_INJECSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_0)) 147 #define ADC_TRIPLEMODE_REGSIMULT ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1)) 148 #define ADC_TRIPLEMODE_INTERL ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_2 | ADC_CCR_MULTI_1 | ADC_CCR_MULTI_0)) 149 #define ADC_TRIPLEMODE_ALTERTRIG ((uint32_t)(ADC_CCR_MULTI_4 | ADC_CCR_MULTI_3 | ADC_CCR_MULTI_0)) 150 /** 151 * @} 152 */ 153 154 /** @defgroup ADCEx_Direct_memory_access_mode_for_multi_mode ADC Direct Memory Access Mode For Multi Mode 155 * @{ 156 */ 157 #define ADC_DMAACCESSMODE_DISABLED 0x00000000U /*!< DMA mode disabled */ 158 #define ADC_DMAACCESSMODE_1 ((uint32_t)ADC_CCR_DMA_0) /*!< DMA mode 1 enabled (2 / 3 half-words one by one - 1 then 2 then 3)*/ 159 #define ADC_DMAACCESSMODE_2 ((uint32_t)ADC_CCR_DMA_1) /*!< DMA mode 2 enabled (2 / 3 half-words by pairs - 2&1 then 1&3 then 3&2)*/ 160 #define ADC_DMAACCESSMODE_3 ((uint32_t)ADC_CCR_DMA) /*!< DMA mode 3 enabled (2 / 3 bytes by pairs - 2&1 then 1&3 then 3&2) */ 161 /** 162 * @} 163 */ 164 165 /** @defgroup ADCEx_External_trigger_edge_Injected ADC External Trigger Edge Injected 166 * @{ 167 */ 168 #define ADC_EXTERNALTRIGINJECCONVEDGE_NONE 0x00000000U 169 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISING ((uint32_t)ADC_CR2_JEXTEN_0) 170 #define ADC_EXTERNALTRIGINJECCONVEDGE_FALLING ((uint32_t)ADC_CR2_JEXTEN_1) 171 #define ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING ((uint32_t)ADC_CR2_JEXTEN) 172 /** 173 * @} 174 */ 175 176 /** @defgroup ADCEx_External_trigger_Source_Injected ADC External Trigger Source Injected 177 * @{ 178 */ 179 #define ADC_EXTERNALTRIGINJECCONV_T1_CC4 0x00000000U 180 #define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)ADC_CR2_JEXTSEL_0) 181 #define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)ADC_CR2_JEXTSEL_1) 182 #define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) 183 #define ADC_EXTERNALTRIGINJECCONV_T3_CC2 ((uint32_t)ADC_CR2_JEXTSEL_2) 184 #define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) 185 #define ADC_EXTERNALTRIGINJECCONV_T4_CC1 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) 186 #define ADC_EXTERNALTRIGINJECCONV_T4_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) 187 #define ADC_EXTERNALTRIGINJECCONV_T4_CC3 ((uint32_t)ADC_CR2_JEXTSEL_3) 188 #define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_0)) 189 #define ADC_EXTERNALTRIGINJECCONV_T5_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1)) 190 #define ADC_EXTERNALTRIGINJECCONV_T5_TRGO ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_1 | ADC_CR2_JEXTSEL_0)) 191 #define ADC_EXTERNALTRIGINJECCONV_T8_CC2 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2)) 192 #define ADC_EXTERNALTRIGINJECCONV_T8_CC3 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_0)) 193 #define ADC_EXTERNALTRIGINJECCONV_T8_CC4 ((uint32_t)(ADC_CR2_JEXTSEL_3 | ADC_CR2_JEXTSEL_2 | ADC_CR2_JEXTSEL_1)) 194 #define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)ADC_CR2_JEXTSEL) 195 #define ADC_INJECTED_SOFTWARE_START ((uint32_t)ADC_CR2_JEXTSEL + 1U) 196 /** 197 * @} 198 */ 199 200 /** @defgroup ADCEx_injected_rank ADC Injected Rank 201 * @{ 202 */ 203 #define ADC_INJECTED_RANK_1 0x00000001U 204 #define ADC_INJECTED_RANK_2 0x00000002U 205 #define ADC_INJECTED_RANK_3 0x00000003U 206 #define ADC_INJECTED_RANK_4 0x00000004U 207 /** 208 * @} 209 */ 210 211 /** @defgroup ADCEx_channels ADC Specific Channels 212 * @{ 213 */ 214 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ 215 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \ 216 defined(STM32F410Rx) || defined(STM32F412Zx) || defined(STM32F412Vx) || defined(STM32F412Rx) || \ 217 defined(STM32F412Cx) 218 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_16) 219 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F412Zx || 220 STM32F412Vx || STM32F412Rx || STM32F412Cx */ 221 222 #if defined(STM32F411xE) || defined(STM32F413xx) || defined(STM32F423xx) || defined(STM32F427xx) || defined(STM32F437xx) ||\ 223 defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 224 #define ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT 0x10000000U /* Dummy bit for driver internal usage, not used in ADC channel setting registers CR1 or SQRx */ 225 #define ADC_CHANNEL_TEMPSENSOR ((uint32_t)ADC_CHANNEL_18 | ADC_CHANNEL_DIFFERENCIATION_TEMPSENSOR_VBAT) 226 #endif /* STM32F411xE || STM32F413xx || STM32F423xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 227 /** 228 * @} 229 */ 230 231 232 /** 233 * @} 234 */ 235 236 /* Exported macro ------------------------------------------------------------*/ 237 /** @defgroup ADC_Exported_Macros ADC Exported Macros 238 * @{ 239 */ 240 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx)|| defined(STM32F439xx) 241 /** 242 * @brief Disable internal path of ADC channel Vbat 243 * @note Use case of this macro: 244 * On devices STM32F42x and STM32F43x, ADC internal channels 245 * Vbat and VrefInt share the same internal path, only 246 * one of them can be enabled.This macro is to be used when ADC 247 * channels Vbat and VrefInt are selected, and must be called 248 * before starting conversion of ADC channel VrefInt in order 249 * to disable ADC channel Vbat. 250 * @retval None 251 */ 252 #define __HAL_ADC_PATH_INTERNAL_VBAT_DISABLE() (ADC->CCR &= ~(ADC_CCR_VBATE)) 253 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ 254 /** 255 * @} 256 */ 257 258 /* Exported functions --------------------------------------------------------*/ 259 /** @addtogroup ADCEx_Exported_Functions 260 * @{ 261 */ 262 263 /** @addtogroup ADCEx_Exported_Functions_Group1 264 * @{ 265 */ 266 267 /* I/O operation functions ******************************************************/ 268 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef* hadc); 269 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef* hadc); 270 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef* hadc, uint32_t Timeout); 271 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef* hadc); 272 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef* hadc); 273 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef* hadc, uint32_t InjectedRank); 274 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length); 275 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef* hadc); 276 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef* hadc); 277 void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef* hadc); 278 279 /* Peripheral Control functions *************************************************/ 280 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef* hadc,ADC_InjectionConfTypeDef* sConfigInjected); 281 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef* hadc, ADC_MultiModeTypeDef* multimode); 282 283 /** 284 * @} 285 */ 286 287 /** 288 * @} 289 */ 290 /* Private types -------------------------------------------------------------*/ 291 /* Private variables ---------------------------------------------------------*/ 292 /* Private constants ---------------------------------------------------------*/ 293 /** @defgroup ADCEx_Private_Constants ADC Private Constants 294 * @{ 295 */ 296 297 /** 298 * @} 299 */ 300 301 /* Private macros ------------------------------------------------------------*/ 302 /** @defgroup ADCEx_Private_Macros ADC Private Macros 303 * @{ 304 */ 305 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \ 306 defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F410Tx) || defined(STM32F410Cx) || \ 307 defined(STM32F410Rx) || defined(STM32F411xE) || defined(STM32F412Zx) || defined(STM32F412Vx) || \ 308 defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx) 309 #define IS_ADC_CHANNEL(CHANNEL) ((CHANNEL) <= ADC_CHANNEL_18) 310 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F401xC || STM32F401xE || STM32F410xx || STM32F411xE || 311 STM32F412Zx || STM32F412Vx || STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */ 312 313 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ 314 defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 315 #define IS_ADC_CHANNEL(CHANNEL) (((CHANNEL) <= ADC_CHANNEL_18) || \ 316 ((CHANNEL) == ADC_CHANNEL_TEMPSENSOR)) 317 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 318 319 #define IS_ADC_MODE(MODE) (((MODE) == ADC_MODE_INDEPENDENT) || \ 320 ((MODE) == ADC_DUALMODE_REGSIMULT_INJECSIMULT) || \ 321 ((MODE) == ADC_DUALMODE_REGSIMULT_ALTERTRIG) || \ 322 ((MODE) == ADC_DUALMODE_INJECSIMULT) || \ 323 ((MODE) == ADC_DUALMODE_REGSIMULT) || \ 324 ((MODE) == ADC_DUALMODE_INTERL) || \ 325 ((MODE) == ADC_DUALMODE_ALTERTRIG) || \ 326 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_INJECSIMULT) || \ 327 ((MODE) == ADC_TRIPLEMODE_REGSIMULT_AlterTrig) || \ 328 ((MODE) == ADC_TRIPLEMODE_INJECSIMULT) || \ 329 ((MODE) == ADC_TRIPLEMODE_REGSIMULT) || \ 330 ((MODE) == ADC_TRIPLEMODE_INTERL) || \ 331 ((MODE) == ADC_TRIPLEMODE_ALTERTRIG)) 332 #define IS_ADC_DMA_ACCESS_MODE(MODE) (((MODE) == ADC_DMAACCESSMODE_DISABLED) || \ 333 ((MODE) == ADC_DMAACCESSMODE_1) || \ 334 ((MODE) == ADC_DMAACCESSMODE_2) || \ 335 ((MODE) == ADC_DMAACCESSMODE_3)) 336 #define IS_ADC_EXT_INJEC_TRIG_EDGE(EDGE) (((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_NONE) || \ 337 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISING) || \ 338 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_FALLING) || \ 339 ((EDGE) == ADC_EXTERNALTRIGINJECCONVEDGE_RISINGFALLING)) 340 #define IS_ADC_EXT_INJEC_TRIG(INJTRIG) (((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_CC4) || \ 341 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T1_TRGO) || \ 342 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_CC1) || \ 343 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T2_TRGO) || \ 344 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC2) || \ 345 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T3_CC4) || \ 346 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC1) || \ 347 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC2) || \ 348 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_CC3) || \ 349 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T4_TRGO) || \ 350 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_CC4) || \ 351 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T5_TRGO) || \ 352 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC2) || \ 353 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC3) || \ 354 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_T8_CC4) || \ 355 ((INJTRIG) == ADC_EXTERNALTRIGINJECCONV_EXT_IT15)|| \ 356 ((INJTRIG) == ADC_INJECTED_SOFTWARE_START)) 357 #define IS_ADC_INJECTED_LENGTH(LENGTH) (((LENGTH) >= 1U) && ((LENGTH) <= 4U)) 358 #define IS_ADC_INJECTED_RANK(RANK) (((RANK) >= 1U) && ((RANK) <= 4U)) 359 360 /** 361 * @brief Set the selected injected Channel rank. 362 * @param _CHANNELNB_ Channel number. 363 * @param _RANKNB_ Rank number. 364 * @param _JSQR_JL_ Sequence length. 365 * @retval None 366 */ 367 #define ADC_JSQR(_CHANNELNB_, _RANKNB_, _JSQR_JL_) (((uint32_t)((uint16_t)(_CHANNELNB_))) << (5U * (uint8_t)(((_RANKNB_) + 3U) - (_JSQR_JL_)))) 368 369 /** 370 * @brief Defines if the selected ADC is within ADC common register ADC123 or ADC1 371 * if available (ADC2, ADC3 availability depends on STM32 product) 372 * @param __HANDLE__ ADC handle 373 * @retval Common control register ADC123 or ADC1 374 */ 375 #if defined(STM32F405xx) || defined(STM32F407xx) || defined(STM32F415xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F429xx) || defined(STM32F437xx) || defined(STM32F439xx) || defined(STM32F446xx) || defined(STM32F469xx) || defined(STM32F479xx) 376 #define ADC_COMMON_REGISTER(__HANDLE__) ADC123_COMMON 377 #else 378 #define ADC_COMMON_REGISTER(__HANDLE__) ADC1_COMMON 379 #endif /* STM32F405xx || STM32F407xx || STM32F415xx || STM32F417xx || STM32F427xx || STM32F429xx || STM32F437xx || STM32F439xx || STM32F446xx || STM32F469xx || STM32F479xx */ 380 /** 381 * @} 382 */ 383 384 /* Private functions ---------------------------------------------------------*/ 385 /** @defgroup ADCEx_Private_Functions ADC Private Functions 386 * @{ 387 */ 388 389 /** 390 * @} 391 */ 392 393 /** 394 * @} 395 */ 396 397 /** 398 * @} 399 */ 400 401 #ifdef __cplusplus 402 } 403 #endif 404 405 #endif /*__STM32F4xx_ADC_EX_H */ 406 407 408 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 409