1/* SPDX-License-Identifier: GPL-2.0-only */ 2 3/* 4 * Include this file into a mainboard's DSDT _SB device tree and it will 5 * expose the IT8659E SuperIO and some of its functionality. 6 * 7 * It allows the change of IO ports, IRQs and DMA settings on logical 8 * devices, disabling and reenabling logical devices. 9 * 10 * LDN State 11 * 0x1 UARTA Implemented, tested 12 * 0x2 UARTB Implemented, tested 13 * 0x4 EC Implemented, tested 14 * 0x5 KBC Implemented, untested 15 * 0x6 MOUSE Implemented, untested 16 * 0x7 GPIO Implemented, tested 17 * 0xa CIR Not implemented 18 * 19 * Controllable through preprocessor defines: 20 * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0) 21 * SUPERIO_PNP_BASE I/O address of the first PnP configuration register 22 * IT8659E_SHOW_UARTA If defined, UARTA will be exposed. 23 * IT8659E_SHOW_UARTB If defined, UARTB will be exposed. 24 * IT8659E_SHOW_KBC If defined, the KBC will be exposed. 25 * IT8659E_SHOW_PS2M If defined, PS/2 mouse support will be exposed. 26 * IT8659E_SHOW_EC If defined, the EC will be exposed. 27 * IT8659E_SHOW_GPIO If defined, the GPIO will be exposed. 28 */ 29 30#undef SUPERIO_CHIP_NAME 31#define SUPERIO_CHIP_NAME IT8659E 32#include <superio/acpi/pnp.asl> 33 34#undef PNP_DEFAULT_PSC 35#define PNP_DEFAULT_PSC Return (0) /* no power management */ 36 37#define CONFIGURE_CONTROL CCTL 38 39Device (SUPERIO_DEV) { 40 Name (_HID, EisaId("PNP0A05")) 41 Name (_STR, Unicode("ITE IT8659E Super I/O")) 42 Name (_UID, SUPERIO_UID(SUPERIO_DEV,)) 43 44 /* Mutex for accesses to the configuration ports */ 45 Mutex (CRMX, 1) 46 47 /* SuperIO configuration ports */ 48 OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02) 49 Field (CREG, ByteAcc, NoLock, Preserve) 50 { 51 PNP_ADDR_REG, 8, 52 PNP_DATA_REG, 8 53 } 54 IndexField (PNP_ADDR_REG, PNP_DATA_REG, ByteAcc, NoLock, Preserve) 55 { 56 Offset (0x02), 57 CONFIGURE_CONTROL, 8, /* Global configure control */ 58 59 Offset (0x07), 60 PNP_LOGICAL_DEVICE, 8, /* Logical device selector */ 61 62 Offset (0x30), 63 PNP_DEVICE_ACTIVE, 1, /* Logical device activation */ 64 65 Offset (0x60), 66 PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */ 67 PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */ 68 PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */ 69 PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */ 70 71 Offset (0x70), 72 PNP_IRQ0, 8, /* First IRQ */ 73 } 74 75 Method (_CRS) 76 { 77 /* Announce the used i/o ports to the OS */ 78 Return (ResourceTemplate () { 79 IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02) 80 }) 81 } 82 83 #undef PNP_ENTER_MAGIC_1ST 84 #undef PNP_ENTER_MAGIC_2ND 85 #undef PNP_ENTER_MAGIC_3RD 86 #undef PNP_ENTER_MAGIC_4TH 87 #undef PNP_EXIT_MAGIC_1ST 88 #define PNP_ENTER_MAGIC_1ST 0x87 89 #define PNP_ENTER_MAGIC_2ND 0x01 90 #define PNP_ENTER_MAGIC_3RD 0x55 91#if SUPERIO_PNP_BASE == 0x2e 92 #define PNP_ENTER_MAGIC_4TH 0x55 93#else 94 #define PNP_ENTER_MAGIC_4TH 0xaa 95#endif 96 #define PNP_EXIT_SPECIAL_REG CONFIGURE_CONTROL 97 #define PNP_EXIT_SPECIAL_VAL 0x02 98 #include <superio/acpi/pnp_config.asl> 99 100#ifdef IT8659E_SHOW_UARTA 101 #undef SUPERIO_UART_LDN 102 #undef SUPERIO_UART_DDN 103 #undef SUPERIO_PNP_NO_DIS 104 #undef SUPERIO_UART_PM_REG 105 #undef SUPERIO_UART_PM_VAL 106 #undef SUPERIO_UART_PM_LDN 107 #define SUPERIO_UART_LDN 1 108 #include <superio/acpi/pnp_uart.asl> 109#endif 110 111#ifdef IT8659E_SHOW_UARTB 112 #undef SUPERIO_UART_LDN 113 #undef SUPERIO_UART_DDN 114 #undef SUPERIO_PNP_NO_DIS 115 #undef SUPERIO_UART_PM_REG 116 #undef SUPERIO_UART_PM_VAL 117 #undef SUPERIO_UART_PM_LDN 118 #define SUPERIO_UART_LDN 2 119 #include <superio/acpi/pnp_uart.asl> 120#endif 121 122#ifdef IT8659E_SHOW_KBC 123 #undef SUPERIO_KBC_LDN 124 #undef SUPERIO_KBC_PS2M 125 #undef SUPERIO_KBC_PS2LDN 126 #undef SUPERIO_PNP_NO_DIS 127 #define SUPERIO_KBC_LDN 5 128#ifdef IT8659E_SHOW_PS2M 129 #define SUPERIO_KBC_PS2LDN 6 130#endif 131 #include <superio/acpi/pnp_kbc.asl> 132#endif 133 134 135/* 136 * Generic setup for EC device. 137 * 138 * IT8659E_EC_IO0 The alignment and length of the first PnP i/o 139 * resource (comma separated, e.g. `0x02, 0x08`, 140 * optional) 141 * IT8659E_EC_IO1 The alignment and length of the second PnP i/o 142 * resource (comma separated, e.g. `0x02, 0x08`, 143 * optional) 144 * IT8659E_EC_IRQ0 If defined, the first PnP IRQ register is enabled 145 */ 146#ifdef IT8659E_SHOW_EC 147 #undef SUPERIO_PNP_HID 148 #undef SUPERIO_PNP_LDN 149 #undef SUPERIO_PNP_DDN 150 #undef SUPERIO_PNP_NO_DIS 151 #undef SUPERIO_PNP_PM_REG 152 #undef SUPERIO_PNP_PM_VAL 153 #undef SUPERIO_PNP_PM_LDN 154 #undef SUPERIO_PNP_IO0 155 #undef SUPERIO_PNP_IO1 156 #undef SUPERIO_PNP_IO2 157 #undef SUPERIO_PNP_IRQ0 158 #undef SUPERIO_PNP_IRQ1 159 #undef SUPERIO_PNP_DMA 160 161 #define SUPERIO_PNP_LDN 4 162 #define SUPERIO_PNP_DDN "ITE IT8659E Environmental Controller" 163 164#ifdef IT8659E_EC_IO0 165 #define SUPERIO_PNP_IO0 0x08, 0x08 166#endif 167 168#ifdef IT8659E_EC_IO1 169 #define SUPERIO_PNP_IO1 0x08, 0x04 170#endif 171 172#ifdef IT8659E_EC_IRQ0 173 #define SUPERIO_PNP_IRQ0 174#endif 175 176 #include <superio/acpi/pnp_generic.asl> 177#endif 178 179/* 180 * Generic setup for GPIO device. 181 * 182 * IT8659E_EC_IO0 The alignment and length of the first PnP i/o 183 * resource (comma separated, e.g. `0x02, 0x08`, 184 * optional) 185 * IT8659E_EC_IO1 The alignment and length of the second PnP i/o 186 * resource (comma separated, e.g. `0x02, 0x08`, 187 * optional) 188 * IT8659E_EC_IRQ0 If defined, the first PnP IRQ register is enabled 189 */ 190#ifdef IT8659E_SHOW_GPIO 191 #undef SUPERIO_PNP_HID 192 #undef SUPERIO_PNP_LDN 193 #undef SUPERIO_PNP_DDN 194 #undef SUPERIO_PNP_NO_DIS 195 #undef SUPERIO_PNP_PM_REG 196 #undef SUPERIO_PNP_PM_VAL 197 #undef SUPERIO_PNP_PM_LDN 198 #undef SUPERIO_PNP_IO0 199 #undef SUPERIO_PNP_IO1 200 #undef SUPERIO_PNP_IO2 201 #undef SUPERIO_PNP_IRQ0 202 #undef SUPERIO_PNP_IRQ1 203 #undef SUPERIO_PNP_DMA 204 205 #define SUPERIO_PNP_LDN 7 206 #define SUPERIO_PNP_DDN "ITE IT8659E GPIO" 207 #define SUPERIO_PNP_NO_DIS 208 209#ifdef IT8659E_GPIO_IO0 210 #define SUPERIO_PNP_IO0 0x04, 0x04 211#endif 212 213#ifdef IT8659E_GPIO_IO1 214 #define SUPERIO_PNP_IO1 0x01, 0x08 215#endif 216 #include <superio/acpi/pnp_generic.asl> 217#endif 218 219} 220