Searched hist:d6f9198f3ac6bfb91223645ada7f497cef5f76d5 (Results 1 – 5 of 5) sorted by relevance
/XiangShan/src/main/scala/xiangshan/backend/ | ||
H A D | BackendParams.scala | diff d6f9198f3ac6bfb91223645ada7f497cef5f76d5 Sun May 21 11:38:48 CEST 2023 Xuan Hu <[email protected]> rat: add separated ldest read port for vector insts |
/XiangShan/src/main/scala/xiangshan/backend/rename/ | ||
H A D | RenameTable.scala | diff d6f9198f3ac6bfb91223645ada7f497cef5f76d5 Sun May 21 11:38:48 CEST 2023 Xuan Hu <[email protected]> rat: add separated ldest read port for vector insts |
H A D | Rename.scala | diff d6f9198f3ac6bfb91223645ada7f497cef5f76d5 Sun May 21 11:38:48 CEST 2023 Xuan Hu <[email protected]> rat: add separated ldest read port for vector insts |
/XiangShan/src/main/scala/xiangshan/backend/decode/ | ||
H A D | DecodeUnitComp.scala | diff d6f9198f3ac6bfb91223645ada7f497cef5f76d5 Sun May 21 11:38:48 CEST 2023 Xuan Hu <[email protected]> rat: add separated ldest read port for vector insts |
H A D | DecodeStage.scala | diff d6f9198f3ac6bfb91223645ada7f497cef5f76d5 Sun May 21 11:38:48 CEST 2023 Xuan Hu <[email protected]> rat: add separated ldest read port for vector insts |