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/linux-6.14.4/Documentation/devicetree/bindings/mmc/
Dsocionext,uniphier-sd.yaml58 socionext,syscon-uhs-mode:
62 - description: phandle to syscon that configures UHS mode
65 A phandle to syscon with one argument that configures UHS mode.
104 pinctrl-names = "default", "uhs";
114 sd-uhs-sdr12;
115 sd-uhs-sdr25;
116 sd-uhs-sdr50;
Dcdns,sdhci.yaml52 cdns,phy-input-delay-sd-uhs-sdr12:
53 description: Value of the delay in the input path for SD UHS SDR12 timing
58 cdns,phy-input-delay-sd-uhs-sdr25:
59 description: Value of the delay in the input path for SD UHS SDR25 timing
64 cdns,phy-input-delay-sd-uhs-sdr50:
65 description: Value of the delay in the input path for SD UHS SDR50 timing
70 cdns,phy-input-delay-sd-uhs-ddr50:
71 description: Value of the delay in the input path for SD UHS DDR50 timing
Dmmc-controller-common.yaml132 sd-uhs-sdr12:
135 SD UHS SDR12 speed is supported.
137 sd-uhs-sdr25:
140 SD UHS SDR25 speed is supported.
142 sd-uhs-sdr50:
145 SD UHS SDR50 speed is supported.
147 sd-uhs-sdr104:
150 SD UHS SDR104 speed is supported.
152 sd-uhs-ddr50:
155 SD UHS DDR50 speed is supported.
[all …]
Dsdhci-st.txt51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
Dsdhci-am654.yaml80 description: Output tap delay for SD UHS SDR12 timing
86 description: Output tap delay for SD UHS SDR25 timing
92 description: Output tap delay for SD UHS SDR50 timing
98 description: Output tap delay for SD UHS SDR104 timing
104 description: Output tap delay for SD UHS DDR50 timing
150 description: Input tap delay for SD UHS SDR12 timing
156 description: Input tap delay for SD UHS SDR25 timing
Dbrcm,sdhci-brcmstb.yaml92 sd-uhs-sdr50;
93 sd-uhs-ddr50;
94 sd-uhs-sdr104;
/linux-6.14.4/arch/arm64/boot/dts/amlogic/
Dmeson-g12b-dreambox-two.dts16 sd-uhs-sdr12;
17 sd-uhs-sdr25;
18 sd-uhs-sdr50;
19 sd-uhs-sdr104;
/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dtqmls10xxa.dtsi54 sd-uhs-sdr104;
55 sd-uhs-sdr50;
56 sd-uhs-sdr25;
57 sd-uhs-sdr12;
Dfsl-ls1012a-rdb.dts29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
Dfsl-lx2160a-clearfog-itx.dtsi92 sd-uhs-sdr104;
93 sd-uhs-sdr50;
94 sd-uhs-sdr25;
95 sd-uhs-sdr12;
Dfsl-ls1046a-rdb.dts41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
43 sd-uhs-sdr25;
44 sd-uhs-sdr12;
Dfsl-lx2160a-rdb.dts130 sd-uhs-sdr104;
131 sd-uhs-sdr50;
132 sd-uhs-sdr25;
133 sd-uhs-sdr12;
/linux-6.14.4/arch/arm64/boot/dts/sprd/
Dums512-1h10.dts45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>;
46 sprd,phy-delay-sd-uhs-sdr50 = <0x6e 0x7f 0x01 0x01>;
49 sd-uhs-sdr104;
50 sd-uhs-sdr50;
/linux-6.14.4/include/linux/mmc/
Dsd_uhs2.h3 * Header file for UHS-II packets, Host Controller registers and I/O
14 * Refer to UHS-II Addendum Version 1.02 Figure 5-2, the format of CCMD Header is described below:
32 * Refer to UHS-II Addendum Version 1.02 Figure 6-5, the format of CCMD Argument is described below:
45 * I/O Address specifies the address of register in UHS-II I/O space accessed by CCMD.
112 * Refer to UHS-II Addendum Version 1.02 Figure 6-8, the format of DCMD Argument is described below:
124 * I/O Address specifies the address of register in UHS-II I/O space accessed by CCMD.
161 /* UHS-II Device Registers */
/linux-6.14.4/arch/riscv/boot/dts/microchip/
Dmpfs-polarberry.dts68 sd-uhs-sdr12;
69 sd-uhs-sdr25;
70 sd-uhs-sdr50;
71 sd-uhs-sdr104;
Dmpfs-sev-kit.dts101 sd-uhs-sdr12;
102 sd-uhs-sdr25;
103 sd-uhs-sdr50;
104 sd-uhs-sdr104;
Dmpfs-m100pfsevp.dts117 sd-uhs-sdr12;
118 sd-uhs-sdr25;
119 sd-uhs-sdr50;
120 sd-uhs-sdr104;
Dmpfs-beaglev-fire.dts167 sd-uhs-sdr12;
168 sd-uhs-sdr25;
169 sd-uhs-sdr50;
170 sd-uhs-sdr104;
Dmpfs-icicle-kit.dts172 sd-uhs-sdr12;
173 sd-uhs-sdr25;
174 sd-uhs-sdr50;
175 sd-uhs-sdr104;
/linux-6.14.4/drivers/mmc/core/
Dsd_uhs2.c21 * Support for SD UHS-II cards
84 * Run the phy initialization sequence, which mainly relies on the UHS-II host
94 pr_err("%s: failed to initial phy for UHS-II!\n", in sd_uhs2_phy_init()
102 * sd_uhs2_cmd_assemble() - build up UHS-II command packet which is embedded in
106 * @header: Header field of UHS-II command cxpacket
107 * @arg: Argument field of UHS-II command packet
108 * @payload: Payload field of UHS-II command packet
117 * received on UHS-II bus. This function fills in the contents of uhs2_command
151 * Refer to UHS-II Addendum Version 1.02 Figure 6-21 to see DEVICE_INIT CCMD format. in sd_uhs2_dev_init()
168 * Refer to UHS-II Addendum Version 1.02 section 6.3.1. in sd_uhs2_dev_init()
[all …]
/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Dpx30-firefly-jd4-core-mb.dts132 sd-uhs-sdr12;
133 sd-uhs-sdr25;
134 sd-uhs-sdr50;
135 sd-uhs-sdr104;
147 sd-uhs-sdr104;
/linux-6.14.4/arch/arm/boot/dts/rockchip/
Drk3288-veyron-sdmmc.dtsi89 sd-uhs-sdr12;
90 sd-uhs-sdr25;
91 sd-uhs-sdr50;
92 sd-uhs-sdr104;
/linux-6.14.4/arch/arm/boot/dts/st/
Dstih410-b2120.dts39 sd-uhs-sdr50;
40 sd-uhs-sdr104;
41 sd-uhs-ddr50;
Dstih418-b2199.dts92 sd-uhs-sdr50;
93 sd-uhs-sdr104;
94 sd-uhs-ddr50;
/linux-6.14.4/drivers/mmc/host/
Dsdhci-st.c257 unsigned int uhs) in sdhci_st_set_uhs_signaling() argument
266 switch (uhs) { in sdhci_st_set_uhs_signaling()
268 * Set V18_EN -- UHS modes do not work without this. in sdhci_st_set_uhs_signaling()
300 "(uhs %d)\n", uhs); in sdhci_st_set_uhs_signaling()
302 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); in sdhci_st_set_uhs_signaling()

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