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Searched full:pipeline (Results 1 – 11 of 11) sorted by relevance

/nrf52832-nimble/rt-thread/libcpu/xilinx/microblaze/
H A Dcontext_gcc.S41 AND r0, r0, r0 /* NO-OP - pipeline flush */
42 AND r0, r0, r0 /* NO-OP - pipeline flush */
43 AND r0, r0, r0 /* NO-OP - pipeline flush */
/nrf52832-nimble/packages/NimBLE-latest/nimble/drivers/nrf52/
H A Dsyscfg.yml48 This can be used to measure radio pipeline delays.
/nrf52832-nimble/rt-thread/components/drivers/include/drivers/
H A Daudio.h115 /* the preferred number and size of audio pipeline buffer for the audio device */
/nrf52832-nimble/rt-thread/components/CMSIS/Include/
H A Dcore_cmInstr.h88 Instruction Synchronization Barrier flushes the pipeline in the processor,
365 Instruction Synchronization Barrier flushes the pipeline in the processor,
/nrf52832-nimble/rt-thread/libcpu/mips/x1000/
H A Dx1000.h43 /* cpu pipeline flush */
/nrf52832-nimble/rt-thread/libcpu/mips/xburst/
H A Dx1000.h57 /* cpu pipeline flush */
/nrf52832-nimble/rt-thread/libcpu/c-sky/common/
H A Dcsi_instr.h79 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
/nrf52832-nimble/nordic/cmsis/include/
H A Dcmsis_armcc.h340 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
H A Dcmsis_gcc.h412 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
H A Dcmsis_armcc_V6.h780 \details Instruction Synchronization Barrier flushes the pipeline in the processor,
/nrf52832-nimble/packages/NimBLE-latest/nimble/drivers/nrf52/src/
H A Dble_phy.c506 * We need to adjust start time to include radio ramp-up and TX pipeline in ble_phy_set_start_time()
931 * packet as this determines pipeline delays so need to figure this out in ble_phy_get_cur_rx_phy_mode()