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/nrf52832-nimble/packages/NimBLE-latest/nimble/host/mesh/src/
H A Datomic.h262 * @brief Define an array of atomic variables.
264 * This macro defines an array of atomic variables containing at least
268 * If used from file scope, the bits of the array are initialized to zero;
271 * @param name Name of array of atomic variables.
281 * The target may be a single atomic variable or an array of them.
283 * @param target Address of atomic variable or array.
300 * The target may be a single atomic variable or an array of them.
302 * @param target Address of atomic variable or array.
322 * The target may be a single atomic variable or an array of them.
324 * @param target Address of atomic variable or array.
[all …]
/nrf52832-nimble/nordic/cmsis/include/
H A Darm_math.h59 * In the API functions, the number of samples in a complex array refers
60 * to the number of complex values; the array contains twice this number of
87 * an array of data. The array is of size <code>numRows X numCols</code>
113 * data array.
908 …q7_t *pState; /**< points to the state variable array. The array is of length numTaps +…
909 q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
918 …q15_t *pState; /**< points to the state variable array. The array is of length numTaps …
919 … q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
928 …q31_t *pState; /**< points to the state variable array. The array is of length numTaps …
929 … q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
[all …]
/nrf52832-nimble/rt-thread/components/CMSIS/Include/
H A Darm_math.h159 * In the API functions, the number of samples in a complex array refers
160 * to the number of complex values; the array contains twice this number of
187 * an array of data. The array is of size <code>numRows X numCols</code>
213 * data array.
1048 …q7_t *pState; /**< points to the state variable array. The array is of length numTaps+b…
1049 q7_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
1058 …q15_t *pState; /**< points to the state variable array. The array is of length numTaps+…
1059 … q15_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps.*/
1068 …q31_t *pState; /**< points to the state variable array. The array is of length numTaps+…
1069 … q31_t *pCoeffs; /**< points to the coefficient array. The array is of length numTaps. */
[all …]
/nrf52832-nimble/nordic/nrfx/mdk/
H A Dnrf51_deprecated.h108 …LOCK0, FICR.SIZERAMBLOCK1, FICR.SIZERAMBLOCK2 and FICR.SIZERAMBLOCK3 were renamed into an array. */
111 … that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated…
112 … that this macro will disapear when SIZERAMBLOCK array is eliminated. SIZERAMBLOCK is a deprecated…
113 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
116 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
121 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
126 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
132 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
141 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
174 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
H A Dnrf51_to_nrf52810.h124 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
128 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
134 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
140 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
146 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
156 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
190 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
H A Dnrf51_to_nrf52840.h170 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
174 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
180 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
186 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
192 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
202 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
236 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
H A Dnrf51_to_nrf52.h555 /* The registers FICR.DEVICEID0 and FICR.DEVICEID1 were renamed into an array. */
559 /* The registers FICR.ER0, FICR.ER1, FICR.ER2 and FICR.ER3 were renamed into an array. */
565 /* The registers FICR.IR0, FICR.IR1, FICR.IR2 and FICR.IR3 were renamed into an array. */
571 /* The registers FICR.DEVICEADDR0 and FICR.DEVICEADDR1 were renamed into an array. */
577 /* The tasks PPI.TASKS_CHGxEN and PPI.TASKS_CHGxDIS were renamed into an array of structs. */
587 /* The registers PPI.CHx_EEP and PPI.CHx_TEP were renamed into an array of structs. */
621 /* The registers PPI.CHG0, PPI.CHG1, PPI.CHG2 and PPI.CHG3 were renamed into an array. */
/nrf52832-nimble/rt-thread/examples/kernel/
H A Dsemaphore_producer_consumer.c13 rt_uint32_t array[MAXSEM]; variable
37 array[set%MAXSEM] = cnt + 1; in producer_thread_entry()
38 rt_kprintf("the producer generates a number: %d\n", array[set%MAXSEM]); in producer_thread_entry()
70 sum += array[get%MAXSEM]; in consumer_thread_entry()
71 rt_kprintf("the consumer[%d] get a number: %d\n", no, array[get%MAXSEM] ); in consumer_thread_entry()
/nrf52832-nimble/packages/NimBLE-latest/nimble/host/include/host/
H A Dble_hs_hci.h38 * connection. The channel map is represented as an array of five bytes, with
39 * each bit corresponding to an individual channel. The array is interpreted
67 * is represented as an array of five bytes, with each bit corresponding to an
68 * individual channel. The array is interpreted as little-endian, such that:
H A Dble_gatt.h333 * @param handles An array of 16-bit attribute handles to read.
334 * @param num_handles The number of entries in the "handles" array.
443 * @param attrs An array of attribute descriptors; specifies
450 * array.
548 * Array of this characteristic's descriptors. NULL if no descriptors.
572 * o 0 - No more services in this array.
583 * Array of pointers to other service definitions. These services are
585 * array with NULL.
590 * Array of characteristic definitions corresponding to characteristics
748 * @param svcs An array of service definitions to queue for
[all …]
/nrf52832-nimble/rt-thread/components/dfs/filesystems/nfs/rpc/
H A Dxdr.c483 * You create an array of xdrdiscrim structures, terminated with
485 * the discriminant value and then searches the array of xdrdiscrims
603 * XDR an array of arbitrary elements
604 * *addrp is a pointer to the array, *sizep is the number of elements.
607 * xdr procedure to call to handle each element of the array.
638 * if we are deserializing, we may need to allocate an array. in xdr_array()
639 * We also save time by checking for a null array if we are freeing. in xdr_array()
659 * now we xdr each element of array in xdr_array()
667 * the array may need freeing in xdr_array()
679 * XDR a fixed length array. Unlike variable-length arrays,
[all …]
/nrf52832-nimble/rt-thread/libcpu/risc-v/k210/
H A Dinterrupt.c52 /* Get current enable bit array by IRQ number */ in rt_hw_plic_irq_enable()
54 /* Set enable bit in enable bit array */ in rt_hw_plic_irq_enable()
56 /* Write back the enable bit array */ in rt_hw_plic_irq_enable()
68 /* Get current enable bit array by IRQ number */ in rt_hw_plic_irq_disable()
70 /* Clear enable bit in enable bit array */ in rt_hw_plic_irq_disable()
72 /* Write back the enable bit array */ in rt_hw_plic_irq_disable()
/nrf52832-nimble/nordic/nrfx/drivers/
H A Dnrfx_common.h133 * @brief Macro for getting the number of elements in an array.
135 * @param array Name of the array.
137 * @return Array element count.
139 #define NRFX_ARRAY_SIZE(array) (sizeof(array) / sizeof((array)[0])) argument
/nrf52832-nimble/packages/NimBLE-latest/porting/npl/rtthread/include/nimble/
H A Dnpl_shell.h16 * @param argv Array of option strings. First option is always command name.
52 * @param shell_commands Array of commands to register.
53 * The array should be terminated with an empty element.
/nrf52832-nimble/rt-thread/components/net/freemodbus/modbus/include/
H A Dmbutils.h41 * bitfields backed by a character array buffer.
49 * This function allows the efficient use of an array to implement bitfields.
50 * The array used for storing the bits must always be a multiple of two
83 * This function is used to extract up bit values from an array. Up to eight
/nrf52832-nimble/rt-thread/components/libc/aio/
H A Dposix_aio.c278 * calling thread. The list argument is an array of pointers to asynchronous I/O
280 * array. Each aiocb structure pointed to has been used in initiating an asynchronous
281 * I/O request via aio_read(), aio_write(), or lio_listio(). This array may
282 * contain null pointers, which are ignored. If this array contains pointers
405 * The list argument is an array of pointers to aiocb structures. The array contains
406 * nent elements. The array may contain NULL elements, which shall be ignored.
409 * elements of the array list become illegal addresses before all asynchronous I/O
412 * pointed to by the elements of the array list become illegal addresses prior to
438 * the length of the array.
/nrf52832-nimble/rt-thread/components/net/lwip-2.1.0/src/include/lwip/apps/
H A Dhttpd.h61 * CGI within the cgis array passed to http_set_cgi_handlers. Parameters
64 * pcValue arrays. Each entry in the pcParam array contains the name of a
65 * parameter with the corresponding entry in the pcValue array containing the
132 * array (currently .shtml, .shtm, .ssi, .xml, .json) where "name" appears as
133 * one of the tags supplied to http_set_ssi_handler in the tags array. The
138 * found in the tags array and identifies the tag that is to be processed.
/nrf52832-nimble/rt-thread/components/net/lwip-2.0.2/src/include/lwip/apps/
H A Dhttpd.h60 * CGI within the ppcURLs array passed to http_set_cgi_handler. Parameters
63 * pcValue arrays. Each entry in the pcParam array contains the name of a
64 * parameter with the corresponding entry in the pcValue array containing the
123 * one of the tags supplied to http_set_ssi_handler in the ppcTags array. The
128 * found in the ppcTags array and identifies the tag that is to be processed.
/nrf52832-nimble/rt-thread/components/net/lwip-1.4.1/src/include/lwip/
H A Dsnmp_structs.h96 /** MIB const array node */
98 /** MIB array node (mem_malloced from RAM) */
119 /* array or max list length */
126 /** derived node, points to a fixed size const array
144 /** derived node, points to a fixed size mem_malloced array
/nrf52832-nimble/packages/NimBLE-latest/apps/bleprph/
H A Dsyscfg.yml30 is an array of 4 GPIO pin numbers for 1M, 2M, LE Coded S=2 and
36 is an array of 3 GPIO pin numbers for 1M, 2M and LE Coded
/nrf52832-nimble/nordic/nrfx/hal/
H A Dnrf_pwm.h239 …nrf_pwm_values_t values; ///< Pointer to an array with duty cycle values. This array must be in Da…
248 uint16_t length; ///< Number of 16-bit values in the array pointed by @p values.
255 * array of duty cycle values.
257 #define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t)) argument
446 * @param[in] out_pins Array with pin numbers for individual PWM output channels.
481 * @param[in] p_values Pointer to an array with duty cycle values.
/nrf52832-nimble/rt-thread/components/net/sal_socket/include/
H A Dsal_netdb.h51 char **h_aliases; /* A pointer to an array of pointers to alternative host names,
55 char **h_addr_list; /* A pointer to an array of pointers to network addresses (in
/nrf52832-nimble/rt-thread/components/net/uip/uip/
H A Duiplib.h55 * the form a.b.c.d and converts it into a 4-byte array that can be
61 * \param addr A pointer to a 4-byte array that will be filled in with
/nrf52832-nimble/rt-thread/components/net/lwip-1.4.1/src/core/
H A Dmemp.c115 /** This array holds the first free element of each pool.
125 /** This array holds the element sizes of each pool. */
136 /** This array holds the number of elements in each pool. */
142 /** This array holds a textual description of each pool. */
161 /** This array holds the base of each memory pool. */
/nrf52832-nimble/rt-thread/components/net/uip/
H A Duip-1.0-changelog.txt73 o TCP: Array index for uip_conns[] array was out of bounds in

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