Searched defs:writePorts (Results 1 – 5 of 5) sorted by relevance
| /XiangShan/src/main/scala/xiangshan/backend/regcache/ |
| H A D | RegCache.scala | 78 val writePorts = Wire(chiselTypeOf(io.writePorts)) constant
125 val writePorts = Vec(params.getIntExuRCWriteSize + params.getMemExuRCWriteSize, constant
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| H A D | RegCacheDataModule.scala | 51 …val writePorts = Vec(numWritePorts, new RCWritePort(dataWidth, addrWidth, tagWidth, backendParams.… constant
68 val writePorts = io.writePorts constant
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| H A D | RegCacheTagModule.scala | 52 val writePorts = Vec(numWritePorts, new RCTagTableWritePort(addrWidth, tagWidth)) constant
76 val writePorts = io.writePorts constant
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| H A D | RegCacheAgeTimer.scala | 44 val writePorts = Vec(numWritePorts, new RCAgeTimerWritePort(addrWidth)) constant
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| /XiangShan/src/main/scala/xiangshan/backend/regfile/ |
| H A D | Regfile.scala | 78 val writePorts = Vec(numWritePorts, new RfWritePort(len, width)) constant
111 val writePorts = io.writePorts constant
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