| /XiangShan/src/main/scala/xiangshan/backend/regcache/ |
| H A D | RegCacheTagModule.scala | 29 val tag = Input(UInt(tagWidth.W)) constant
37 val tag = Input(UInt(tagWidth.W)) constant
64 val tag = Reg(Vec(numEntries, UInt(tagWidth.W))) constant
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| H A D | RegCacheDataModule.scala | 36 val tag = OptionWrapper(debugEn, Input(UInt(tagWidth.W))) constant
59 val tag = OptionWrapper(backendParams.debugEn, Reg(Vec(numEntries, UInt(tagWidth.W)))) constant
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| /XiangShan/scripts/cache/ |
| H A D | parseAddr.py | 12 def fullAddr(self, tag, set, bank): argument
45 tag = int(addr[0], 16) variable
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| /XiangShan/src/main/scala/xiangshan/cache/mmu/ |
| H A D | BitmapCheck.scala | 78 val tag = UInt(SPTagLen.W) constant
91 val tag = UInt(ppnLen.W) constant
325 val tag = UInt(ppnLen.W) constant
341 val tag = UInt(ppnLen.W) constant
346 val tag = UInt((ppnLen-log2Ceil(XLEN)).W) constant
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| H A D | MMUBundle.scala | 184 val tag = UInt(sectorvpnLen.W) constant
828 val tag = UInt(tagLen.W) constant
951 val tag = UInt(tagLen.W) constant
1268 val tag = Cat(entry(idx).tag, idx(sectortlbwidth - 1, 0)) constant
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| H A D | PageTableCache.scala | 203 val tag = Input(UInt(SPTagLen.W)) constant
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| /XiangShan/src/main/scala/xiangshan/cache/dcache/meta/ |
| H A D | LegacyMetaArray.scala | 31 val tag = UInt(tagBits.W) constant
46 val tag = UInt(tagBits.W) constant
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| H A D | TagArray.scala | 33 val tag = UInt(tagBits.W) constant
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| /XiangShan/src/main/scala/xiangshan/frontend/ |
| H A D | WrBypass.scala | 50 val tag = if (hasTag) Some(UInt(tagWidth.W)) else None constant
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| H A D | ITTAGE.scala | 238 …val tag = ((unhashed_idx >> log2Ceil(nRows)).asUInt ^ tag_fh ^ (alt_tag_fh << 1).asUInt)(tagLen - … constant
249 val tag = UInt(tagLen.W) constant
375 val tag = s0_tag constant
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| H A D | FauFTB.scala | 57 val tag = Reg(UInt(tagSize.W)) constant
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| H A D | Tage.scala | 266 val tag = UInt(tagLen.W) constant
302 val tag = (unhashed_idx ^ tag_fh ^ (alt_tag_fh << 1))(tagLen - 1, 0) constant
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| H A D | FTB.scala | 418 val tag = UInt(tagLength.W) constant
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| H A D | FrontendBundle.scala | 504 val tag = UInt(tagBits.W) constant
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| /XiangShan/scripts/ |
| H A D | constantHelper.py | 99 …ossover_rate, mutation_rate, emu_threads, concurrent_emu, max_instr, seed, work_load, tag) -> None: argument
118 def loadConfig(json_path, tag) -> Config: argument
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| /XiangShan/src/main/scala/xiangshan/frontend/icache/ |
| H A D | ICache.scala | 209 val tag: UInt = UInt(tagBits.W) constant
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| /XiangShan/src/main/scala/xiangshan/mem/prefetch/ |
| H A D | L1StreamPrefetcher.scala | 55 val tag = UInt(REGION_TAG_BITS.W) constant
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| H A D | L1PrefetchComponent.scala | 255 val tag = UInt(HASH_TAG_WIDTH.W) constant
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| H A D | SMSPrefetcher.scala | 580 val tag = UInt(PHT_TAG_BITS.W) constant
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| /XiangShan/src/main/scala/xiangshan/ |
| H A D | Bundle.scala | 701 val tag = Bool() // l1 tag array constant
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