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Searched defs:debugIntr (Results 1 – 4 of 4) sorted by relevance

/XiangShan/src/main/scala/top/
H A DXSNoCTop.scala226 …val debugIntr = withClockAndReset(clock, cpuReset_sync) {AsyncResetSynchronizerShiftReg(debug.head… constant
/XiangShan/src/main/scala/xiangshan/backend/fu/NewCSR/
H A DInterruptFilter.scala582 val debugIntr = Bool() constant
H A DNewCSR.scala267 val debugIntr = platformIRP.debugIP && debugIntrEnable constant
/XiangShan/src/main/scala/xiangshan/backend/fu/
H A DCSR.scala1275 val debugIntr = csrio.externalInterrupt.debug & debugIntrEnable constant