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Searched defs:aligned16BytesAddr (Results 1 – 2 of 2) sorted by relevance

/XiangShan/src/main/scala/xiangshan/mem/lsqueue/
H A DLoadMisalignBuffer.scala288 val aligned16BytesAddr = (req.vaddr >> 4) << 4// req.vaddr & ~("b1111".U) constant
H A DStoreMisalignBuffer.scala360 val aligned16BytesAddr = (req.vaddr >> 4) << 4// req.vaddr & ~("b1111".U) constant